71 research outputs found

    A Construction Kit for Efficient Low Power Neural Network Accelerator Designs

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    Implementing embedded neural network processing at the edge requires efficient hardware acceleration that couples high computational performance with low power consumption. Driven by the rapid evolution of network architectures and their algorithmic features, accelerator designs are constantly updated and improved. To evaluate and compare hardware design choices, designers can refer to a myriad of accelerator implementations in the literature. Surveys provide an overview of these works but are often limited to system-level and benchmark-specific performance metrics, making it difficult to quantitatively compare the individual effect of each utilized optimization technique. This complicates the evaluation of optimizations for new accelerator designs, slowing-down the research progress. This work provides a survey of neural network accelerator optimization approaches that have been used in recent works and reports their individual effects on edge processing performance. It presents the list of optimizations and their quantitative effects as a construction kit, allowing to assess the design choices for each building block separately. Reported optimizations range from up to 10'000x memory savings to 33x energy reductions, providing chip designers an overview of design choices for implementing efficient low power neural network accelerators

    Machine Learning for Microcontroller-Class Hardware -- A Review

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    The advancements in machine learning opened a new opportunity to bring intelligence to the low-end Internet-of-Things nodes such as microcontrollers. Conventional machine learning deployment has high memory and compute footprint hindering their direct deployment on ultra resource-constrained microcontrollers. This paper highlights the unique requirements of enabling onboard machine learning for microcontroller class devices. Researchers use a specialized model development workflow for resource-limited applications to ensure the compute and latency budget is within the device limits while still maintaining the desired performance. We characterize a closed-loop widely applicable workflow of machine learning model development for microcontroller class devices and show that several classes of applications adopt a specific instance of it. We present both qualitative and numerical insights into different stages of model development by showcasing several use cases. Finally, we identify the open research challenges and unsolved questions demanding careful considerations moving forward.Comment: Accepted for publication at IEEE Sensors Journa

    NASA Capability Roadmaps Executive Summary

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    This document is the result of eight months of hard work and dedication from NASA, industry, other government agencies, and academic experts from across the nation. It provides a summary of the capabilities necessary to execute the Vision for Space Exploration and the key architecture decisions that drive the direction for those capabilities. This report is being provided to the Exploration Systems Architecture Study (ESAS) team for consideration in development of an architecture approach and investment strategy to support NASA future mission, programs and budget requests. In addition, it will be an excellent reference for NASA's strategic planning. A more detailed set of roadmaps at the technology and sub-capability levels are available on CD. These detailed products include key driving assumptions, capability maturation assessments, and technology and capability development roadmaps

    Energy-Quality Scalable Memory-Frugal Feature Extraction for Always-On Deep Sub-mW Distributed Vision

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    10.1109/ACCESS.2020.2968576IEEE Access818951-1896

    Factories of the Future

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    Engineering; Industrial engineering; Production engineerin

    Factories of the Future

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    Engineering; Industrial engineering; Production engineerin

    Changing Paradigms : Designing for a Sustainable Future

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    Changing Paradigms: designing for a sustainable future is intended for designers, design students and design educators, who want to understand why and how to integrate Sustainability into design education and practice. It consists of five parts; Part One presents why we must design for a sustainable future, Part Two describes how to design for a sustainable future, Part Three presents student design projects exemplifying sustainable design, Part Four is a glossary of 120 terms and concepts about Sustainability and design, and finally, Part Five includes three appendices: The Cumulus Kyoto Design Declaration, and guidelines on how to green both school campuses and conferences. This book has been edited by Peter Stebbing and Ursula Tischner, who have invited internationally renown experts to contribute chapters. Changing Paradigms offers a comprehensive survey of essential knowledge for designers and other creative professions to shift their focus to the new design paradigm for sustainable production, consumption, and life styles
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