Differential temperature sensors: Review of applications in the test and characterization of circuits, usage and design methodology

Differential temperature sensors can be placed in integrated circuits to extract a signature ofthe power dissipated by the adjacent circuit blocks built in the same silicon die. This review paper firstdiscusses the singularity that differential temperature sensors provide with respect to other sensortopologies, with circuit monitoring being their main application. The paper focuses on the monitoringof radio-frequency analog circuits. The strategies to extract the power signature of the monitoredcircuit are reviewed, and a list of application examples in the domain of test and characterizationis provided. As a practical example, we elaborate the design methodology to conceive, step bystep, a differential temperature sensor to monitor the aging degradation in a class-A linear poweramplifier working in the 2.4 GHz Industrial Scientific Medical—ISM—band. It is discussed how,for this particular application, a sensor with a temperature resolution of 0.02 K and a high dynamicrange is required. A circuit solution for this objective is proposed, as well as recommendations for thedimensions and location of the devices that form the temperature sensor. The paper concludes with adescription of a simple procedure to monitor time variability.Postprint (published version

DC temperature measurements to characterize the central frequency and 3 dB bandwidth in mmW power amplifiers

This letter shows how a temperature sensor and a simple DC voltage multimeter can be used as instruments to determine the central frequency and 3 dB bandwidth of a 60 GHz linear power amplifier (PA). Compared to previous works, the DC temperature monitoring now proposed requires a much simpler and convenient measurement set-up. In this example, the temperature sensor is embedded in the same silicon die as the PA. Being placed in empty layout spaces next to it, it is proposed as a built-in test circuit.Peer ReviewedPostprint (author's final draft

Design of a CMOS power amplifier and built-in sensors for variability monitoring and compensation

This research thesis aims to develop a system composed by a a CMOS power amplifier and built-in sensors for variability monitoring and compensation. The integration of monitoring systems with high frequency analog circuits is commonly used for performance optimization and control. In addition, built-in sensors are used in quality testing, improving the yield by detecting circuit faults during the fabrication of these. Typically, most of the built-in sensors are electrically connected to a node of the circuit under test, affecting its performance. In tuned power amplifers, for instance, a small load variation can cause a degradation of its output power and effciency. Hence, the integration between the circuit under test and the monitoring block should be carefully designed. These loading effects can be avoided using non-invasive solutions such as temperature sensors. An integrated circuit composed by a CMOS power amplifer, two amplitude detectors and a temperature sensor is implemented in this work. The degradation of the power amplifier performance due to variability effects is accelerated by increasing its supply voltage. A feedback loop is added to control and adjust the system operation, stress the amplifier and accelerate its degradation, monitor the amplifier performance using the sensors and compensate the observed degradation. The design of each one of the main parts of the system is presented through this work, explaining their theoretical basis and validating their operation with simulations results. Finally, all the parts are integrated together, and a feedback loop with a control algorithm is proposed to monitor and compensate the DUT variability effects

Analytical approach to design of proportional-to-the-absolute-temperature current sources and temperature sensors based on heterojunction bipolar transistors

Embedded temperature sensors based on proportional-to-the-absolute-temperature (PTAT) current sources have the potential to lay the foundation for low-cost temperature-aware integrated circuit architectures if they meet the requirements of miniaturization, fabrication process match, and precise estimation in a wide range of temperatures. This paper addresses an analytical approach to the minimum-element PTAT circuit design capitalizing on the physics-based modeling of the heterojunction bipolar transistor (HBT) structures. It is shown that a PTAT circuit can be implemented on only two core HBT elements with good accuracy. Derived parametric relations allow a straightforward specification of the thermal gain at the design stage, which affects sensor sensitivity. Further derived current-to-temperature mapping expresses a temperature estimate based on the measured PTAT output current. Numerical examples indicate attainable estimation accuracy of 0.43% in case of a measurement instance taken in the absence of measurement noise.The National Research Foundation of South Africa under Grant UID:74041http://ieeexplore.ieee.org/hb2013ai201

BPF-based thermal sensor circuit for on-chip testing of RF circuits

A new sensor topology meant to extract figures of merit of radio-frequency analog integrated circuits (RF-ICs) was experimentally validated. Implemented in a standard 0.35 µm complementary metal-oxide-semiconductor (CMOS) technology, it comprised two blocks: a single metaloxide-semiconductor (MOS) transistor acting as temperature transducer, which was placed near the circuit to monitor, and an active band-pass filter amplifier. For validation purposes, the temperature sensor was integrated with a tuned radio-frequency power amplifier (420 MHz) and MOS transistors acting as controllable dissipating devices. First, using the MOS dissipating devices, the performance and limitations of the different blocks that constitute the temperature sensor were characterized. Second, by using the heterodyne technique (applying two nearby tones) to the power amplifier (PA) and connecting the sensor output voltage to a low-cost AC voltmeter, the PA’s output power and its central frequency were monitored. As a result, this topology resulted in a low-cost approach, with high linearity and sensitivity, for RF-IC testing and variability monitoring.This research was funded by Spanish AEI–Agencia Estatal de Investigación–grant number PID2019-103869RB-C33. (X.P.) has also received founds from the Spanish Ministry of Science, Innovation and Universities through Agencia Estatal de Investigación (AEI) (projects: HIPERCELLS, RTI2018-098392B-I00, and “Fiabilidad Inteligente”, PCI2020-112028).Peer ReviewedPostprint (published version

Development of Robust Analog and Mixed-Signal Circuits in the Presence of Process- Voltage-Temperature Variations

Continued improvements of transceiver systems-on-a-chip play a key role in the advancement of mobile telecommunication products as well as wireless systems in biomedical and remote sensing applications. This dissertation addresses the problems of escalating CMOS process variability and system complexity that diminish the reliability and testability of integrated systems, especially relating to the analog and mixed-signal blocks. The proposed design techniques and circuit-level attributes are aligned with current built-in testing and self-calibration trends for integrated transceivers. In this work, the main focus is on enhancing the performances of analog and mixed-signal blocks with digitally adjustable elements as well as with automatic analog tuning circuits, which are experimentally applied to conventional blocks in the receiver path in order to demonstrate the concepts. The use of digitally controllable elements to compensate for variations is exemplified with two circuits. First, a distortion cancellation method for baseband operational transconductance amplifiers is proposed that enables a third-order intermodulation (IM3) improvement of up to 22dB. Fabricated in a 0.13µm CMOS process with 1.2V supply, a transconductance-capacitor lowpass filter with the linearized amplifiers has a measured IM3 below -70dB (with 0.2V peak-to-peak input signal) and 54.5dB dynamic range over its 195MHz bandwidth. The second circuit is a 3-bit two-step quantizer with adjustable reference levels, which was designed and fabricated in 0.18µm CMOS technology as part of a continuous-time SigmaDelta analog-to-digital converter system. With 5mV resolution at a 400MHz sampling frequency, the quantizer's static power dissipation is 24mW and its die area is 0.4mm^2. An alternative to electrical power detectors is introduced by outlining a strategy for built-in testing of analog circuits with on-chip temperature sensors. Comparisons of an amplifier's measurement results at 1GHz with the measured DC voltage output of an on-chip temperature sensor show that the amplifier's power dissipation can be monitored and its 1-dB compression point can be estimated with less than 1dB error. The sensor has a tunable sensitivity up to 200mV/mW, a power detection range measured up to 16mW, and it occupies a die area of 0.012mm^2 in standard 0.18µm CMOS technology. Finally, an analog calibration technique is discussed to lessen the mismatch between transistors in the differential high-frequency signal path of analog CMOS circuits. The proposed methodology involves auxiliary transistors that sense the existing mismatch as part of a feedback loop for error minimization. It was assessed by performing statistical Monte Carlo simulations of a differential amplifier and a double-balanced mixer designed in CMOS technologies

Silicon Germanium BiCMOS Integrated Circuits for Scalable Cryogenic Sensing Applications

This dissertation is focused on an investigation of BiCMOS cryogenic low noise amplifiers (LNAs) based on Silicon-germanium (SiGe) heterojunction bipolar transistors (HBTs) for simultaneous low noise and low power design and also taking advantage of CMOS circuitry for adding flexibility to the LNA design. Cryogenic LNAs\u27 scalability challenges are discussed and addressed in the dissertation. To achieve that, first, HBTs of three state-of-the-art technologies are characterized and modeled at cryogenic temperature. It is shown that SiGe HBT provides a promising compromise of noise temperature, power consumption, and bandwidth. Moreover, a scalable on-chip approach is proposed and verified for biasing of SiGe HBTs based LNAs. Finally, the first cryogenic re-configurable LNA is designed, implemented, and measured

Spin Detection, Amplification, and Microwave Squeezing with Kinetic Inductance Parametric Amplifiers

Superconducting parametric amplifiers operating at microwave frequencies have become an essential component in circuit quantum electrodynamics experiments. They are used to amplify signals at the single-photon level, while adding only the minimum amount of noise required by quantum mechanics. To achieve gain, energy is transferred from a pump to the signal through a non-linear interaction. A common strategy to enhance this process is to place the non-linearity inside a high quality factor resonator, but so far, quantum limited amplifiers of this type have only been demonstrated from designs that utilize Josephson junctions. Here we demonstrate the Kinetic Inductance Parametric Amplifier (KIPA), a three-wave mixing resonant parametric amplifier that exploits the kinetic inductance intrinsic to thin films of disordered superconductors. We then utilize the KIPA for measurements of 209Bi spin ensembles in Si. First, we show that a KIPA can serve simultaneously as a high quality factor resonator for pulsed electron spin resonance measurements and as a low-noise parametric amplifier. Using this dual-functionality, we enhance the signal to noise ratio of our measurements by more than a factor of seven and ultimately achieve a measurement sensitivity of 2.4 x 10^3 spins. Then we show that pushed to the high-gain limit, KIPAs can serve as a `click'-detector for microwave wave packets by utilizing a hysteretic transition to a self-oscillating state. We calibrate the detector's sensitivity to be 3.7 zJ and then apply it to measurements of electron spin resonance. Finally, we demonstrate the suitability of the KIPA for generating squeezed vacuum states. Using a cryogenic noise source, we first confirm the KIPAs in our experiment to be quantum limited amplifiers. Then, using two KIPAs arranged in series, we make direct measurements of vacuum noise squeezing, where we generate itinerant squeezed states with minimum uncertainty more than 7 dB below the standard quantum limit. High quality factor resonators have also recently been used to achieve strong coupling between the spins of single electrons in gate-defined quantum dots and microwave photons. We present our efforts to achieve the equivalent goal for the 31P flip-flop qubit. In doing so, we confirm previous predictions that the superconducting material MoRe would produce magnetic field-resilient resonators and demonstrate that it has kinetic inductance equivalent to the popular material NbTiN

Bibliography of Lewis Research Center technical publications announced in 1987

This compilation of abstracts describes and indexes the technical reporting that resulted from the scientific and engineering work performed and managed by the Lewis Research Center in 1987. All the publications were announced in the 1987 issues of STAR (Scientific and Technical Aerospace Reports) and/or IAA (International Aerospace Abstracts). Included are research reports, journal articles, conference presentations, patents and patent applications, and theses