Diffusivity variation in electromigration failure

Electromigration driven void dynamics plays an important role in the reliability of copper interconnects; a proper understanding of which is made more difficult due to local variations in line microstructure. In simulations, the parameter incorporating these variations best is the effective atomic diffusivity Deff which is sensitive to grain size and orientation, interface layer thickness, etc. We examine a number of experimental results and conclude that, to explain observations using current theoretical models, Deff values must vary significantly along the interconnect, and that such variations are enough to yield encouraging simulations of resistance variations under bidirectional stress

Interconnect reliability dependence on fast diffusivity paths

a b s t r a c t The reliability of interconnects in modern integrated circuits is determined by the magnitude and direction of the effective valence for electromigration (EM). The effective valence depends on local atomistic configurations of fast diffusivity paths such as metal interfaces, dislocations, and the grain boundary; therefore, microstructural variations lead to a statistically predictable behavior for the EM life time. Quantum mechanical investigations of EM have been carried out on an atomistic level in order to obtain numerically efficient methods for calculating the effective valence. The results of ab initio calculations of the effective valence have been used to parametrize the continuum-level EM models. The impact of fast diffusivity paths on the long term EM behavior is demonstrated with these models

Diffusivity variation in Electromigration failure

This article was published in the journal, Microelectronics Reliability [© Elsevier] and the definitive version is available at: http://dx.doi.org/10.1016/j.microrel.2012.06.057Electromigration driven void dynamics plays an important role in the reliability of copper interconnects; a proper understanding of which is made more difficult due to local variations in line microstructure. In simulations, the parameter incorporating these variations best is the effective atomic diffusivity Deff which is sensitive to grain size and orientation, interface layer thickness, etc. We examine a number of experimental results and conclude that, to explain observations using current theoretical models, Deff values must vary significantly along the interconnect, and that such variations are enough to yield encouraging simulations of resistance variations under bidirectional stress

Scaling and process effect on electromigration reliability for Cu/low k interconnects

textThe microelectronics industry has been managing the RC delay problem arising from aggressive line scaling, by replacing aluminum (Al) by copper (Cu) and oxide dielectric by low-k dielectric. Electromigration (EM) turned out to be a serious reliability problem for Cu interconnects due to the implementation of mechanically weaker low-k dielectrics. In addition, line width and via size scaling resulted in the need of a novel diffusion barrier, which should be uniform and thin. The objective of this dissertation is to investigate the impacts of Ta barrier process, such as barrier-first and pre-clean first, and scaling of barrier and line/via on EM reliability of Cu/low-k interconnects. For this purpose, EM statistical test structures, having different number of line segments, line width, and via width, were designed. The EM test structures were fabricated by a dualdamascene process with two metal layers (M1/Via/M2), which were then packaged for EM tests. The package-level EM tests were performed in a specially designed vacuum chamber with pure nitrogen environment. The novel barrier deposition process, called barrier-first, showed a higher (jL)[subscript c] product and prolonged EM lifetime, compared with the conventional Ta barrier deposition process, known as pre-clean first. This can be attributed to the improved uniformity and thickness of the Ta layer on the via and trench, as confirmed by TEM. As for the barrier thickness effect, the (jL)c product decreased with decreasing thickness, due to reduced Cu confinement. A direct correlation between via size and EM reliability was found; namely, EM lifetime and statistics degraded with via size. This can be attributed to the fact that critical void length to cause open circuit is about the size of via width. To investigate further line scaling effect on EM reliability, SiON (siliconoxynitride) trenchfilling process was introduced to fabricate 60-nm lines, corresponding to 45-nm technology, using a conventional, wider line lithograph technology. The EM lifetime of 60-nm fine lines with SiON filling was longer than that of a standard damascene structure, which can be attributed to a distinct via/metal-1 configuration in reducing process-induced defects at the via/metal-1 interface.Materials Science and Engineerin

Effects of scaling on microstructure evolution of Cu nanolines and impact on electromigration reliability

textScaling can significantly degrade the electromigration (EM) lifetime for Cu interconnects, raising serious reliability concerns. Different methods have emerged to enhance the EM resistance of Cu by suppressing the interface diffusion (the historically fastest diffusion path), notably using CoWP metal cap and Mn alloying. With further scaling of Cu interconnects, EM reliability becomes increasingly complex due to changes in Cu microstructure. In ultra-fine Cu lines a large population of small grains mix with bamboo-type grains, resulting in an additional contribution of grain boundary diffusion to EM degradation. With the interface diffusion suppressed by CoWP or Mn alloying, the grain structure effect becomes even more important. The objective of this study is to investigate the EM reliability of ultra-fine Cu interconnects, focusing on the scaling effect on grain structure and mass transport. First, the detailed microstructure information of Cu interconnects down to the 22 nm node was analyzed using a transmission electron microscope (TEM)-based high resolution diffraction technique. A dominant sidewall growth of {111} grains was observed for 70 nm Cu lines (45 nm node), reflecting the importance of interfacial energy in controlling grain growth. The strength of the {111} texture was found to significantly increase as line width was reduced to 40 nm (22 nm node), while the length fraction of coherent twin boundaries was reduced to ~1%. Secondly, the results from microstructure together with the deduced interfacial and grain boundary diffusivities were used to identify flux divergent sites for void formation and to analyze the grain structure effect on EM statistics using a microstructure-based kinetic model. Finally, based on the analysis of Cu grain structure evolution with downscaling, the scaling behavior of EM drift velocity was investigated for Cu interconnects with CoWP capping and Mn alloying. This enables us to project the EM lifetime and statistics for future technology nodes. The Mn alloying effect on mass transport in combination of grain structure control was found to provide an effective means to improve EM reliability especially with further scaling. In summary, this study establishes a correlation between the microstructure of Cu nanolines, void formation kinetics, and EM statistics.Mechanical Engineerin

Study of initial void formation and electron wind force for scaling effects on electromigration in Cu interconnects

textThe continuing scaling of integrated circuits beyond 22nm technology node poses increasing challenges to Electromigration (EM) reliability for Cu on-chip interconnects. First, the width of Cu lines in advanced technology nodes is less than the electron mean free path which is 39nm in Cu at room temperature. This is a new size regime where any new scaling effect on EM is of basic interest. And second, the reduced line width necessitates the development of new methods to analyze the EM characteristics. Such studies will require the development of well controlled processes to fabricate suitable test structures for EM study and model verification. This dissertation is to address these critical issues for EM in Cu interconnects. The dissertation first studies the initial void growth under EM, which is critical for measurement of the EM lifetime and statistics. A method based on analyzing the resistance traces obtained from EM tests of multi-link structures has been developed. The results indicated that there are three stages in the resistance traces where the rate of the initial void growth in Stage I is lower than that in Stage III after interconnect failure and they are linearly correlated. An analysis extending the Korhonen model has been formulated to account for the initial void formation. In this analysis, the stress evolution in the line during void growth under EM was analyzed in two regions and an analytic solution was deduced for the void growth rate. A Monte Carlo grain growth simulation based on the Potts model was performed to obtain grain structures for void growth analysis. The results from this analysis agreed reasonably well with the EM experiments. The next part of the dissertation is to study the size effect on the electron wind force for a thin film and for a line with a rectangular cross section. The electron wind force was modeled by considering the momentum transfer during collision between electrons and an atom. The scaling effect on the electron wind force was found to be represented by a size factor depending on the film/line dimensions. In general, the electron wind force is enhanced with increasing dimensional confinement. Finally, a process for fabrication of Si nanotrenches was developed for deposition of Cu nanolines with well-defined profiles. A self-aligned sub-lithographic mask technique was developed using polymer residues formed on Si surfaces during reactive ion etching of Si dioxide in a fluorocarbon plasma. This method was capable to fabricate ultra-narrow Si nanotrenches down to 20nm range with rectangular profiles and smooth sidewalls, which are ideal for studying EM damage mechanisms and model verification for future technology nodes.Physic

Charakterisierung und Optimierung elektrochemisch abgeschiedener Kupferdünnschichtmetallisierungen für Leitbahnen höchstintegrierter Schaltkreise

Die Entwicklung der Mikroelektronik wird durch eine fortschreitende Miniaturisierung der Bauelemente geprägt. Infolge einer Reduzierung der Querschnittflächen von Leitbahnstrukturen erhöht sich die elektrische Leistungsdichte und das Metallisierungssystem bestimmt zunehmend die Übertragungsgeschwindigkeiten. Kupfer repräsentiert hierbei das verbreitetste Leitbahnmaterial und wird vorwiegend mittels elektrochemischer Abscheidung in vergrabene Damaszen-Strukturen eingebracht. Die vorliegende Dissertation beschreibt Möglichkeiten für eine Optimierung von Kupferleitbahnen für höchstintegrierte Schaltkreise. Von besonderem Interesse sind hierbei die Gefügequalität und der Reinheitsgrad. Es erfolgen umfangreiche werkstoffanalytische und elektrochemische Untersuchungen zur Charakterisierung von Depositionsmechanismen, des Einbaus von Fremdstoffen, des Mikrogefüges nach der Abscheidung und der Mikrogefügeumwandlung. In einem abschließenden Forschungsschwerpunkt werden Kupfer-Damaszen-Teststrukturen mit unterschiedlichen Gehalten nichtmetallischer Verunreinigungen hergestellt und entsprechenden Lebensdauerexperimenten unterzogen. Hierdurch gelingt eine Evaluierung des Einflusses jener Verunreinigungen auf die Elektromigrationsbeständigkeit von Kupferleitbahnen. Die Arbeit umfasst daher das gesamte Spektrum von der Grundlagenforschung bis zur Applikation von elektrochemisch abgeschiedenen Kupferdünnschichtmetallisierungen

Stretchable metallization technologies for skin-like transducers

The skin is not only the largest human organ, capable of accomplishing distributed and multimodal sensing functions. Replicating the versatility of skin artificially is a significant challenge, not only in terms of signal processing but also in mechanics. Stretchable electronics are an approach designed to cover human and artificial limbs and provide wearable sensing capabilities: motion sensors distributed on the hand of neurologically impaired patients could help therapists quantify their abilities; prostheses equipped with multiple tactile sensors could enable amputees to naturally adjust their grasp force. Skin-like electronic systems have specific requirements: they must mechanically adapt to the deformations imposed by the body they equip with minimal impediment to its natural movements, while also providing sufficient electrical performance for sensor transduction and passing electrical signals and power. A metallization ensuring stable conductivity under large strains is a prerequisite to designing and assembling wearable circuits that are integrated with several types of sensors. In this work, two innovative metallization processes have been developed to enable scalable integration of multiple sensing modalities in stretchable circuits. First, stretchable micro-cracked gold (Au) thin films were interfaced with gallium indium eutectic (EGaIn) liquid metal wires. The Au films, thermally evaporated on silicone elastomer substrates, combined high sheet resistance (9 to 30 Ohm/sq) and high sensitivity to strain up to 50%. The EGaIn wires drawn using a micro-plotting setup had a low gauge factor (2) and a low sheet resistance (5 mOhm/sq). Second, a novel physical vapor deposition method to deposit of thin gallium-based biphasic (solid-liquid) films over large areas was achieved. The obtained conductors combined a low sheet resistance (0.5 Ohm/sq), a low gauge factor (~1 up to 80% strain), and a failure strain of more than 400%. They could be patterned down to 10 µm critical dimensions. Skin-like sensors for the hand were assembled using the two processes and their capabilities were demonstrated. Thin (0.5 mm) silicone strips integrating EGaIN wires and micro-cracked Au strain gauges were mounted on gloves to encode the position of a biomimetic robotic finger and a human finger. In combination with soft pressure sensors, they enabled precise grasp analysis over a limited range of motion. Then, biphasic films were micro-patterned on silicone to assemble 50 µm thin epidermal strain gauges. The strain gauges were attached on a user's finger and accurately encoded fine grasping tasks covering most of the human hand range of motion. The biphasic films were also used to power wireless MEMS pressure sensors integrated in a rubber scaffold. The device was mounted on a prosthetic hand to encode normal forces in the 0 N to 20 N range with excellent linearity. The epidermal strain sensors are currently being used to quantify the tremors of patients with Parkinson's disease. In the future, the unique properties of the biphasic films could enable advanced artificial skins integrating a high density of soft transducers and traditional high-performance circuits

CARRIER TRANSPORT IN DIRAC-BAND MATERIALS AND THEIR DEVICE PHYSICS

Ph.DDOCTOR OF PHILOSOPH