2,718 research outputs found
Pseudo-random number generators for Monte Carlo simulations on Graphics Processing Units
Basic uniform pseudo-random number generators are implemented on ATI Graphics
Processing Units (GPU). The performance results of the realized generators
(multiplicative linear congruential (GGL), XOR-shift (XOR128), RANECU, RANMAR,
RANLUX and Mersenne Twister (MT19937)) on CPU and GPU are discussed. The
obtained speed-up factor is hundreds of times in comparison with CPU. RANLUX
generator is found to be the most appropriate for using on GPU in Monte Carlo
simulations. The brief review of the pseudo-random number generators used in
modern software packages for Monte Carlo simulations in high-energy physics is
present.Comment: 31 pages, 9 figures, 3 table
A Search for Good Pseudo-random Number Generators : Survey and Empirical Studies
In today's world, several applications demand numbers which appear random but
are generated by a background algorithm; that is, pseudo-random numbers. Since
late century, researchers have been working on pseudo-random number
generators (PRNGs). Several PRNGs continue to develop, each one demanding to be
better than the previous ones. In this scenario, this paper targets to verify
the claim of so-called good generators and rank the existing generators based
on strong empirical tests in same platforms. To do this, the genre of PRNGs
developed so far has been explored and classified into three groups -- linear
congruential generator based, linear feedback shift register based and cellular
automata based. From each group, well-known generators have been chosen for
empirical testing. Two types of empirical testing has been done on each PRNG --
blind statistical tests with Diehard battery of tests, TestU01 library and NIST
statistical test-suite and graphical tests (lattice test and space-time diagram
test). Finally, the selected PRNGs are divided into groups and are
ranked according to their overall performance in all empirical tests
Pseudo-Random Number Generators for Vector Processors and Multicore Processors
Large scale Monte Carlo applications need a good pseudo-random number generator capable of utilizing both the vector processing capabilities and multiprocessing capabilities of modern computers in order to get the maximum performance. The requirements for such a generator are discussed. New ways of avoiding overlapping subsequences by combining two generators are proposed. Some fundamental philosophical problems in proving independence of random streams are discussed. Remedies for hitherto ignored quantization errors are offered. An open source C++ implementation is provided for a generator that meets these needs
Adaptation of a long-period composite random number generator for parallel processing
An efficient and statistically reliable random number generator is one of the most important requirements for effective Monte Carlo simulation. The latest trend in supercomputing being towards parallelization, a random number generator was designed that will allow the generation of several uncorrelated streams of random numbers in parallel. This is achieved by the division of one period of a good serial random number generator into intervals of uniform length, one interval per processor. The serial random number generator chosen was the Marsaglia - Zaman random number generator which is a long period composite random number generator combining a linear congruential sequence with a lagged Fibonacci sequence. The mathematical relation between distantly separated seed values in each of the sequences was considered and a method was developed to obtain values from the Marsaglia - Zaman sequence spaced from each other by the length of a specified interval called the jump distance. Program\u27s implementing the algorithm were written in C and Fortran. Seed values obtained from the programs can be used to initialize different processors to use different portions of the Marsaglia - Zaman sequence. The seed values obtained by looping through all the random numbers in a section of the Marsaglia - Zaman sequence were shown to be identical to the seed values obtained from the developed algorithm. The execution time for the developed method was shown to increase only as the order of log2(jump distance)
An Improved Design of Linear Congruential Generator based on Wordlengths Reduction Technique into FPGA
This paper exposes an improved design of linear congruential generator (LCG) based on wordlengths reduction technique into FPGA. The circuit is derived from LCG algorithm proposed by Lehmer and the previous design. The wordlengths reduction technique has been developed more in order to simplify further circuit. The proposed design based on the fact that in applications only specific input data were used. Some nets connections between blocks of the circuit are ignored or truncated. Simulations either behavior or timing have been done and the results is similar to its algorithm. Four best Xilinx chips have been chosen to extract comparison data of speed and occupied area. Further comparison of occupied area in terms of flip-flop and full adder has been made. In general, the proposed design overcome the previous published LCG circuit
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