2018 International Symposium on Computer Architecture influential paper award

The International Symposium on Computer Architecture (ISCA) recognizes every year the most influential paper published in this conference 15 years earlier, based on its impact on research, development, products or ideas. This award is sponsored by the IEEEComputer Society Technical Committee on Computer Architecture (IEEE-CS TCCA) and the ACM Special Interest Group on Computer Architecture (ACM SIGARCH). In this year’s edition, the candidate papers were those papers published in ISCA 2003 proceedings.The selection process was chaired by Antonio González. Candidate papers for the award were selected by the current year’s ISCA Pro-gram Committee. The final award selection was made by the Award Chair (Antonio González), the IEEE-CS TCCA Chair (Lieven Eeckhout) and the ACM SIGARCH Chair (Sarita Adve). The award includes an honorarium for the authors and a certificate.The 2018 award was presented to “Temperature-Aware Microarchitecture” by Kevin Skadron, Mircea R. Stan, Wei Huang, Sivakumar Velusamy, Karthik Sankaranarayanan and DavidTarjan.Peer ReviewedPostprint (author's final draft

Impact of parameter variations on circuits and microarchitecture

Parameter variations, which are increasing along with advances in process technologies, affect both timing and power. Variability must be considered at both the circuit and microarchitectural design levels to keep pace with performance scaling and to keep power consumption within reasonable limits. This article presents an overview of the main sources of variability and surveys variation-tolerant circuit and microarchitectural approaches.Peer ReviewedPostprint (published version

Understanding the thermal implications of multicore architectures

Multicore architectures are becoming the main design paradigm for current and future processors. The main reason is that multicore designs provide an effective way of overcoming instruction-level parallelism (ILP) limitations by exploiting thread-level parallelism (TLP). In addition, it is a power and complexity-effective way of taking advantage of the huge number of transistors that can be integrated on a chip. On the other hand, today's higher than ever power densities have made temperature one of the main limitations of microprocessor evolution. Thermal management in multicore architectures is a fairly new area. Some works have addressed dynamic thermal management in bi/quad-core architectures. This work provides insight and explores different alternatives for thermal management in multicore architectures with 16 cores. Schemes employing both energy reduction and activity migration are explored and improvements for thread migration schemes are proposed.Peer ReviewedPostprint (published version

Thermal Benchmark and Power Benchmark Software

Power consumption and heat dissipation become key elements in the field of high-end integrated circuits, especially those used in mobile and high-speed applications, due to their increase of transistor count and clock frequencies. Dynamic thermal management strategies have been proposed and implemented in order to mitigate heat dissipation. However, there is a lack of a tool that can be used to evaluate DTM strategies and thermal response of real life systems. Therefore, in this paper we introduce and define the concepts of thermal benchmark software and power benchmark software as a software application for run-time system level thermal and power characterizationComment: Submitted on behalf of TIMA Editions (http://irevues.inist.fr/tima-editions

Thermal aware task assignment for multicore processors using genetic algorithm

Microprocessor power and thermal density are increasing exponentially. The reliability of the processor declined, cooling costs rose, and the processor's lifespan was shortened due to an overheated processor and poor thermal management like thermally unbalanced processors. Thus, the thermal management and balancing of multi-core processors are extremely crucial. This work mostly focuses on a compact temperature model of multicore processors. In this paper, a novel task assignment is proposed using a genetic algorithm to maintain the thermal balance of the cores, by considering the energy expended by each task that the core performs. And expecting the cores’ temperature using the hotspot simulator. The algorithm assigns tasks to the processors depending on the task parameters and current cores’ temperature in such a way that none of the tasks’ deadlines are lost for the earliest deadline first (EDF) scheduling algorithm. The mathematical model was derived, and the simulation results showed that the highest temperature difference between the cores is 8 °C for approximately 14 seconds of simulation. These results validate the effectiveness of the proposed algorithm in managing the hotspot and reducing both temperature and energy consumption in multicore processors

Thermal analysis and modeling of embedded processors

This paper presents a complete modeling approach to analyze the thermal behavior of microprocessor-based systems. While most compact modeling approaches require a deep knowledge of the implementation details, our method defines a black box technique which can be applied to different target processors when this detailed information is unknown. The obtained results show high accuracy, applicability and can be easily automated. The proposed methodology has been used to study the impact of code transformations in the thermal behavior of the chip. Finally, the analysis of the thermal effect of the source code modifications can be included in a temperature-aware compiler which minimizes the total temperature of the chip, as well as the temperature gradients, according to these guidelines