Alternative implementations of a fractional order control algorithm on FPGAs

Traditionally, microprocessor and digital signal processors have been used extensively in controlling simple processes, such as direct current motors. The Field Programmable Gate Arrays (FPGA) are currently emerging as an alternative to the previously used devices in controlling all sorts of processes. The fractional order proportional-integrative control algorithm has the advantage of enhancing the closed loop performance as compared to traditional proportional-integrative controllers, but the implementation requires a higher number of computations. Implementations of control algorithms on FPGAs are nowadays much faster than implementations on microprocessors. This allows for a more accurate digital realization of the fractional order controller. The paper presents nine alternative implementations of such control algorithm on two different FPGA targets. The experimental results, considering DC motor speed control, show that double, fixed-point and integer data representation may be used efficiently for control purposes

Towards the Formalization of Fractional Calculus in Higher-Order Logic

Fractional calculus is a generalization of classical theories of integration and differentiation to arbitrary order (i.e., real or complex numbers). In the last two decades, this new mathematical modeling approach has been widely used to analyze a wide class of physical systems in various fields of science and engineering. In this paper, we describe an ongoing project which aims at formalizing the basic theories of fractional calculus in the HOL Light theorem prover. Mainly, we present the motivation and application of such formalization efforts, a roadmap to achieve our goals, current status of the project and future milestones.Comment: 9 page

Symbolic Representation for Analog Realization of A Family of Fractional Order Controller Structures via Continued Fraction Expansion

This is the author accepted manuscript. The final version is available from Elsevier via the DOI in this record.This paper uses the Continued Fraction Expansion (CFE) method for analog realization of fractional order differ-integrator and few special classes of fractional order (FO) controllers viz. Fractional Order Proportional-Integral-Derivative (FOPID) controller, FO[PD] controller and FO lead-lag compensator. Contemporary researchers have given several formulations for rational approximation of fractional order elements. However, approximation of the controllers studied in this paper, due to having fractional power of a rational transfer function, is not available in analog domain; although its digital realization already exists. This motivates us for applying CFE based analog realization technique for complicated FO controller structures to get equivalent rational transfer functions in terms of the controller tuning parameters. The symbolic expressions for rationalized transfer function in terms of the controller tuning parameters are especially important as ready references, without the need of running CFE algorithm every time and also helps in the synthesis of analog circuits for such FO controllers

Recent history of fractional calculus

This survey intends to report some of the major documents and events in the area of fractional calculus that took place since 1974 up to the present date

Comparison of the methods for discrete approximation of the fractional-order operator

In this paper we will present some alternative types of discretization methods (discrete approximation) for the fractional-order (FO) differentiator and their application to the FO dynamical system described by the FO differential equation (FDE). With analytical solution and numerical solution by power series expansion (PSE) method are compared two effective methods - the Muir expansion of the Tustin operator and continued fraction expansion method (CFE) with the Tustin operator and the Al-Alaoui operator. Except detailed mathematical description presented are also simulation results. From the Bode plots of the FO differentiator and FDE and from the solution in the time domain we can see, that the CFE is a more effective method according to the PSE method, but there are some restrictions for the choice of the time step. The Muir expansion is almost unusable

Optimizing Continued Fraction Expansion Based IIR Realization of Fractional Order Differ-Integrators with Genetic Algorithm

This is the author accepted manuscript. The final version is available from IEEE via the DOI in this record.Rational approximation of fractional order (FO) differ-integrators via Continued Fraction Expansion (CFE) is a well known technique. In this paper, the nominal structures of various generating functions are optimized using Genetic Algorithm (GA) to minimize the deviation in magnitude and phase response between the original FO element and the rationalized discrete time filter in Infinite Impulse Response (IIR) structure. The optimized filter based realizations show better approximation of the FO elements in comparison with the existing methods and is demonstrated by the frequency response of the IIR filters.This work has been supported by the Department of Science & Technology (DST), Govt. of India under the PURSE programme