Hardware simulator design for LTE applications with time-varying MIMO channels

International audienceA hardware simulator facilitates the test and validation cycles by replicating channel artifacts in a controllable and repeatable laboratory environment. This paper presents new frequency domain and time domain architectures of the digital block of a hardware simulator of MIMO propagation channels. The two architectures are tested with LTE standard, in outdoor environment, using time-varying channels. The new architectures of the digital block are presented and designed on a Xilinx Virtex-IV FPGA. Their accuracy and latency are analyzed. The result shows that the architectures produce low occupation on the FPGA and have a small relative error of the output signals

MIMO Hardware Simulator: New Digital Block Design in Frequency Domain for Streaming Signals

11 pagesInternational audienceThis paper presents a new frequency domain architecture for the digital block of a hardware simulator of MIMO propagation channels. This simulator can be used for LTE and WLAN IEEE 802.11ac applications, in indoor and outdoor environments. It accepts signals in streaming mode. A hardware simulator must reproduce the behavior of the radio propagation channel, thus making it possible to test "on table" the mobile radio equipments. The advantages are: low cost, short test duration, possibility to ensure the same test conditions in order to compare the performance of various equipments. After the presentation of the general characteristics of the hardware simulator, the new architecture of the digital block is presented and designed on a Xilinx Virtex-IV FPGA. It is tested with time-varying 3GPP TR 36.803 channel model EVA and TGn channel model E. Finally, its accuracy is analyzed

MIMO Hardware Simulator Using Standard Channel Models and Measurement Data at 2.2 and 3.5 GHz

20 pagesInternational audienceA wireless communication system can be tested either in actual conditions or by using a hardware simulator reproducing actual conditions. With a hardware simulator it is possible to freely simulate a desired type of a radio channel. This paper presents architectures for the digital block of a hardware simulator of MIMO (multiple-input multiple-output) propagation channels. This simulator can be used for LTE (long term evolution system) and WLAN (wireless local area networks) 802.11ac applications, in indoor and outdoor environments. The first architecture is appropriate for shipboard environments, while the second corresponds to outdoor-to-indoor environments and considers the wave propagation penetration within buildings. Measurements campaigns carried out at 2.2 and 3.5 GHz have been conducted to obtain the impulse responses of the channel using a MIMO channel sounder designed at IETR. The measurements are processed with an algorithm extracting the dominant paths. The architectures of the digital block are implemented on a Xilinx Virtex-IV FPGA (field programmable gate array). After the implementation of the impulse responses, the accuracy, the occupation on the FPGA and the latency of the architectures are analyzed

MIMO hardware simulator design for heterogeneous indoor environments using TGn channel models

10 pagesInternational audienceA wireless communication system can be tested either in actual conditions or by using a hardware simulator reproducing actual conditions. With a hardware simulator it is possible to freely simulate a desired type of a radio channel. This paper presents new frequency domain and time domain architectures for the digital block of a hardware simulator of Multiple-Input Multiple-Output (MIMO) propagation channels. This simulator can be used for Wireless Local Area Networks (WLAN) 802.11ac applications. It characterizes an indoor scenario using TGn channel models. After the description of the general characteristics of the hardware simulator, the new architectures of the digital block are presented and designed on a Xilinx Virtex-IV Field Programmable Gate Array (FPGA). Their accuracy, occupation on the FPGA and latency are analyzed

Hardware Simulator Design for MIMO Propagation Channel on Shipboard at 2.2 GHz

27 pagesInternational audienceA wireless communication system can be tested either in actual conditions or with a hardware simulator reproducing actual conditions. With a hardware simulator it is possible to freely simulate a desired radio channel, making it possible to test "on table" mobile radio equipments. This paper presents new architectures for the digital block of a hardware simulator ofMIMO propagation channels. This simulator can be used for LTE and WLAN IEEE 802.11ac applications, in indoor and outdoor environments. However, in this paper, specific architectures of the digital block of the simulator for shipboard environment are presented. A hardware simulator must reproduce the behavior of the radio propagation channel. Thus, ameasurements campaign has been conducted to obtain the impulse responses of the shipboard channel using a channel sounder designed and realized at IETR. After the presentation of the channel sounder, the channel impulse responses are described and implemented. Then, the new architectures of the digital block of the hardware simulator, implemented on a Xilinx Virtex-IV FPGA are presented. The accuracy, the occupation on the FPGA and the latency of the architectures are analyzed

MIMO Hardware Simulator Design for Outdoor Time-Varying Heterogeneous Channels

1-4International audienceThis paper presents a hardware simulator of Multiple- Input Multiple-Output (MIMO) propagation channels. The hardware simulator reproduces a desired radio channel and makes it possible to test "on table" different MIMO systems. A specific architecture of the digital block of the simulator is presented to characterize an outdoor scenario for Long Term Evolution (LTE) systems. An algorithm is introduced to switch between the impulse responses and to control the time variation of the delays. The new architecture is designed on a Xilinx Virtex-IV Field Programmable Gate Array (FPGA). Its accuracy, occupation on the FPGA and latency are analyzed

MIMO Hardware Simulator: Time Domain Versus Frequency Domain Architectures

19 pagesInternational audienceA hardware simulator facilitates the test and validation cycles by replicating channel artifacts in a controllable and repeatable laboratory environment. This paper presents an overview of the digital block architectures of Multiple-Input Multiple-Output (MIMO) hardware simulators. First, the simple frequency architecture is presented and analyzed. Then, an improved frequency architecture, which works for streaming mode input signals, is considered. After, the time domain architecture is described and analyzed. The architectures of the digital block are presented and designed on a Xilinx Virtex-IV Field Programmable Gate Array (FPGA). Their accuracy, occupation on the FPGA and latencies are analyzed using Wireless Local Area Networks (WLAN) 802.11ac and Long Term Evolution System (LTE) signals. The frequency and the time approaches are compared and discussed, for indoor (using TGn channel models) and outdoor (using 3GPP-LTE channel models) environments. It is shown that the time domain architecture present the best solution for the design of the architecture of the hardware simulator digital block. Finally, a 2×2 MIMO time domain architecture is described and simulated with input signal that respects the bandwidth of the considered standards