Terahertz dynamic aperture imaging at stand-off distances using a Compressed Sensing protocol

In this text, results of a 0.35 terahertz (THz) dynamic aperture imaging approach are presented. The experiments use an optical modulation approach and a single pixel detector at a stand-off imaging distance of approx 1 meter. The optical modulation creates dynamic apertures of 5cm diameter with approx 2000 individually controllable elements. An optical modulation approach is used here for the first time at a large far-field distance, for the investigation of various test targets in a field-of-view of 8 x 8 cm. The results highlight the versatility of this modulation technique and show that this imaging paradigm is applicable even at large far-field distances. It proves the feasibility of this imaging approach for potential applications like stand-off security imaging or far field THz microscopy.Comment: 9 pages, 13 figure

Approximate Computing Strategies for Low-Overhead Fault Tolerance in Safety-Critical Applications

This work studies the reliability of embedded systems with approximate computing on software and hardware designs. It presents approximate computing methods and proposes approximate fault tolerance techniques applied to programmable hardware and embedded software to provide reliability at low computational costs. The objective of this thesis is the development of fault tolerance techniques based on approximate computing and proving that approximate computing can be applied to most safety-critical systems. It starts with an experimental analysis of the reliability of embedded systems used at safety-critical projects. Results show that the reliability of single-core systems, and types of errors they are sensitive to, differ from multicore processing systems. The usage of an operating system and two different parallel programming APIs are also evaluated. Fault injection experiment results show that embedded Linux has a critical impact on the system’s reliability and the types of errors to which it is most sensitive. Traditional fault tolerance techniques and parallel variants of them are evaluated for their fault-masking capability on multicore systems. The work shows that parallel fault tolerance can indeed not only improve execution time but also fault-masking. Lastly, an approximate parallel fault tolerance technique is proposed, where the system abandons faulty execution tasks. This first approximate computing approach to fault tolerance in parallel processing systems was able to improve the reliability and the fault-masking capability of the techniques, significantly reducing errors that would cause system crashes. Inspired by the conflict between the improvements provided by approximate computing and the safety-critical systems requirements, this work presents an analysis of the applicability of approximate computing techniques on critical systems. The proposed techniques are tested under simulation, emulation, and laser fault injection experiments. Results show that approximate computing algorithms do have a particular behavior, different from traditional algorithms. The approximation techniques presented and proposed in this work are also used to develop fault tolerance techniques. Results show that those new approximate fault tolerance techniques are less costly than traditional ones and able to achieve almost the same level of error masking.Este trabalho estuda a confiabilidade de sistemas embarcados com computação aproximada em software e projetos de hardware. Ele apresenta métodos de computação aproximada e técnicas aproximadas para tolerância a falhas em hardware programável e software embarcado que provêem alta confiabilidade a baixos custos computacionais. O objetivo desta tese é o desenvolvimento de técnicas de tolerância a falhas baseadas em computação aproximada e provar que este paradigma pode ser usado em sistemas críticos. O texto começa com uma análise da confiabilidade de sistemas embarcados usados em sistemas de tolerância crítica. Os resultados mostram que a resiliência de sistemas singlecore, e os tipos de erros aos quais eles são mais sensíveis, é diferente dos multi-core. O uso de sistemas operacionais também é analisado, assim como duas APIs de programação paralela. Experimentos de injeção de falhas mostram que o uso de Linux embarcado tem um forte impacto na confiabilidade do sistema. Técnicas tradicionais de tolerância a falhas e variações paralelas das mesmas são avaliadas. O trabalho mostra que técnicas de tolerância a falhas paralelas podem de fato melhorar não apenas o tempo de execução da aplicação, mas também seu mascaramento de erros. Por fim, uma técnica de tolerância a falhas paralela aproximada é proposta, onde o sistema abandona instâncias de execuções que apresentam falhas. Esta primeira experiência com computação aproximada foi capaz de melhorar a confiabilidade das técnicas previamente apresentadas, reduzindo significativamente a ocorrência de erros que provocam um crash total do sistema. Inspirado pelo conflito entre as melhorias trazidas pela computação aproximada e os requisitos dos sistemas críticos, este trabalho apresenta uma análise da aplicabilidade de computação aproximada nestes sistemas. As técnicas propostas são testadas sob experimentos de injeção de falhas por simulação, emulação e laser. Os resultados destes experimentos mostram que algoritmos aproximados possuem um comportamento particular que lhes é inerente, diferente dos tradicionais. As técnicas de aproximação apresentadas e propostas no trabalho são também utilizadas para o desenvolvimento de técnicas de tolerância a falhas aproximadas. Estas novas técnicas possuem um custo menor que as tradicionais e são capazes de atingir o mesmo nível de mascaramento de erros

HARDWARE ATTACK DETECTION AND PREVENTION FOR CHIP SECURITY

Hardware security is a serious emerging concern in chip designs and applications. Due to the globalization of the semiconductor design and fabrication process, integrated circuits (ICs, a.k.a. chips) are becoming increasingly vulnerable to passive and active hardware attacks. Passive attacks on chips result in secret information leaking while active attacks cause IC malfunction and catastrophic system failures. This thesis focuses on detection and prevention methods against active attacks, in particular, hardware Trojan (HT). Existing HT detection methods have limited capability to detect small-scale HTs and are further challenged by the increased process variation. We propose to use differential Cascade Voltage Switch Logic (DCVSL) method to detect small HTs and achieve a success rate of 66% to 98%. This work also presents different fault tolerant methods to handle the active attacks on symmetric-key cipher SIMON, which is a recent lightweight cipher. Simulation results show that our Even Parity Code SIMON consumes less area and power than double modular redundancy SIMON and Reversed-SIMON, but yields a higher fault -detection-failure rate as the number of concurrent faults increases. In addition, the emerging technology, memristor, is explored to protect SIMON from passive attacks. Simulation results indicate that the memristor-based SIMON has a unique power characteristic that adds new challenges on secrete key extraction

Review and comparison of shearography and active thermography for nondestructive evaluation

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Micro-slotting technique for measurement of local residual stress in metallic materials

Micro-slotting, a micro-scale relaxation residual stress measurement technique, has been shown in recent years to be a reliable method for measuring local residual stresses in metallic materials. This technique employs an SEM-focused ion beam system for milling and imaging, digital image correlation software to track displacements due to residual stress relaxation, and finite element analysis for interpolation of the original local stress state. In this research, a micro-slotting procedure was established using finite element models and was used to obtain sub-surface residual stress measurements on machined and shot peened planar Ti-6Al-4V samples. These measurements were compared to macro-scale XRD residual stress measurements, and discrepancies between the results of the two techniques were discussed. The measurement procedure was then applied to as-drilled and cold-expanded holes for near-edge measurement of residual hoop stresses. Comparison of the measured residual stress distributions with plastic strain data obtained using EBSD allowed for interpretation of fatigue life differences and crack growth behavior. Next, a grid of measurements was performed in a sub-surface region of the shot peened sample, and EBSD was used to acquire microstructure information in the measurement regions. Comparison of the measured displacements and interpolated residual stress values with the local microstructure allowed for novel qualitative observations regarding residual stress orientation and microstructure effects on the measured residual stress relaxation. Last, the use of the micro-slotting technique was demonstrated for measurement of local residual stress in additive manufactured components. Series of measurements were performed across two interfaces in a complex Ti-6Al-4V build, and post-measurement optical microscopy allowed for analysis of the residual stress data at the microstructural level --Abstract, page iv

Sequential damage study induced in fiber reinforced composites by shear and tensile stress using a newly developed Arcan fixture

This work presents the application of both uniaxial and bi-axial in-plane loads to unidirectional carbon fiber reinforced polymer laminates using a newly developed Arcan fixture, which is a reliable experimental set-up to obtain a uniform shear stress field in a butterfly specimen. The set-up can be used for both damage model validation and parameters identification at various fiber orientations while using the same specimens. A sequential damage study was completed to highlight the influence of diffused damage induced in pure shear on the fiber direction tensile behavior of the laminate. This was accomplished by applying load on the specimens in two steps: (i) the pure shear step and then unloading at approximately 70% of the shear failure strength, (ii) in the tensile step until final failure. A clear drop in the tensile behavior of the laminate was observed by the diffused damage induced in the first loading step of pure shear. The experimental study is also supplemented with numerical simulations using a nonlinear elasto-plastic coupled damage constitutive law by employing Puck’s failure theory for mesodamage activation. In addition to the damage pattern, the non-linear mechanical behavior in shear is predicted and found in good correspondence with the experimental results

Digital workflow for the design, construction and management of natural bamboo pole structures

The ever-growing global urbanisation has been lately associated with a negative environmental impact caused by the energy consumption and carbon dioxide emissions that the building industry has been responsible for. To turn the tide, the building industry needs to transition from industrialised, non-renewable materials, to natural, sustainable and renewable ones. Bamboo poles are currently the most promising resource due to their relatively good environmental credentials, in comparison with industrialised materials. However, there are significant technical challenges that have prevented bamboo poles from their formal integration into the building industry. One of the main challenges is associated with the inherent variability of the geometric, physical and mechanical properties and the impact that this produces on the reliability of bamboo structures. This research focuses on the development of a digital workflow that tackles the inherent variability of bamboo poles through the quantification of material properties on every single pole and thus, provides the fundamental basis to ensure structural reliability. Reverse engineering methodologies supported by modern digital technologies, such as 3D scanners and robotic fabrication, were developed to intensively measure the geometric, physical and mechanical properties of a stock of bamboo poles, regardless their species, age or size. These methodologies were then integrated and implemented into a proof-of-concept digital workflow that quantifies the variability and uses the resulting data to design and construct a reciprocal frame bamboo structure. This research sets out the initial steps towards an alternative approach that allows the design and construction of reliable bamboo structures through the management of their digital data, which in turn, will allow bamboo poles to competing with industrialised construction materials

Correlative Framework of Techniques for the Inspection, Evaluation, and Design of Micro-electronic Devices

Trillions of micro- and nano-electronic devices are manufactured every year. They service countless electronic systems across a diverse range of applications ranging from civilian, military, and medical sectors. Examples of these devices include: packaged and board-mounted semiconductor devices such as ceramic capacitors, CPUs, GPUs, DSPs, etc., biomedical implantable electrochemical devices such as pacemakers, defibrillators, and neural stimulators, electromechanical sensors such as MEMS/NEMS accelerometers and positioning systems and many others. Though a diverse collection of devices, they are unified by their length scale. Particularly, with respect to the ever-present objectives of device miniaturization and performance improvement. Pressures to meet these objectives have left significant room for the development of widely applicable inspection and evaluation techniques to accurately and reliably probe new and failed devices on an ever-shrinking length scale. Presented in this study is a framework of correlative, cross-modality microscopy workflows coupled with novel in-situ experimentation and testing, and computational reverse engineering and modeling methods, aimed at addressing the current and future challenges of evaluating micro- and nano-electronic devices. The current challenges are presented through a unique series of micro- and nano-electronic devices from a wide range of applications with ties to industrial relevance. Solutions were reached for the challenges and through the development of these workflows, they were successfully expanded to areas outside the immediate area of the original project. Limitations on techniques and capabilities were noted to contextualize the applicability of these workflows to other current and future challenges