A high-Tc 4-bit periodic threshold analog-to-digital converter

Using ramp-type Josephson junctions a 4-bit periodic threshold ADC has been designed, fabricated and tested. Practical design constraints will be discussed in terms of noise immunity, flux flow, available technology, switching speed etc. In a period of four years we fabricated about 100 chips in order to bring the technology to an acceptable level and to test various designs and circuit layouts. This resulted in a basic comparator that is rather insensitive to the stray field generated by the analog input signal or variations in mask alignment during fabrication. The input signal is fed into the comparators using a resistive divider network. Full functionality at low frequencies has been demonstrate

Vidutinių dažnių 5G belaidžių tinklų galios stiprintuvų tyrimas

This dissertation addresses the problems of ensuring efficient radio fre-quency transmission for 5G wireless networks. Taking into account, that the next generation 5G wireless network structure will be heterogeneous, the device density and their mobility will increase and massive MIMO connectivity capability will be widespread, the main investigated problem is formulated – increasing the efficiency of portable mid-band 5G wireless network CMOS power amplifier with impedance matching networks. The dissertation consists of four parts including the introduction, 3 chapters, conclusions, references and 3 annexes. The investigated problem, importance and purpose of the thesis, the ob-ject of the research methodology, as well as the scientific novelty are de-fined in the introduction. Practical significance of the obtained results, defended state-ments and the structure of the dissertation are also included. The first chapter presents an extensive literature analysis. Latest ad-vances in the structure of the modern wireless network and the importance of the power amplifier in the radio frequency transmission chain are de-scribed in detail. The latter is followed by different power amplifier archi-tectures, parameters and their improvement techniques. Reported imped-ance matching network design methods are also discussed. Chapter 1 is concluded distinguishing the possible research vectors and defining the problems raised in this dissertation. The second chapter is focused around improving the accuracy of de-signing lumped impedance matching network. The proposed methodology of estimating lumped inductor and capacitor parasitic parameters is dis-cussed in detail provi-ding complete mathematical expressions, including a summary and conclusions. The third chapter presents simulation results for the designed radio fre-quency power amplifiers. Two variations of Doherty power amplifier archi-tectures are presented in the second part, covering the full step-by-step de-sign and simulation process. The latter chapter is concluded by comparing simulation and measurement results for all designed radio frequency power amplifiers. General conclusions are followed by an extensive list of references and a list of 5 publications by the author on the topic of the dissertation. 5 papers, focusing on the subject of the discussed dissertation, have been published: three papers are included in the Clarivate Analytics Web of Sci-ence database with a citation index, one paper is included in Clarivate Ana-lytics Web of Science database Conference Proceedings, and one paper has been published in unreferred international conference preceedings. The au-thor has also made 9 presentations at 9 scientific conferences at a national and international level.Dissertatio

High frequency, single/dual phases, large AC/DC signal power characterization for two phase on-silicon coupled inductors

In this work, a new set-up is presented to characterize the large signal electrical parameters of on-Silicon integrated coupled inductors for Power Supply on Chip. The proposed system is suitable to perform the measurements under different large-signal test conditions given by the dc bias current up to 2 A and ac current through one or both windings, with amplitudes ranging from 0 A to 0.5 A at frequencies up to 120 MHz. Since a key issue when measuring at high-frequencies is the error due to the attenuation and time skew between the channels, an additional test is performed to characterize the measurement system and compensate the voltage and current waveforms

Near-Field UHF RFID Transponder with a Screen-Printed Graphene Antenna

As a method of producing RFID tags, printed graphene provides a low-cost and eco-friendly alternative to the etching of aluminum or copper. The high resistivity of graphene, however, sets a challenge for the antenna design. In practice, it has led to using very large antennas in the UHF RFID far field tags demonstrated before. Using inductive near field as the coupling method between the reader and the tag is an alternative to the radiating far field also at UHF. The read range of such a near field tag is very short, but, on the other hand, the tag is extremely simple and small. In this paper, near field UHF RFID transponders with screen-printed graphene antennas are presented and the effect of the dimensions of the tag and the attachment method of the microchip studied. The attachment of the microchip is an important step of the fabrication process of a tag that has its impact on the final cost of a tag. Of the tags demonstrated, even the smallest one with the outer dimensions of 21 mm * 18 mm and the chip attached with isotropic conductive adhesive (ICA) was readable from a distance of 10 mm with an RF power marginal of 19 dB, which demonstrates that an operational and small graphene-based UHF RFID tag can be fabricated with low-cost industrial processes.Comment: 8 pages, 9 figures. IEEE Transactions on Components, Packaging and Manufacturing Technology, 201

Rocket Telemetry System

The goal of this research project is to design a system for the Akronauts Rocket Design Team which will transmit flight data in real-time to a ground station. The data will be collected from various sensors (altitude, acceleration, GPS, etc). This data will be transmitted wirelessly and in real-time to a receiving station. Calculations and visualizations will be taken from the data, which will help the team improve their rocket designs. Additionally, GPS data will be useful to locate the rocket post-flight. Challenges will include the need for the system to transmit over the range of the rocket’s flight and to operate for the duration of the flight without needed recharged. Additionally, the rocket team desires a solution that can be operated without a license, limiting the frequencies that can be utilized

A 2.4 GHz CMOS class-F power amplifier with reconfigurable load-impedance matching

© 2019 IEEE. Personal use of this material is permitted. Permission from IEEE must be obtained for all other uses, in any current or future media, including reprinting/republishing this material for advertising or promotional purposes, creating new collective works, for resale or redistribution to servers or lists, or reuse of any copyrighted component of this work in other works.A novel reconfigurable CMOS class-F power amplifier (PA) at 2.4 GHz is proposed in this paper. It is able to match the output load variations mainly due to the effect of hand and head on a mobile phone. The effect of load variation on power-added efficiency (PAE), output power, and distortion is compensated by reconfiguring the output network using an impedance tuner. The tuner controls the output matching at fundamental frequency without affecting the class-F harmonic tuning up to 3rd harmonic. To the best of our knowledge, this is the first design of a CMOS class-F PA addressed to compensate the effect of load variation. Measurement results for 50 ohm load impedance show a maximum PAE of 26% and maximum output power of 19.2 dBm. The measured total harmonic distortion is 4.9%. Measurement results for load values other than 50 ohm show that PAE increases from 6.5% (not-tuned PA) up to 19.9% (tuned PA) with the same output power (19.2 dBm). Tuning also reduces the adjacent-channel leakage ratio by 5 dB and the spectral regrowth of a Wi-Fi signal at the PA output. The size of the fabricated chip is 1.6 mm × 1.6 mm.Peer ReviewedPostprint (author's final draft

AN INVESTIGATION INTO QUASI-TUNABLE RF PASSIVE CIRCUIT DESIGN

Modern wireless electronic circuit design is continually challenged by the needs to reduce circuit size, and to also function reliably with lower power levels. To that end, two aspects of RFIC circuit design and technology have gained great interest, i.e. RF MEMS switching technology, and RF MEMS passive component development. MEMS (Micro-Electromechanical Systems) technology, originally developed for the defense industry, has been in development since the 1970s, and today enjoys wide range of utilization, from the defense industry to the automotive industry. Spiral inductors used in RFIC circuits, e.g. silicon technology, are ubiquitous in wireless RFIC applications. The tradeoff with low cost fabrication processes are inductors with very low quality factors which greatly affect the losses in RF passive circuits, and hence their performance. Research in the area of RF MEMS inductors has shown promise for components with significantly higher Q, and hence has the potential for wide range of benefits in both tunable and non-tunable applications. Electronic design environments such as Agilent ADS provide automated tools for generating passive circuits, e.g. band-pass filters, based on a specified desired frequency response and circuit topology. However, they typically do not incorporate component Q, which can greatly affect the actual circuit’s performance, into the results of their suggested designs. With this in mind, the development of a systematic approach to predict the relationship between passive circuit component’s Q and its S-parameters can be of great benefit to the RF electronic circuit designer, especially in the area of wireless passive circuits. The first of part of this work develops an analytical approach, using mesh-current analysis to derive the relationship between inductor Q, and the S-parameters of a generalized passive RF circuit. For the analysis, the S-parameters of a 90ᵒ Lumped Element Hybrid coupler are derived in terms of even mode and odd mode coupler responses using mathematical functions that relate the S-parameters of each circuit to their associated even mode Q, and odd mode Q factors The results of this research demonstrate that work can still be done in the area of circuit analysis to extend the capability of common passive circuit design tools to include the effects of component Q on the design results, e.g. filter design tools which commonly utilize simple LC circuits as building blocks for more complicated filters. The second part of this work investigates the performance of different RF switching technologies, i.e. MEMS Switching vs. RF PIN Diode, to a 2-3 GHz quasi-tunable RFIC 90ᵒ Lumped Element Hybrid Coupler design utilizing high Q three-dimensional air-core solenoidal MEMS inductors, and IPD Capacitors. The results of this investigation demonstrated the following: The concept of a tunable RFIC Lumped Element Hybrid coupler in the 2-3 GHz range is feasible, and if implement with high Q inductors, comparable to that of off-the-shelf 90° Hybrid Couplers in terms of return loss and isolation performance, but in a much small area, ~ one fiftieth of the surface area at 2 GHz. RF PIN Diodes at low current levels can be sufficient when only the phase imbalance of the coupler is critical. If either magnitude loss or magnitude balance is critical, then RF MEMS switching may provide a better alternative. RF PIN Diode forward bias resistance approaches that of DC contact switch resistance at higher current levels, e.g. 60 mA, and hence their power consumption becomes the main issue in determining the technology best suited for this application. The concept of a ground switched tapped capacitor bank was developed to maximize the switched capacitor Q. This approach optimized the coupler performance compared to a signal switched design. In the third part of this work, a selectable dual-band 630 MHz and 900 MHz PCB lumped element hybrid coupler is designed, fabricated, and measured. The inductors and capacitors are fabricated with only printed conductors and metal patches respectively on a four-layer PCB. The S-parameters of the measured results and simulations correlated extremely well after adjustment of the substrate dielectric thicknesses used for the simulation of the capacitors. This work demonstrates that lumped element passive components can be cheaply fabricated in PCB technology that are useful in the frequency range of 600 MHZ to 1300 MHZ, partially covering the GSM and LTE bands, that can be used in quasi-tunable wireless PCB applications, e.g. base stations, while also reducing circuit size in place of commonly found in microstrip distributed circuits

Study and design of topologies and components for high power density DC-DC converters

Size reduction of low power electronic DC–DC converters is a topic of major interest for power electronics which requires the study and design of circuits and components working under redefined requirements. For this purpose, novel circuital topologies provide advantages in terms of power density increment, especially where a single chip design is feasible. These concepts have been applied to design and implement an integrated high step-down multiphase buck converter and to study the miniaturization of a stackable fiflyback architecture. Particular attention has been dedicated to power inductors, focusing on the modeling and measurement of magnetic materials’ hysteresis and core losses