Design and implementation of a holistic framework for data integration in industrial machine and sensor networks

Digitalization and connectivity trends in industrial plants and production equipment create vast and heterogeneous networks of data sources, data sinks and various communication protocols. Data fusion and evaluation of these resources result in high costs for data integration and maintenance. Therefore, we propose a new framework, called MyGateway, enabling effortless integration of heterogeneous data sources, their fusion within the framework and publication to data sinks as needed. For easy integration, deployment, and expansion of the framework we provide an implementation in JAVA using open-source adapters for common industrial protocols and a simple API for usage in user specified setups

An architecture for converging reconfigurable radio systems

Since mobile telecommunication systems were rst introduced in the early 1980s they have become a pervasive part of modern life, with an estimated 85% of the global population believed to be in possession of a mobile communications device. To address the ever-increasing demand for fast ubiquitous provision of multimedia and data services, new Radio Access Technologies (RATs) capable of meeting those demands are constantly being developed and standardised. Currently the fourth generation of RATs is being deployed by network operators around the world, with standards bodies already working to develop and standardise even more advanced RATs. The introduction of any new, and often upgraded, RATs almost always requires network operators to purchase new hardware systems capable of supporting the new RATs, which must then be integrated with the plethora of RATs already present in the network operator's heterogeneous Radio Access Network (RAN). This process is costly and poses risks for network operators, as they must rst invest signi cant amounts of capital on new network hardware and then they have to convince their subscribers to purchase new mobile devices which are capable of supporting the new RAT. Recon gurable Radio Systems (RRSs) are a relatively new approach to developing, implementing and managing RATs within a RAN. A RRS di ers from a traditional radio system, in that each RAT is de ned in software which can be reused across multiple generic hardware platforms. Many RRSs also provide the functionality to manage and control the dynamic implementation of di erent RATs in network elements throughout a RAN. Although RRSs are the subject of numerous research e orts, there is currently no unifying approach or set of requirements for an RRS architecture or framework. In- stead various researchers focus their e orts on speci c topics relating to RRS, such as the recon gurable management system, or how RATs are modelled and implemented in software. This lack of formal standardisation or approach to developing RRSs represents a hindrance to the widespread adoption of RRSs

Building Programmable Wireless Networks: An Architectural Survey

In recent times, there have been a lot of efforts for improving the ossified Internet architecture in a bid to sustain unstinted growth and innovation. A major reason for the perceived architectural ossification is the lack of ability to program the network as a system. This situation has resulted partly from historical decisions in the original Internet design which emphasized decentralized network operations through co-located data and control planes on each network device. The situation for wireless networks is no different resulting in a lot of complexity and a plethora of largely incompatible wireless technologies. The emergence of "programmable wireless networks", that allow greater flexibility, ease of management and configurability, is a step in the right direction to overcome the aforementioned shortcomings of the wireless networks. In this paper, we provide a broad overview of the architectures proposed in literature for building programmable wireless networks focusing primarily on three popular techniques, i.e., software defined networks, cognitive radio networks, and virtualized networks. This survey is a self-contained tutorial on these techniques and its applications. We also discuss the opportunities and challenges in building next-generation programmable wireless networks and identify open research issues and future research directions.Comment: 19 page

The SATIN component system - a metamodel for engineering adaptable mobile systems

Mobile computing devices, such as personal digital assistants and mobile phones, are becoming increasingly popular, smaller, and more capable. We argue that mobile systems should be able to adapt to changing requirements and execution environments. Adaptation requires the ability-to reconfigure the deployed code base on a mobile device. Such reconfiguration is considerably simplified if mobile applications are component-oriented rather than monolithic blocks of code. We present the SATIN (system adaptation targeting integrated networks) component metamodel, a lightweight local component metamodel that offers the flexible use of logical mobility primitives to reconfigure the software system by dynamically transferring code. The metamodel is implemented in the SATIN middleware system, a component-based mobile computing middleware that uses the mobility primitives defined in the metamodel to reconfigure both itself and applications that it hosts. We demonstrate the suitability of SATIN in terms of lightweightedness, flexibility, and reusability for the creation of adaptable mobile systems by using it to implement, port, and evaluate a number of existing and new applications, including an active network platform developed for satellite communication at the European space agency. These applications exhibit different aspects of adaptation and demonstrate the flexibility of the approach and the advantages gaine

A unified hardware/software runtime environment for FPGA-based reconfigurable computers using BORPH

Fulltext linkThis paper explores the design and implementation of BORPH, an operating system designed for FPGA-based reconfigurable computers. Hardware designs execute as normal UNIX processes under BORPH, having access to standard OS services, such as file system support. Hardware and software components of user designs may, therefore, run as communicating processes within BORPH's runtime environment. The familiar language independent UNIX kernel interface facilitates easy design reuse and rapid application development. To develop hardware designs, a Simulink-based design flow that integrates with BORPH is employed. Performances of BORPH on two on-chip systems implemented on a BEE2 platform are compared. © 2008 ACM.link_to_subscribed_fulltex

Evaluation of C# for a station controller in a reconfigurable manufacturing system

Thesis (MEng)--Stellenbosch University, 2016.ENGLISH ABSTRACT: Reconfigurable manufacturing systems (RMSs) are aimed at dynamic situations, such as varying products, variations in production volume requirements and changes in available resources. RMSs distinguish themselves from other types of manufacturing systems in that they can quickly adapt to a new product being introduced without the need for long reconfiguration times, and can therefore cost effectively produce smaller batch sizes. RMSs in research environments in most cases used Agent Based Control (ABC), but the main automation vendors in the industry do not support ABC. This inhibits the acceptance of RMSs by the industry. For this research, C# was investigated as an alternative to ABC, since C# can provide for many of the functionalities of agents, yet is a more widely known language than ABC. Furthermore, C# is an object-oriented programming (OOP) language and thus possesses characteristics aligned with the core characteristics of reconfigurable manufacturing systems. The focus of this thesis is to determine the suitability of C# for the development of the control software for RMSs. This thesis describes the design, implementation, testing and evaluation of a reconfigurable stacking and buffering station. The controller was implemented in C# and made use of the ADACOR architecture. The physical test-setup was built to evaluate the reconfigurability of the controller in a series of reconfiguration experiments. The thesis showed that the controller could handle all the hardware interfaces without problems, since C# generally simplifies the task of hardware interfacing. OOP characteristics helped making developing and maintaining the code an intuitive task. The stacking station handled all communication with the cell controller correctly, which proved that it could easily be integrated into a distributed control architecture.AFRIKAANSE OPSOMMING: "Reconfigurable manufacturing systems" (RMSs) is gemik op dinamiese situasies, soos veranderende produkte, veranderings in produksievolumes en veranderinge in beskikbare hulpbronne. RMSs onderskei hulself van ander tipes vervaardigingstelsels deurdat hulle vinnig kan aanpas by nuwe produkte wat bekendgestel word sonder dat dit nodig is om die stelsel eers lank te herkonfigureer, en kan sodoende kleiner lotgroottes koste-effektief produseer. RMSs maak in navorsingmilieus meestal gebruik van "Agent Based Control" (ABC), maar die hoof outomatisasie-verkopers in die industrie ondersteun nie ABC nie. Dit belemmer die aanvaarding van RMSs in die industrie. Vir hierdie navorsing is C# as 'n alternatief vir ABC ondersoek omdat C# baie van die funksionaliteite kan voorsien wat aangetref word in ABC, maar terselfdertyd 'n meer bekende taal is as ABC. Verder is C# 'n objek-georiënteerde programmerings- (OOP) taal en beskik dus oor karakteristieke wat in lyn is met die kernkarakteristieke van RMSs. Die fokus van hierdie tesis is die geskiktheid van C# vir die ontwikkeling van beheersagteware vir 'n RMS. Hierdie tesis beskryf die ontwerp, implementering, toetsing en evaluering van 'n herkonfigureerbare stapel- en bufferstasie. Die beheerder was in C# geïmplementeer en het van die ADACOR-argitektuur gebruik gemaak. Die fisiese toets-opstelling was gebou om die herkonfigureerbaarheid van die beheerder te kan evalueer aan hand van 'n reeks herkonfigureringseksperimente. Die tesis het gewys dat die beheerder sonder probleme alle hardeware-intervlakke kon hanteer, omdat C# dit oor die algemeen vergemaklik om met hardeware te kommunikeer. OOP karakteristieke was nuttig om die ontwikkeling en instandhouding van die program intuïtief te maak. Die stapelstasie het alle kommunikasie met die selbeheerder korrek hanteer, wat bewys het dat dit probleemloos in 'n verspreide beheerargitektuur opgeneem kon word

An agent based layered framework to facilitate intelligent Wireless Sensor Networks

Includes bibliographical references (leaves 78-80).Wireless Sensor Networks (WSNs) are networks of small, typically low-cost hardware devices which are able to sense various physical phenomenon in their surrounding environments. These simple nodes are also able to perform basic processing and wirelessly communicate with each other. The power of these networks arise from their ability to combine their many vantage points of the individual nodes and to work together. This allows for behaviour to emerge which is greater than the sum of the ability of all the nodes in the network. The complexity of these networks varies based on the application domain and the physical phenomenon being sensed. Although sensor networks are currently well understood and used in a number of real world applications, a number limitations still exit. This research aims to overcome a number of issues faced by current WSNs, the largest of which is their monolithic or tightly coupled structure which result in static and application specific WSNs. We aim to overcome these issues by designing a dynamically reconfigurable system which is application neutral. The proposed system is also required to facilitate intelligence and be sufficiently efficient for low power sensor node hardware

An FPGA implementation of an investigative many-core processor, Fynbos : in support of a Fortran autoparallelising software pipeline

Includes bibliographical references.In light of the power, memory, ILP, and utilisation walls facing the computing industry, this work examines the hypothetical many-core approach to finding greater compute performance and efficiency. In order to achieve greater efficiency in an environment in which Moore’s law continues but TDP has been capped, a means of deriving performance from dark and dim silicon is needed. The many-core hypothesis is one approach to exploiting these available transistors efficiently. As understood in this work, it involves trading in hardware control complexity for hundreds to thousands of parallel simple processing elements, and operating at a clock speed sufficiently low as to allow the efficiency gains of near threshold voltage operation. Performance is there- fore dependant on exploiting a new degree of fine-grained parallelism such as is currently only found in GPGPUs, but in a manner that is not as restrictive in application domain range. While removing the complex control hardware of traditional CPUs provides space for more arithmetic hardware, a basic level of control is still required. For a number of reasons this work chooses to replace this control largely with static scheduling. This pushes the burden of control primarily to the software and specifically the compiler, rather not to the programmer or to an application specific means of control simplification. An existing legacy tool chain capable of autoparallelising sequential Fortran code to the degree of parallelism necessary for many-core exists. This work implements a many-core architecture to match it. Prototyping the design on an FPGA, it is possible to examine the real world performance of the compiler-architecture system to a greater degree than simulation only would allow. Comparing theoretical peak performance and real performance in a case study application, the system is found to be more efficient than any other reviewed, but to also significantly under perform relative to current competing architectures. This failing is apportioned to taking the need for simple hardware too far, and an inability to implement static scheduling mitigating tactics due to lack of support for such in the compiler

Bridging OPC UA and DPWS for Industrial SOA

Two web-service based specifications, OPC Unified Architecture (OPC UA) and Devices Profile for Web Services (DPWS), have been proposed by various researchers and organizations as possible enabling technologies for an event-driven Service Oriented Architecture for monitoring and control in manufacturing applications. This paper aims to propose and demonstrate an approach for bridging these two technologies in a way that is applicable in existing industrial applications. A merger between OPC UA and DPWS that effectively combines their complementary strengths could help pave the path toward future industrial event-driven SOA applications, with the inherent modularity, agility, and interoperability envisioned by researchers today. A representation of DPWS devices, services, operations and events in the OPC UA data model is proposed, and a DPWS Module is developed for Ignition, a commercially available HMI/SCADA and MES platform with integrated OPC UA Server. The module discovers DPWS devices in a local network, creates the representation in the address space, and handles subscriptions, input and output parameter values, and invoking operations. A Complex Event Processing component based on Microsoft’s StreamInsight is also integrated with the system, input and output adapters exposing web service interfaces. The system prototype developed will be used as the base for a use case demonstrator in the European Commission’s Framework Package 7 Project, “Architecture for Service-Oriented Process Monitoring and Control (IMC AESOP).” The project aims to develop a system of systems approach for monitoring and control, based on SOA for very large-scale systems in the process industries