A machine independente wCET predictor for microcontrollers and DSPs

This paper describes a method for analyzing and predicting the timing properties of a program fragment. The paper first presents a little language implemented to describe a processor’s architecture and a static WCET estimation method is then presented. The timing analysis starts by compiling a processor’s architecture program followed by the disassembling of the program fragment. The assembler program is then decomposed into basic blocks and a call graph is generated. These data are later used to evaluate the pipeline hazards and cache miss that penalize the real-time performance. Finally, some experimental results of using the developed tool to predict the WCET of code segments with some Intel microcontroller are presented. execution, the desired time will be found by averaging. Even with this approach, if you want an accurate measurement, a number of complications such as, compiler optimizations, operating system distortions, must be solved. Nevertheless, these approaches are unrealistic since they ignore the system interferences and the effects of cache and pipeline, two very important features of some processors that can be used in our hardware architecture. Shaw [1], Puschner [2], and Mok [3], developed some very elaborated methodology for WCET estimation, but none of them takes into account the effects of cache an

Estimation of WCET using a little language to describe microcontrollers and DSPs architectures

A method for analysing and predicting the timing properties of a program fragment will be described. First a little language implemented to describe a processor’s architecture is presented followed by the presentation of a new static WCET estimation method. The timing analysis starts by compiling a processor’s architecture program followed by the disassembling of the program fragment. After sectioning the assembler program into basic blocks call graphs are generated and these data are later used to evaluate the pipeline hazards and cache miss that penalize the real-time performance. Some experimental results of using the developed tool to predict the WCET of code segments using some Intel microcontroller are presented. Finally, some conclusions and future work are presented

Policies of System Level Pipeline Modeling

Pipelining is a well understood and often used implementation technique for increasing the performance of a hardware system. We develop several SystemC/C++ modeling techniques that allow us to quickly model, simulate, and evaluate pipelines. We employ a small domain specific language (DSL) based on resource usage patterns that automates the drudgery of boilerplate code needed to configure connectivity in simulation models. The DSL is embedded directly in the host modeling language SystemC/C++. Additionally we develop several techniques for parameterizing a pipeline's behavior based on policies of function, communication, and timing (performance modeling)

Detecting Pipeline Structural Hazards Quickly

This paper describes a method for detecting structural hazards 5--80 times faster than its predecessors, which generally have simulated the pipeline at compile time. It accepts a compact specification of the pipeline and creates a finitestate automaton that can detect structural hazards in one table lookup per instruction. The automaton maintains an integer state that encodes all potential structural hazards for all instructions in the pipe. It accepts an instruction type and a state and either reports a hazard or produces the state that folds in the new instruction and advances the pipeline by one cy

Estudo e desenvolvimento de sistemas de geração de back-ends do processo de compilação

O back-end de um compilador agrupa todo um conjunto de tarefas cuja implementação é intrinsecamente dependente das características do processador para o qual se pretende gerar código. A rápida evolução da industria dos processadores e microcontroladores levou esta área de desenvolvimento de software a realizar fortes investimentos na pesquisa de meios que permitissem dar uma resposta rápida e de qualidade à procura verificada. É dentro deste contexto que surge o tema e o trabalho desenvolvido ao longo desta tese de mestrado, que pretende de alguma forma sintetizar o que já se encontra feito e propor algumas soluções, que apesar de individualmente não serem originais permitem, quando em conjunto, vislumbrar alternativas aos sistemas já concebidos e avançar um pouco mais na área de investigação dos geradores de código final e optimizadores. O trabalho aqui descrito é extremamente abrangente para uma qualquer tese, cobrindo todas as áreas do processo de compilação a partir da análise semântica até à geração do código máquina, passando pela apresentação de modelos de compiladores, representação da informação, sistemas de análise de fluxo de controlo e de dados, alocação de registos local e global, selecção de instruções e geração de selectores, optimização de código a vários níveis, etc. É ainda de referir que do trabalho desenvolvido resultou o Back-End Development System, que como o nome indica é um sistema de apoio ao desenvolvimento das tarefas de back-end de um compilador. The back-end of a compiler gathers a group of tasks, whose implementation is directly dependent on the features of the processor for which machine code is intended to be generated. The fast evolution of processors and micro-controllers industry lead this area of software development to perform strong investments in the research of means, which would give a fast and proper answer to the demand. It is within this context that the theme and the work carried on through this thesis emerges. The aim of this work is to synthesise what has already been done and to give some solutions which, although individually not original, when put together, they allow alternatives to the pre-established systems and move on a little further in the research of generators of final code and optimisers. This work is extremely wide-ranging, covering all areas of the compiling process, going from the semantic analyses till the generation of machine code. It also contains the presentation of models of compilers, representation of information, control and data flow analysis, local and global registers allocation, instructions selection and generation of selectors, code optimisation at several levels, etc. It is also important to refer that from the development work emerged the Back-End Development System, which, as the name itself indicates, is a software system to support development of back-end tasks of a compiler

Estudo e desenvolvimento de sistemas de geração de back-ends do processo de compilação

O back-end de um compilador agrupa todo um conjunto de tarefas cuja implementação é intrinsecamente dependente das características do processador para o qual se pretende gerar código. A rápida evolução da industria dos processadores e microcontroladores levou esta área de desenvolvimento de software a realizar fortes investimentos na pesquisa de meios que permitissem dar uma resposta rápida e de qualidade à procura verificada. É dentro deste contexto que surge o tema e o trabalho desenvolvido ao longo desta tese de mestrado, que pretende de alguma forma sintetizar o que já se encontra feito e propor algumas soluções, que apesar de individualmente não serem originais permitem, quando em conjunto, vislumbrar alternativas aos sistemas já concebidos e avançar um pouco mais na área de investigação dos geradores de código final e optimizadores. O trabalho aqui descrito é extremamente abrangente para uma qualquer tese, cobrindo todas as áreas do processo de compilação a partir da análise semântica até à geração do código máquina, passando pela apresentação de modelos de compiladores, representação da informação, sistemas de análise de fluxo de controlo e de dados, alocação de registos local e global, selecção de instruções e geração de selectores, optimização de código a vários níveis, etc. É ainda de referir que do trabalho desenvolvido resultou o Back-End Development System, que como o nome indica é um sistema de apoio ao desenvolvimento das tarefas de back-end de um compilador. The back-end of a compiler gathers a group of tasks, whose implementation is directly dependent on the features of the processor for which machine code is intended to be generated. The fast evolution of processors and micro-controllers industry lead this area of software development to perform strong investments in the research of means, which would give a fast and proper answer to the demand. It is within this context that the theme and the work carried on through this thesis emerges. The aim of this work is to synthesise what has already been done and to give some solutions which, although individually not original, when put together, they allow alternatives to the pre-established systems and move on a little further in the research of generators of final code and optimisers. This work is extremely wide-ranging, covering all areas of the compiling process, going from the semantic analyses till the generation of machine code. It also contains the presentation of models of compilers, representation of information, control and data flow analysis, local and global registers allocation, instructions selection and generation of selectors, code optimisation at several levels, etc. It is also important to refer that from the development work emerged the Back-End Development System, which, as the name itself indicates, is a software system to support development of back-end tasks of a compiler

SPIM S20: A MIPS R2000 simulator.

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