A Reactive and Cycle-True IP Emulator for MPSoC Exploration

The design of MultiProcessor Systems-on-Chip (MPSoC) emphasizes intellectual-property (IP)-based communication-centric approaches. Therefore, for the optimization of the MPSoC interconnect, the designer must develop traffic models that realistically capture the application behavior as executing on the IP core. In this paper, we introduce a Reactive IP Emulator (RIPE) that enables an effective emulation of the IP-core behavior in multiple environments, including bitand cycle-true simulation. The RIPE is built as a multithreaded abstract instruction-set processor, and it can generate reactive traffic patterns. We compare the RIPE models with cycle-true functional simulation of complex application behavior (tasksynchronization, multitasking, and input/output operations). Our results demonstrate high-accuracy and significant speedups. Furthermore, via a case study, we show the potential use of the RIPE in a design-space-exploration context

A high-resolution time interpolator based on a delay locked loop and an RC delay line

An architecture for a time interpolation circuit with an rms error of ~25 ps has been developed in a 0.7- mu m CMOS technology. It is based on a delay locked loop (DLL) driven by a 160-MHz reference clock and a passive RC delay line controlled by an autocalibration circuit. Start-up calibration of the RC delay line is performed using code density tests (CDT). The very small temperature/voltage dependence of R and C parameters and the self calibrating DLL results in a low- power, high-resolution time interpolation circuit in a standard digital CMOS technology. (11 refs)

Computational design of chemical nanosensors: Transition metal doped single-walled carbon nanotubes

We present a general approach to the computational design of nanostructured chemical sensors. The scheme is based on identification and calculation of microscopic descriptors (design parameters) which are used as input to a thermodynamic model to obtain the relevant macroscopic properties. In particular, we consider the functionalization of a (6,6) metallic armchair single-walled carbon nanotube (SWNT) by nine different 3d transition metal (TM) atoms occupying three types of vacancies. For six gas molecules (N_{2}, O_{2}, H_{2}O, CO, NH_{3}, H_{2}S) we calculate the binding energy and change in conductance due to adsorption on each of the 27 TM sites. For a given type of TM functionalization, this allows us to obtain the equilibrium coverage and change in conductance as a function of the partial pressure of the "target" molecule in a background of atmospheric air. Specifically, we show how Ni and Cu doped metallic (6,6) SWNTs may work as effective multifunctional sensors for both CO and NH_{3}. In this way, the scheme presented allows one to obtain macroscopic device characteristics and performance data for nanoscale (in this case SWNT) based devices.Comment: Chapter 7 in "Chemical Sensors: Simulation and Modeling", Ghenadii Korotcenkov (ed.), 47 pages, 22 figures, 10 table

Characterizing speed-independence of high-level designs

This paper characterizes the speed-independence of high-level designs. The characterization is a condition on the design description ensuring that the behavior of the design is independent of the speeds of its components. The behavior of a circuit is modeled as a transition system, that allows data types, and internal as well as external non-determinism. This makes it possible to verify the speed-independence of a design without providing an explicit realization of the environment. The verification can be done mechanically. A number of experimental designs have been verified, including a speed-independent RAM, a complex switch of a data path, various Muller C-elements, FIFO registers, and counters. 1 Introduction A circuit is speed-independent if its behavior does not depend on speeds of its components (gates). These circuits are very robust to parameter variations, such as supply voltage or temperature, and this may have significant practical advantages [8], for example, a potential..