23 research outputs found

    Architecture and algorithms for the implementation of digital wireless receivers in FPGA and ASIC: ISDB-T and DVB-S2 cases

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    [EN] The first generation of Terrestrial Digital Television(DTV) has been in service for over a decade. In 2013, several countries have already completed the transition from Analog to Digital TV Broadcasting, most of which in Europe. In South America, after several studies and trials, Brazil adopted the Japanese standard with some innovations. Japan and Brazil started Digital Terrestrial Television Broadcasting (DTTB) services in December 2003 and December 2007 respectively, using Integrated Services Digital Broadcasting - Terrestrial (ISDB-T), also known as ARIB STD-B31. In June 2005 the Committee for the Information Technology Area (CATI) of Brazilian Ministry of Science and Technology and Innovation MCTI approved the incorporation of the IC-Brazil Program, in the National Program for Microelectronics (PNM) . The main goals of IC-Brazil are the formal qualification of IC designers, support to the creation of semiconductors companies focused on projects of ICs within Brazil, and the attraction of semiconductors companies focused on the design and development of ICs in Brazil. The work presented in this thesis originated from the unique momentum created by the combination of the birth of Digital Television in Brazil and the creation of the IC-Brazil Program by the Brazilian government. Without this combination it would not have been possible to make these kind of projects in Brazil. These projects have been a long and costly journey, albeit scientifically and technologically worthy, towards a Brazilian DTV state-of-the-art low complexity Integrated Circuit, with good economy scale perspectives, due to the fact that at the beginning of this project ISDB-T standard was not adopted by several countries like DVB-T. During the development of the ISDB-T receiver proposed in this thesis, it was realized that due to the continental dimensions of Brazil, the DTTB would not be enough to cover the entire country with open DTV signal, specially for the case of remote localizations far from the high urban density regions. Then, Eldorado Research Institute and Idea! Electronic Systems, foresaw that, in a near future, there would be an open distribution system for high definition DTV over satellite, in Brazil. Based on that, it was decided by Eldorado Research Institute, that would be necessary to create a new ASIC for broadcast satellite reception. At that time DVB-S2 standard was the strongest candidate for that, and this assumption still stands nowadays. Therefore, it was decided to apply to a new round of resources funding from the MCTI - that was granted - in order to start the new project. This thesis discusses in details the Architecture and Algorithms proposed for the implementation of a low complexity Intermediate Frequency(IF) ISDB-T Receiver on Application Specific Integrated Circuit (ASIC) CMOS. The Architecture proposed here is highly based on the COordinate Rotation Digital Computer (CORDIC) Algorithm, that is a simple and efficient algorithm suitable for VLSI implementations. The receiver copes with the impairments inherent to wireless channels transmission and the receiver crystals. The thesis also discusses the Methodology adopted and presents the implementation results. The receiver performance is presented and compared to those obtained by means of simulations. Furthermore, the thesis also presents the Architecture and Algorithms for a DVB-S2 receiver targeting its ASIC implementation. However, unlike the ISDB-T receiver, only preliminary ASIC implementation results are introduced. This was mainly done in order to have an early estimation of die area to prove that the project in ASIC is economically viable, as well as to verify possible bugs in early stage. As in the case of ISDB-T receiver, this receiver is highly based on CORDIC algorithm and it was prototyped in FPGA. The Methodology used for the second receiver is derived from that used for the ISDB-T receiver, with minor additions given the project characteristics.[ES] La primera generaci贸n de Televisi贸n Digital Terrestre(DTV) ha estado en servicio por m谩s de una d茅cada. En 2013, varios pa铆ses completaron la transici贸n de transmisi贸n anal贸gica a televisi贸n digital, la mayor铆a de ellas en Europa. En Am茅rica del Sur, despu茅s de varios estudios y ensayos, Brasil adopt贸 el est谩ndar japon茅s con algunas innovaciones. Jap贸n y Brasil comenzaron a prestar el servicio de Difusi贸n de Televisi贸n Digital Terrestre (DTTB) en diciembre de 2003 y diciembre de 2007 respectivamente, utilizando Radiodifusi贸n Digital de Servicios Integrados Terrestres (ISDB-T), tambi茅n conocida como ARIB STD-B31. En junio de 2005, el Comit茅 del 脕rea de Tecnolog铆a de la Informaci贸n (CATI) del Ministerio de Ciencia, Tecnolog铆a e Innovaci贸n de Brasil - MCTI aprob贸 la incorporaci贸n del Programa CI-Brasil, en el Programa Nacional de Microelectr贸nica (PNM). Los principales objetivos de la CI-Brasil son la formaci贸n de dise帽adores de CIs, apoyar la creaci贸n de empresas de semiconductores enfocadas en proyectos de circuitos integrados dentro de Brasil, y la atracci贸n de empresas de semiconductores interesadas en el dise帽o y desarrollo de circuitos integrados. El trabajo presentado en esta tesis se origin贸 en el impulso 煤nico creado por la combinaci贸n del nacimiento de la televisi贸n digital en Brasil y la creaci贸n del Programa de CI-Brasil por el gobierno brasile帽o. Sin esta combinaci贸n no hubiera sido posible realizar este tipo de proyectos en Brasil. Estos proyectos han sido un trayecto largo y costoso, aunque meritorio desde el punto de vista cient铆fico y tecnol贸gico, hacia un Circuito Integrado brasile帽o de punta y de baja complejidad para DTV, con buenas perspectivas de econom铆a de escala debido al hecho que al inicio de este proyecto, el est谩ndar ISDB-T no fue adoptado por varios pa铆ses como DVB-T. Durante el desarrollo del receptor ISDB-T propuesto en esta tesis, se observ贸 que debido a las dimensiones continentales de Brasil, la DTTB no ser铆a suficiente para cubrir todo el pa铆s con la se帽al de televisi贸n digital abierta, especialmente para el caso de localizaciones remotas, apartadas de las regiones de alta densidad urbana. En ese momento, el Instituto de Investigaci贸n Eldorado e Idea! Sistemas Electr贸nicos, previeron que en un futuro cercano habr铆a un sistema de distribuci贸n abierto para DTV de alta definici贸n por sat茅lite en Brasil. Con base en eso, el Instituto de Investigaci贸n Eldorado decidi贸 que ser铆a necesario crear un nuevo ASIC para la recepci贸n de radiodifusi贸n por sat茅lite, basada el est谩ndar DVB-S2. En esta tesis se analiza en detalle la Arquitectura y algoritmos propuestos para la implementaci贸n de un receptor ISDB-T de baja complejidad y frecuencia intermedia (IF) en un Circuito Integrado de Aplicaci贸n Espec铆fica (ASIC) CMOS. La arquitectura aqu铆 propuesta se basa fuertemente en el algoritmo Computadora Digital para Rotaci贸n de Coordenadas (CORDIC), el cual es un algoritmo simple, eficiente y adecuado para implementaciones VLSI. El receptor hace frente a las deficiencias inherentes a las transmisiones por canales inal谩mbricos y los cristales del receptor. La tesis tambi茅n analiza la metodolog铆a adoptada y presenta los resultados de la implementaci贸n. Por otro lado, la tesis tambi茅n presenta la arquitectura y los algoritmos para un receptor DVB-S2 dirigido a la implementaci贸n en ASIC. Sin embargo, a diferencia del receptor ISDB-T, se introducen s贸lo los resultados preliminares de implementaci贸n en ASIC. Esto se hizo principalmente con el fin de tener una estimaci贸n temprana del 谩rea del die para demostrar que el proyecto en ASIC es econ贸micamente viable, as铆 como para verificar posibles errores en etapa temprana. Como en el caso de receptor ISDB-T, este receptor se basa fuertemente en el algoritmo CORDIC y fue un prototipado en FPGA. La metodolog铆a utilizada para el segundo receptor se deriva de la utilizada para el re[CA] La primera generaci贸 de Televisi贸 Digital Terrestre (TDT) ha estat en servici durant m茅s d'una d猫cada. En 2013, diversos pa茂sos ja van completar la transici贸 de la radiodifusi贸 de televisi贸 anal貌gica a la digital, i la majoria van ser a Europa. A Am猫rica del Sud, despr茅s de diversos estudis i assajos, Brasil va adoptar l'est脿ndard japon茅s amb algunes innovacions. Jap贸 i Brasil van comen莽ar els servicis de Radiodifusi贸 de Televisi贸 Terrestre Digital (DTTB) al desembre de 2003 i al desembre de 2007, respectivament, utilitzant la Radiodifusi贸 Digital amb Servicis Integrats de (ISDB-T), coneguda com a ARIB STD-B31. Al juny de 2005, el Comit茅 de l'脌rea de Tecnologia de la Informaci贸 (CATI) del Ministeri de Ci猫ncia i Tecnologia i Innovaci贸 del Brasil (MCTI) va aprovar la incorporaci贸 del programa CI Brasil al Programa Nacional de Microelectr貌nica (PNM). Els principals objectius de CI Brasil s贸n la qualificaci贸 formal dels dissenyadors de circuits integrats, el suport a la creaci贸 d'empreses de semiconductors centrades en projectes de circuits integrats dins del Brasil i l'atracci贸 d'empreses de semiconductors centrades en el disseny i desenvolupament de circuits integrats. El treball presentat en esta tesi es va originar en l'impuls 煤nic creat per la combinaci贸 del naixement de la televisi贸 digital al Brasil i la creaci贸 del programa Brasil CI pel govern brasiler. Sense esta combinaci贸 no hauria estat possible realitzar este tipus de projectes a Brasil. Estos projectes han suposat un viatge llarg i cost贸s, tot i que digne cient铆ficament i tecnol貌gica, cap a un circuit integrat punter de baixa complexitat per a la TDT brasilera, amb bones perspectives d'economia d'escala perqu猫 a l'inici d'este projecte l'est脿ndard ISDB-T no va ser adoptat per diversos pa茂sos, com el DVB-T. Durant el desenvolupament del receptor de ISDB-T proposat en esta tesi, va resultar que, a causa de les dimensions continentals de Brasil, la DTTB no seria suficient per cobrir tot el pa铆s amb el senyal de TDT oberta, especialment pel que fa a les localitzacions remotes allunyades de les regions d'alta densitat urbana.. En este moment, l'Institut de Recerca Eldorado i Idea! Sistemes Electr貌nics van preveure que, en un futur pr貌xim, no hi hauria a Brasil un sistema de distribuci贸 oberta de TDT d'alta definici贸 a trav茅s de sat猫l驴lit. D'acord amb aix貌, l'Institut de Recerca Eldorado va decidir que seria necessari crear un nou ASIC per a la recepci贸 de radiodifusi贸 per sat猫l驴lit. basat en l'est脿ndard DVB-S2. En esta tesi s'analitza en detall l'arquitectura i els algorismes proposats per l'execuci贸 d'un receptor ISDB-T de Freq眉猫ncia Interm猫dia (FI) de baixa complexitat sobre CMOS de Circuit Integrat d'Aplicacions Espec铆fiques (ASIC). L'arquitectura ac铆 proposada es basa molt en l'algorisme de l'Ordinador Digital de Rotaci贸 de Coordenades (CORDIC), que 茅s un algorisme simple i eficient adequat per implementacions VLSI. El receptor fa front a les defici猫ncies inherents a la transmissi贸 de canals sense fil i els cristalls del receptor. Esta tesi tamb茅 analitza la metodologia adoptada i presenta els resultats de l'execuci贸. Es presenta el rendiment del receptor i es compara amb els obtinguts per mitj脿 de simulacions. D'altra banda, esta tesi tamb茅 presenta l'arquitectura i els algorismes d'un receptor de DVB-S2 de cara a la seua implementaci贸 en ASIC. No obstant aix貌, a difer猫ncia del receptor ISDB-T, nom茅s s'introdueixen resultats preliminars d'implementaci贸 en ASIC. Aix貌 es va fer principalment amb la finalitat de tenir una estimaci贸 primerenca de la zona de dau per demostrar que el projecte en ASIC 茅s econ貌micament viable, aix铆 com per verificar possibles errors en l'etapa primerenca. Com en el cas del receptor ISDB-T, este receptor es basa molt en l'algorisme CORDIC i va ser un prototip de FPGA. La metodologia utilitzada per al segon receptor es deriva de la utilitzada per al receptor IRodrigues De Lima, E. (2016). Architecture and algorithms for the implementation of digital wireless receivers in FPGA and ASIC: ISDB-T and DVB-S2 cases [Tesis doctoral no publicada]. Universitat Polit猫cnica de Val猫ncia. https://doi.org/10.4995/Thesis/10251/61967TESI

    Architecture design of video processing systems on a chip

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    Fast search algorithms for digital video coding

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    PhD ThesisMotion Estimation algorithm is one of the important issues in video coding standards such as ISO MPEG-1/2 and ITU-T H.263. These international standards regularly use a conventional Full Search (FS) Algorithm to estimate the motion of pixels between pairs of image blocks. Since a FS method requires intensive computations and the distortion function needs to be evaluated many times for each target block. the process is very time consuming. To alleviate this acute problem, new search algorithms, Orthogonal Logarithmic Search (OLS) and Diagonal Logarithmic Search (DLS), have been designed and implemented. The performance of the algorithms are evaluated by using standard 176x 144 pixels quarter common intermediate format (QCIF) benchmark video sequences and the results are compared to the traditional well-known FS Algorithm and a widely used fast search algorithm called the Three Step Search (3SS), The fast search algorithms are known as sub-optimal algorithms as they test only some of the candidate blocks from the search area and choose a match from a subset of blocks. These algorithms can reduce the computational complexity as they do not examine all candidate blocks and hence are algorithmically faster. However, the quality is generally not as good as that of the FS algorithms but can be acceptable in terms of subjective quality. The important metrics, time and Peak Signal to Noise Ratio are used to evaluate the novel algorithms. The results show that the strength of the algorithms lie in their speed of operation as they are much faster than the FS and 3SS. The performance in speed is improved by 85.37% and 22% over the FS and 3SS respectively for the OLS. For the DLS, the speed advantages are 88.77% and 40% over the FS and 3SS. Furthermore, the accuracy of prediction of OLS and DLS are comparahle to the 3SS.Thepsatri Rajabhat University: Royal Thai Government

    Optical Communication

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    Dual-Use Space Technology Transfer Conference and Exhibition

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    This document contains papers presented at the Dual-Use Space Technology Transfer Conference and Exhibition held at the Johnson Space Center February 1-3, 1994. Possible technology transfers covered during the conference were in the areas of information access; innovative microwave and optical applications; materials and structures; marketing and barriers; intelligent systems; human factors and habitation; communications and data systems; business process and technology transfer; software engineering; biotechnology and advanced bioinstrumentation; communications signal processing and analysis; new ways of doing business; medical care; applications derived from control center data systems; human performance evaluation; technology transfer methods; mathematics, modeling, and simulation; propulsion; software analysis and decision tools systems/processes in human support technology; networks, control centers, and distributed systems; power; rapid development perception and vision technologies; integrated vehicle health management; automation technologies; advanced avionics; ans robotics technologies. More than 77 papers, 20 presentations, and 20 exhibits covering various disciplines were presented b experts from NASA, universities, and industry
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