External Cavity Mode-locked Semiconductor Lasers For The Generation Of Ultra-low Noise Multi-gigahertz Frequency Combs And Applications In Multi-heterodyne Detection Of Arbitrary Optical Waveforms

The construction and characterization of ultra-low noise semiconductor-based mode-locked lasers as frequency comb sources with multi-gigahertz combline-to-combline spacing is studied in this dissertation. Several different systems were built and characterized. The first of these systems includes a novel mode-locking mechanism based on phase modulation and periodic spectral filtering. This mode-locked laser design uses the same intra-cavity elements for both mode-locking and frequency stabilization to an intra-cavity, 1,000 Finesse, Fabry-Pérot Etalon (FPE). On a separate effort, a mode-locked laser based on a Slab-Coupled Optical Waveguide Amplifier (SCOWA) was built. This system generates a pulse-train with residual timing jitter o

Experimental investigation of bifurcation behavior in nonlinear microwave circuits

We present an experimental technique to study bifurcations in periodically forced nonlinear microwave circuits, including even physically unstable (periodic) steady states. The designer specifies a key node in the circuit being studied (often associated with an active device) and the method synthesizes a voltage waveform to match the waveform at the selected node so that no current flows across the interface. This null condition is maintained while a parameter, such as bias voltage, is varied over a specified range. The addition of the external nulling source is able to stabilize a steady state that would be unstable in the original circuit. Various applications are presented.This work has been funded by the Spanish Government under contract TEC2014-60283-C3-1-R, the European Regional Development Fund (ERDF/FEDER) and the Parliament of Cantabria (12.JP02.64069)

A PLL frequency synthesizer and Gilbert cell multiplier for a 916 MHz ISM band transmitter realized in 0.5 [mu]m [i.e. micrometer] CMOS technology

This thesis is a study of the design of a 3rd order phase lock loop (PLL) and Gilbert cell multiplier to implement a 916MHz ISM band transmitter in 0.5μm CMOS technology. The transmitter is designed for implementing distributed biosensor systems for environmental monitoring. The transmitter is described from a system level with the discussion of design issues concerning system topology and communication signal requirements as related to project requirements. The PLL system is described as a negative feedback system and important design considerations are discussed. Each PLL and transmitter system component is analyzed and discussed. A prototyped double balanced Gilbert cell multiplier with a power gain of 8dB, -10dBm compression point, and dissipates 7.2mW of power is analyzed and presentedThe analysis and design of a prototyped current mode logic frequency divider with a fixed division factor of 256 is presented. The frequency divider dissipated 15mW of power for a -20dBm 916 MHz input signal with a maximum operating frequency of 1.8 GHz. An off-chip LC tank voltage controlled oscillator was prototyped with a tuning range of 120 MHz, dissipated 3.3mW, -15dBm single-ended output signal, and had a phase noise performance of -60dBc at a 10 kHz offset and -80dBc at 100 kHz offset is analyzed and presentedThe design and simulation issues of a digital phase frequency detector (PFD), charge pump, and loop filter is presented. The charge pump was designed to source or sink a 10 μA current for an output voltage to within 0.1 V of the power supply voltages. Results show that the final transmitter can be successfully implemented with the prototyped and simulated transmitter components

A Novel Retro-directive Phased Array Antenna Architecture

Mobile wireless communication scenarios can range from a simple indoor WiFi link to a satellite internet connection to an airplane. Virtually in all scenarios, dynamic changes in the propagation environment or the movement of transmitter and receiver are inevitable. Therefore, the wireless link often experiences quality degradation or even interruption. Adaptive antenna arrays offer a promising solution to combat wireless channel impairments as they adaptively reshape their radiation pattern. For two-way communication, an antenna should be retro-directive meaning its transmit and receive beams are aligned. To achieve retro-directivity, techniques based on direction-of-arrival and self-phasing can be used. The former usually calls for a complex calibration routine to estimate the direction of arrival and beamsteering; the latter relies on the received signal to generate the transmit beam, imposing several limitations on its adaptability. In this thesis, a novel retro-directive phased array architecture is proposed that does not require calibration and which generates its transmit wave independently of its receive wave. Moreover, its radiation pattern can be adaptively shaped by a simple beamforming algorithm, while its transmitted and received beams remain aligned. Structurally, it is comprised of independent modules that can be placed in virtually any arrangement without any hardware modification. The architecture uses the LO phase-shifting technique to steer its beams. The LO signals are generated with a novel frequency synthesizer; it creates a pair of LO signals for the transmission and reception paths to achieve retro-directivity. The proposed antenna architecture is demonstrated practically using a 10-element prototype, verifying its ability to steer the transmit and receive beams while keeping them aligned. In addition, two of the key circuit components of the LO synthesizer, a fractional frequency divider and a novel phase-conjugating phase shifter, are designed and successfully implemented on 65nm CMOS technology, paving the path for use in future applications

Review of Injected Oscillators

Oscillators are critical components in electrical and electronic engineering and other engineering and sciences. Oscillators are classified as free-running oscillators and injected oscillators. This chapter describes the background necessary for the analysis and design of injected oscillators. When an oscillator is injected by an external periodic signal mentioned as an injection signal, it is called an injected oscillator. Consequently, two phenomena occur in the injected oscillators: (I) pulling phenomena and (II) locking phenomena. For locking phenomena, the oscillation frequency of the injection signal must be near free-running oscillation frequency or its sub-/super-harmonics. Due to these phenomena are nonlinear phenomena, it is tough to achieve the exact equation or closed-form equation of them. Therefore, researchers are scrutinizing them by different analytical and numerical methods for accomplishing an exact inside view of their performances. In this chapter, injected oscillators are investigated in two main subjects: first, analytical methods on locking and pulling phenomena are reviewed, and second, applications of injected oscillators are reviewed such as injection-locked frequency dividers at the latter. Furthermore, methods of enhancing the locking range are introduced

Advanced CMOS Integrated Circuit Design and Application

The recent development of various application systems and platforms, such as 5G, B5G, 6G, and IoT, is based on the advancement of CMOS integrated circuit (IC) technology that enables them to implement high-performance chipsets. In addition to development in the traditional fields of analog and digital integrated circuits, the development of CMOS IC design and application in high-power and high-frequency operations, which was previously thought to be possible only with compound semiconductor technology, is a core technology that drives rapid industrial development. This book aims to highlight advances in all aspects of CMOS integrated circuit design and applications without discriminating between different operating frequencies, output powers, and the analog/digital domains. Specific topics in the book include: Next-generation CMOS circuit design and application; CMOS RF/microwave/millimeter-wave/terahertz-wave integrated circuits and systems; CMOS integrated circuits specially used for wireless or wired systems and applications such as converters, sensors, interfaces, frequency synthesizers/generators/rectifiers, and so on; Algorithm and signal-processing methods to improve the performance of CMOS circuits and systems

ULTRA LOW POWER FSK RECEIVER AND RF ENERGY HARVESTER

This thesis focuses on low power receiver design and energy harvesting techniques as methods for intelligently managing energy usage and energy sources. The goal is to build an inexhaustibly powered communication system that can be widely applied, such as through wireless sensor networks (WSNs). Low power circuit design and smart power management are techniques that are often used to extend the lifetime of such mobile devices. Both methods are utilized here to optimize power usage and sources. RF energy is a promising ambient energy source that is widely available in urban areas and which we investigate in detail. A harvester circuit is modeled and analyzed in detail at low power input. Based on the circuit analysis, a design procedure is given for a narrowband energy harvester. The antenna and harvester co-design methodology improves RF to DC energy conversion efficiency. The strategy of co-design of the antenna and the harvester creates opportunities to optimize the system power conversion efficiency. Previous surveys have found that ambient RF energy is spread broadly over the frequency domain; however, here it is demonstrated that it is theoretically impossible to harvest RF energy over a wide frequency band if the ambient RF energy source(s) are weak, owing to the voltage requirements. It is found that most of the ambient RF energy lies in a series of narrow bands. Two different versions of harvesters have been designed, fabricated, and tested. The simulated and measured results demonstrate a dual-band energy harvester that obtains over 9% efficiency for two different bands (900MHz and 1800MHz) at an input power as low as -19dBm. The DC output voltage of this harvester is over 1V, which can be used to recharge the battery to form an inexhaustibly powered communication system. A new phase locked loop based receiver architecture is developed to avoid the significant conversion losses associated with OOK architectures. This also helps to minimize power consumption. A new low power mixer circuit has also been designed, and a detailed analysis is provided. Based on the mixer, a low power phase locked loop (PLL) based receiver has been designed, fabricated and measured. A power management circuit and a low power transceiver system have also been co-designed to provide a system on chip solution. The low power voltage regulator is designed to handle a variety of battery voltage, environmental temperature, and load conditions. The whole system can work with a battery and an application specific integrated circuit (ASIC) as a sensor node of a WSN network