Integration of a mean-torque diesel engine model into a hardware-in-the-loop shipboard network simulation using lambda tuning

This study describes the creation of a hardware-in-the-loop (HIL) environment for use in evaluating network architecture, control concepts and equipment for use within marine electrical systems. The environment allows a scaled hardware network to be connected to a simulation of a multi-megawatt marine diesel prime mover, coupled via a synchronous generator. This allows All-Electric marine scenarios to be investigated without large-scale hardware trials. The method of closing the loop between simulation and hardware is described, with particular reference to the control of the laboratory synchronous machine, which represents the simulated generator(s). The fidelity of the HIL simulation is progressively improved in this study. First, a faster and more powerful field drive is implemented to improve voltage tracking. Second, the phase tracking is improved by using two nested proportional–integral–derivative–acceleration controllers for torque control, tuned using lambda tuning. The HIL environment is tested using a scenario involving a large constant-power load step. This provides a very severe test of the HIL environment, and also reveals the potentially adverse effects of constant-power loads within marine power systems

The use of real time digital simulation and hardware in the loop to de-risk novel control algorithms

Low power demonstrators are commonly used to validate novel control algorithms. However, the response of the demonstrator to network transients and faults is often unexplored. The importance of this work has, in the past, justified facilities such as the T45 Shore Integration Test Facility (SITF) at the Electric Ship Technology Demonstrator (ESTD). This paper presents the use of real time digital simulation and hardware in the loop to de-risk a innovative control algorithm with respect to network transients and faults. A novel feature of the study is the modelling of events at the power electronics level (time steps of circa 2 μs) and the system level (time steps of circa 50 μs)

European White Book on Real-Time Power Hardware in the Loop Testing : DERlab Report No. R- 005.0

The European White Book on Real-Time-Powerhardware-in-the-Loop testing is intended to serve as a reference document on the future of testing of electrical power equipment, with specifi c focus on the emerging hardware-in-the-loop activities and application thereof within testing facilities and procedures. It will provide an outlook of how this powerful tool can be utilised to support the development, testing and validation of specifi cally DER equipment. It aims to report on international experience gained thus far and provides case studies on developments and specifi c technical issues, such as the hardware/software interface. This white book compliments the already existing series of DERlab European white books, covering topics such as grid-inverters and grid-connected storag

Neural-Network Vector Controller for Permanent-Magnet Synchronous Motor Drives: Simulated and Hardware-Validated Results

This paper focuses on current control in a permanentmagnet synchronous motor (PMSM). The paper has two main objectives: The first objective is to develop a neural-network (NN) vector controller to overcome the decoupling inaccuracy problem associated with conventional PI-based vector-control methods. The NN is developed using the full dynamic equation of a PMSM, and trained to implement optimal control based on approximate dynamic programming. The second objective is to evaluate the robust and adaptive performance of the NN controller against that of the conventional standard vector controller under motor parameter variation and dynamic control conditions by (a) simulating the behavior of a PMSM typically used in realistic electric vehicle applications and (b) building an experimental system for hardware validation as well as combined hardware and simulation evaluation. The results demonstrate that the NN controller outperforms conventional vector controllers in both simulation and hardware implementation

On-line multiobjective automatic control system generation by evolutionary algorithms

Evolutionary algorithms are applied to the on- line generation of servo-motor control systems. In this paper, the evolving population of controllers is evaluated at run-time via hardware in the loop, rather than on a simulated model. Disturbances are also introduced at run-time in order to pro- duce robust performance. Multiobjective optimisation of both PI and Fuzzy Logic controllers is considered. Finally an on-line implementation of Genetic Programming is presented based around the Simulink standard blockset. The on-line designed controllers are shown to be robust to both system noise and ex- ternal disturbances while still demonstrating excellent steady- state and dvnamic characteristics

Demonstration of sustained and useful converter responses during balanced and unbalanced faults in microgrids

In large power grids where converter penetration is presently low and the network impedance is predominantly reactive, the required response from converters during faults is presently specified by phrases such as “maximum reactive output”. However, in marine and aero power systems most faults are unbalanced, the network impedance is resistive, and converter penetration may be high. Therefore a balanced reactive fault current response to an unbalanced fault may lead to over-voltages or over/under frequency events. Instead, this paper presents a method of controlling the converter as a balanced voltage source behind a reactance, thereby emulating the fault response of a synchronous generator (SG) as closely as possible. In this mode there is a risk of converter destruction due to overcurrent. A new way of preventing destruction but still providing fault performance as close to a SG as possible is presented. Demonstrations are presented of simulations and laboratory testing at the 10kVA 400V scale, with balanced and unbalanced faults. Currents can be limited to about 1.5pu while still providing appropriate unbalanced fault response within a resistive network

Tradeoffs between AC power quality and DC bus ripple for 3-phase 3-wire inverter-connected devices within microgrids

Visions of future power systems contain high penetrations of inverters which are used to convert power from dc (direct current) to ac (alternating current) or vice versa. The behavior of these devices is dependent upon the choice and implementation of the control algorithms. In particular, there is a tradeoff between dc bus ripple and ac power quality. This study examines the tradeoffs. Four control modes are examined. Mathematical derivations are used to predict the key implications of each control mode. Then, an inverter is studied both in simulation and in hardware at the 10 kVA scale, in different microgrid environments of grid impedance and power quality. It is found that voltage-drive mode provides the best ac power quality, but at the expense of high dc bus ripple. Sinusoidal current generation and dual-sequence controllers provide relatively low dc bus ripple and relatively small effects on power quality. High-bandwidth dc bus ripple minimization mode works well in environments of low grid impedance, but is highly unsuitable within higher impedance microgrid environments and/or at low switching frequencies. The findings also suggest that the certification procedures given by G5/4, P29 and IEEE 1547 are potentially not adequate to cover all applications and scenarios

Overcoming electro-thermal barriers to achieve extreme performance power conversion for more electric aircraft

The National Aeronautics and Space Administration (NASA), in addition to an increasing number of privately funded ventures, has demonstrated growing interest in more electric aircraft (MEA) - flight vehicles where propulsion is partially or totally supplied by electric motors. While hybrid or turbo-electric MEA concepts would still rely on a jet engine power plant to provide electrical power to these electric motors, NASA studies indicate these concepts can result in cleaner, quieter, and more fuel-efficient flight compared to current best-in-class passenger jet aircraft. To achieve this new paradigm in flight, major engineering challenges must be overcome to improve the thermal management, efficiency and power density of the propulsion electronics as well as ensure the high reliability necessary for aviation. This thesis focuses on these challenges in the scope of one block of this electrical system: a high-performance dc-ac converter designed to drive the type of electric machine engineered for electric flight from a high-voltage dc bus that would be present on some MEA concepts. The flying capacitor multilevel topology is demonstrated as an enabling technology for simultaneously achieving high-efficiency and high power-density, with specific consideration given to packaging and implementation. Reliability of the converter is addressed through discussion of on-line health management through the use of a real-time hardware-in-the-loop (HIL) observer

Architecture of a network-in-the-Loop environment for characterizing AC power system behavior

This paper describes the method by which a large hardware-in-the-loop environment has been realized for three-phase ac power systems. The environment allows an entire laboratory power-network topology (generators, loads, controls, protection devices, and switches) to be placed in the loop of a large power-network simulation. The system is realized by using a realtime power-network simulator, which interacts with the hardware via the indirect control of a large synchronous generator and by measuring currents flowing from its terminals. These measured currents are injected into the simulation via current sources to close the loop. This paper describes the system architecture and, most importantly, the calibration methodologies which have been developed to overcome measurement and loop latencies. In particular, a new "phase advance" calibration removes the requirement to add unwanted components into the simulated network to compensate for loop delay. The results of early commissioning experiments are demonstrated. The present system performance limits under transient conditions (approximately 0.25 Hz/s and 30 V/s to contain peak phase-and voltage-tracking errors within 5. and 1%) are defined mainly by the controllability of the synchronous generator