OPTIMIZATION OF SURFACE MOUNT TECHNOLOGY SPECIALIZING IN HEAT DISSIPATION IN BGA CSPs

This project describes heat dissipation and mechanical deformation in BGAs. In contemporary industries, demand for smaller packages has increased the concern of thermal management. The lead-free movement has altered the properties of BGAs and comes with its own set of concerns. Packages were simulated and analyzed thermo-electrically using CAD and ANSYS software. The goal was to improve thermal management of electrical loads in CSP BGAs. Lead-based solder simulations demonstrated higher reliability than lead-free alternatives. Results indicate that maximum temperature and stresses were concentrated at the perimeter, especially the corners. This project resulted in suggestions for improvements for existing packaging and opportunities for future projects

A Finite Element approach to understanding constitutive elasto-plastic, visco-plastic behaviour in lead free micro-electronic BGA structures

This work investigates the non-linear elasto-plastic and visco-plastic behaviour of lead free solder material and soldered joints. Specifically, Finite Element (FE) tools were used to better understand the deformations within Ball Grid Array solder joints (BGA), and numerical and analytical methods were developed to quantify the identified constituent deformations. FE material models were based on the same empirical constitutive models (elastic, plastic and creep) used in analytical calculations. The current work recognises the large number of factors influencing material behaviour which has led to a wide range of published material properties for near eutectic SnAgCu alloys. The work discovered that the deformation within the BGA was more complex than is generally assumed in the literature. It was shown that shear deformation of the solder ball could account for less than 5% of total measured displacement in BGA samples. Shear displacement and rotation of the solder balls relative to the substrate are sensitive to the substrate orthotropic properties and substrate geometry (relative to solder volume and array pattern). The FE modelling was used to derive orthotropic FR4 properties independently using published data. An elastic modulus for Sn3.8Ag0.7Cu was measured using homologous temperatures below 0.3. Suggested values of Abaqus-specific creep parameters m and f (not found in literature) for Sn3.8Ag0.7Cu have been validated with published data. Basic verification against simple analytical calculations has given a better understanding of the components of overall specimen displacement that is normally missing from empirical validation alone. A combined approach of numerical and analytical modelling of BGAs, and mechanical tests, is recommended to harmonise published work, exploit new material data and for more informed analysis of new configurationsEPSRC-funded PhD studentshi

Ultra thin ultrafine-pitch chip-package interconnections for embedded chip last approach

Ever growing demands for portability and functionality have always governed the electronic technology innovations. IC downscaling with Moore s law and system miniaturization with System-On-Package (SOP) paradigm has resulted and will continue to result in ultraminiaturized systems with unprecedented functionality at reduced cost. The trend towards 3D silicon system integration is expected to downscale IC I/O pad pitches from 40µm to 1- 5 µm in future. Device- to- system board interconnections are typically accomplished today with either wire bonding or solders. Both of these are incremental and run into either electrical or mechanical barriers as they are extended to higher density of interconnections. Alternate interconnection approaches such as compliant interconnects typically require lengthy connections and are therefore limited in terms of electrical properties, although expected to meet the mechanical requirements. As supply currents will increase upto 220 A by 2012, the current density will exceed the maximum allowable current density of solders. The intrinsic delay and electromigration in solders are other daunting issues that become critical at nanometer size technology nodes. In addition, formation of intermetallics is also a bottleneck that poses significant mechanical issues. Recently, many research groups have investigated various techniques for copper-copper direct bonding. Typically, bonding is carried out at 400oC for 30 min followed by annealing for 30 min. High thermal budget in such process makes it less attractive for integrated systems because of the associated process incompatibilities. In the present study, copper-copper bonding at ultra fine-pitch using advanced nano-conductive and non-conductive adhesives is evaluated. The proposed copper-copper based interconnects using advanced conductive and non-conductive adhesives will be a new fundamental and comprehensive paradigm to solve all the four barriers: 1) I/O pitch 2) Electrical performance 3) Reliability and 4) Cost. This thesis investigates the mechanical integrity and reliability of copper-copper bonding using advanced adhesives through test vehicle fabrication and reliability testing. Test vehicles were fabricated using low cost electro-deposition techniques and assembled onto glass carrier. Experimental results show that proposed copper-copper bonding using advanced adhesives could potentially meet all the system performance requirements for the emerging micro/nano-systems.M.S.Committee Chair: Prof. Rao R Tummala; Committee Member: Dr. Jack Moon; Committee Member: Dr. P M Ra

THERMAL CYCLING RELIABILITY OF LEAD-FREE SOLDERS (SAC305 AND SN3.5AG) FOR HIGH TEMPERATURE APPLICATIONS

Eutectic tin lead was the most widely used solder interconnect in the electronics industry before the adoption of lead-free legislation. But eutectic tin lead solder has a low melting point (183oC) and was not suited for some high temperature applications, such as oil and gas exploration, automotive, and defense. Hence, for these applications, the electronics industry had to rely on specialized solders. In this study, ball grid arrays (BGAs), quad flat packages (QFPs), and surface mount resistors assembled with SAC305 and Sn3.5Ag solder pastes were subjected to thermal cycling from -40oC to 185oC. Commercially available electroless nickel immersion gold (ENIG) board finish was compared to proprietary Sn-based board finish designed for high temperatures. The data analysis showed that the type of solder paste and board finish used did not have an impact on the reliability of BGAs. The failure site was on the package side of the solder joint. The morphology of intermetallic compounds (IMCs) formed after thermal cycling was analyzed

HARMONIC VIBRATION TESTING OF ELECTRONIC COMPONENTS ATTACHED TO PRINTED WIRING BOARDS WITH SAC305 AND EUTECTIC SnPb SOLDER

Ball grid arrays attached to printed wiring boards with conventional tin-lead solder (63/37) and one of the leading lead-free tin-silver-copper solders (SAC305) were tested at high and low load levels of harmonic vibration. Leadless chip resistors attached to printed wiring boards with conventional tin-lead solder and lead-free solders (SAC105 and SAC305, and tin-nickel-copper, SN100C) were tested at low levels of harmonic vibration. The tests were conducted near the natural frequency of the assemblies to accelerate testing and to generate high cycle fatigue failures in a reasonable amount of time. The results showed that there are nearly negligible differences in the high cycle fatigue life between the SnPb and SAC305 solders. SN100C and SAC105 were less durable. A master durability plot was generated for SAC305 and SnPb to confirm the negligible-difference between the solders. A safe area was defined be used as a design goal for survivablity for circuit board design

MODELING RATE DEPENDENT DURABILITY OF LOW-Ag SAC INTERCONNECTS FOR AREA ARRAY PACKAGES UNDER TORSION LOADS

The thesis discusses modeling rate-dependent durability of solder interconnects under mechanical torsion loading for surface mount area array components. The study discusses an approach to incorporate strain-rate dependency in durability estimation for solder interconnects. The components under study are two configurations of BGAs (ball grid array) assembled with select lead-free solders. A torsion test setup is used to apply displacement controlled loads on the test board. Accelerated test load profile is experimentally determined. Torsion test is carried out for all the components under investigation to failure. Strain-rate dependent (Johnson-Cook model) and strain-rate independent, elastic-plastic properties are used to model the solders in finite element simulation. Damage model from literature is used to estimate the durability for SAC305 solder to validate the approach. Test data is used to extract damage model constants for SAC105 solder and extract mechanical fatigue durability curve

Fabrication of micro bumps for micro scale thermal management

Cryopreservation is storage of biological systems at ultra low temperatures for a prolonged duration; such that they can be thawed and restored to the same living state. It is important to understand the behavior of cells when they are subjected to subzero temperatures. Research in this area has shown the occurrence of two main biophysical events; cellular dehydration and intracellular ice formation. Current techniques for characterizing the dehydration in cells as part of a tissue are not adequate for studying intracellular ice formation in tissues. An integrated device consisting of an array of thermal sensors (microthermocouples) and actuators (microthermoelectric coolers) would help to detect intracellular ice formation by measuring and modulating the heat release of individual cells during freezing. This requires a dense wiring layer below the devices which can act as a heat sink in turn affecting the performance of the device. To alleviate this problem fabrication of bump structures was proposed to isolate the dense wiring layer from the array. Modeling was used to assess the effect of the bumps on the performance of the thermoelectric cooler. Bismuth telluride posts of 10 µm diameter and 20 µm height yielded optimal cooling with a bump radius of 5 µm. A maximum effective change in temperature of 3.47 K was achieved for an applied current of 23.7 mA and Joule’s breakdown was found to occur at 47.7 mA. To avoid the complexities in the measurements due to the presence of second junction, copper and constantan were chosen as bump material. Electrodeposition along with UV-LIGA microfabrication technique was used to fabricate the bumps. Copper and constantan micro bumps, with mean diameters of 6.5 & 27.76 µm and heights of 7.81 and 12.04 µm were fabricated with dimensional variation of ±0.5 µm with a 95% confidence interval. A custom printed circuit board was fabricated on FR4 laminate using lithography and liftoff technique. The mean length and width of the structures were found to be 4151.98 ±1.86 µm and 1003.21 ±0.55 µm, respectively with 95% confidence interval. There is a need for future work to precisely fabricate metal features on FR4 laminate

Bed of nails(B0N) - 100 microns pitch wafer level off-chip interconnects for microelectronic packaging applications

Master'sMASTER OF ENGINEERIN

ISOTHERMAL MECHANICAL AND THERMO-MECHANICAL DURABILITY CHARACTERIZATION OF SELECTED PB-FREE SOLDERS

Due to the hazards of Pb in the environment and its effect on humans and marketing competition from Japanese electronics manufacturers, the conversion to Pb-free solders in the electronics industry appears imminent. As major mechanical, thermal, and electrical interconnects between the component and the PWB, solder joints are crucial for the reliability of the most electronic packages. There is an urgent need for constitutive properties, mechanical durability and thermo-mechanical durability of Pb-free solders. A partitioned constitutive model consisting of elastic, plastic, primary creep and secondary creep models is obtained for the Sn3.9Ag0.6Cu solder and the baseline Sn37Pb solder from comprehensive monotonic and creep tests conducted on Thermo-Mechanical-Microscale (TMM) setup. The comparison between two solders shows that Sn3.9Ag0.6Cu has much better creep resistance than Sn37Pb at the low and medium stresses. The isothermal mechanical durability of three NEMI recommended Pb-free solders, Sn3.9Ag0.6Cu, Sn3.5Ag, Sn0.7Cu, is tested on the TMM setup under low creep and high creep test conditions. The damage propagation rate is also analyzed from the test data. The generic Energy-Partitioning (E-P) durability model is obtained for three Pb-free solders by using the incremental analytic model developed for TMM tests. The scatter of the test results from the prediction by these E-P durability model constants is small. The thermo-mechanical durability of the Pb-free Sn3.8Ag0.7Cu solder is investigated by a systematic approach combining comprehensive thermal cycling tests and finite element modeling. The effects of mixed solder systems, device types, and underfill are addressed in the tests. Thermal cycling results show that Sn3.8Ag0.7Cu marginally outperforms SnPb for four different components under the studied test condition. The extensive detailed three-dimensional viscoplastic FE stress and damage analysis is conducted for five different thermal cycling tests of both Sn3.8Ag0.7Cu and Sn37Pb solders. Power law thermo-mechanical durability models of both Sn3.8Ag0.7Cu and Sn3Pb are obtained from thermal cycling test data and stress and damage analysis. The energy-partitioning durability models of two solders are also obtained. It is found that the slopes of the plastic and creep curves in the E-P damage model of Pb-free solders for thermal cycling are steeper than those for mechanical cycling and those of Sn37Pb solders

PCB Quality Metrics that Drive Reliability (PD 18)

Risk based technology infusion is a deliberate and systematic process which defines the analysis and communication methodology by which new technology is applied and integrated into existing and new designs, identifies technology development needs based on trends analysis and facilitates the identification of shortfalls against performance objectives. This presentation at IPC Works Asia Aerospace 2019 Events provides the audience a snapshot of quality variations in printed wiring board quality, as assessed, using experiences in processing and risk analysis of PWB structural integrity coupons. The presentation will focus on printed wiring board quality metrics used, the relative type and number of non-conformances observed and trend analysis using statistical methods. Trend analysis shows the top five non-conformances observed across PWB suppliers, the root cause(s) behind these non-conformance and suggestions of mitigation plans. The trends will then be matched with the current state of the PWB supplier base and its challenges and opportunities. The presentation further discusses the risk based SMA approaches and methods being applied at GSFC for evaluating candidate printed wiring board technologies which promote the adoption of higher throughput and faster processing technology for GSFC missions