Digital Predistortion for High Efficiency Power Amplifier Architectures Using a Dual-input Modeling Approach

In this paper, a novel model is proposed for dual-input high efficiency power amplifier (PA) architectures, such as envelope tracking (ET) and varactor-based dynamic load modulation (DLM). Compared to the traditional single-input modeling approach, the proposed model incorporates the baseband supply voltage/load control as an input. This advantage makes the new approach capable to achieve maximized average power-added efficiency (PAE) and minimized output distortion simultaneously. Furthermore, the new approach has shown to be robust towards time misalignment between the RF input and baseband supply voltage/load control signals, and it can be applied with a reduced-bandwidth baseband supply voltage/load control. Experiments have been performed in a varactor-based DLM PA architecture to evaluate the new modeling approach. The results show that it can achieve 9 dB and 7 dB better performance than the traditional approaches in terms of adjacent channel leakage ratio and normalized mean square error, respectively. At the same time, the average PAE is maximized. Similar results have been achieved with the proposed model even when reduced-bandwidth baseband load control signal is used or time misalignment between the RF and baseband load control input signals exists. Although the new approach is only tested with DLM architecture in this paper, it is very general and can be applied to ET architectures as well

Digital Predistortion for Dual-Input Doherty Amplifiers

This paper presents a digital predistortion technique for dual-input Doherty power amplifiers. The proposed technique utilizes both RF inputs of the main and peak amplifiers in the digital predistorter. The effectiveness of the resulting dual-input predistorter is evaluated on a twoway Doherty amplifier operating at 2.14 GHz with 53.5 dBm peak output power. The experimental results demonstrate that the dual-input approach outperforms the conventional single-input predistortion technique by ∼3 dB in terms of adjacent channel leakage ratio

A fast engineering approach to high efficiency power amplifier linearization for avionics applications

This PhD thesis provides a fast engineering approach to the design of digital predistortion (DPD) linearizers from several perspectives: i) enhancing the off-line training performance of open-loop DPD, ii) providing robustness and reducing the computational complexity of the parameters identification subsystem and, iii) importing machine learning techniques to favor the automatic tuning of power amplifiers (PAs) and DPD linearizers with several free-parameters to maximize power efficiency while meeting the linearity specifications. One of the essential parts of unmanned aerial vehicles (UAV) is the avionics, being the radio control one of the earliest avionics present in the UAV. Unlike the control signal, for transferring user data (such as images, video, etc.) real-time from the drone to the ground station, large transmission rates are required. The PA is a key element in the transmitter chain to guarantee the data transmission (video, photo, etc.) over a long range from the ground station. The more linear output power, the better the coverage or alternatively, with the same coverage, better SNR allows the use of high-order modulation schemes and thus higher transmission rates are achieved. In the context of UAV wireless communications, the power consumption, size and weight of the payload is of significant importance. Therefore, the PA design has to take into account the compromise among bandwidth, output power, linearity and power efficiency (very critical in battery-supplied devices). The PA can be designed to maximize its power efficiency or its linearity, but not both. Therefore, a way to deal with this inherent trade-off is to design high efficient amplification topologies and let the PA linearizers take care of the linearity requirements. Among the linearizers, DPD linearization is the preferred solution to both academia and industry, for its high flexibility and linearization performance. In order to save as many computational and power resources as possible, the implementation of an open-loop DPD results a very attractive solution for UAV applications. This thesis contributes to the PA linearization, especially on off-line training for open-loop DPD, by presenting two different methods for reducing the design and operating costs of an open-loop DPD, based on the analysis of the DPD function. The first method focuses on the input domain analysis, proposing mesh-selecting (MeS) methods to accurately select the proper samples for a computationally efficient DPD parameter estimation. Focusing in the MeS method with better performance, the memory I-Q MeS method is combined with feature extraction dimensionality reduction technique to allow a computational complexity reduction in the identification subsystem by a factor of 65, in comparison to using the classical QR-LS solver and consecutive samples selection. In addition, the memory I-Q MeS method has been proved to be of crucial interest when training artificial neural networks (ANN) for DPD purposes, by significantly reducing the ANN training time. The second method involves the use of machine learning techniques in the DPD design procedure to enlarge the capacity of the DPD algorithm when considering a high number of free parameters to tune. On the one hand, the adaLIPO global optimization algorithm is used to find the best parameter configuration of a generalized memory polynomial behavioral model for DPD. On the other hand, a methodology to conduct a global optimization search is proposed to find the optimum values of a set of key circuit and system level parameters, that properly combined with DPD linearization and crest factor reduction techniques, can exploit at best dual-input PAs in terms of maximizing power efficiency along wide bandwidths while being compliant with the linearity specifications. The advantages of these proposed techniques have been validated through experimental tests and the obtained results are analyzed and discussed along this thesis.Aquesta tesi doctoral proporciona unes pautes per al disseny de linealitzadors basats en predistorsió digital (DPD) des de diverses perspectives: i) millorar el rendiment del DPD en llaç obert, ii) proporcionar robustesa i reduir la complexitat computacional del subsistema d'identificació de paràmetres i, iii) incorporació de tècniques d'aprenentatge automàtic per afavorir l'auto-ajustament d'amplificadors de potència (PAs) i linealitzadors DPD amb diversos graus de llibertat per poder maximitzar l’eficiència energètica i al mateix temps acomplir amb les especificacions de linealitat. Una de les parts essencials dels vehicles aeris no tripulats (UAV) _es l’aviònica, sent el radiocontrol un dels primers sistemes presents als UAV. Per transferir dades d'usuari (com ara imatges, vídeo, etc.) en temps real des del dron a l’estació terrestre, es requereixen taxes de transmissió grans. El PA _es un element clau de la cadena del transmissor per poder garantir la transmissió de dades a grans distàncies de l’estació terrestre. A major potència de sortida, més cobertura o, alternativament, amb la mateixa cobertura, millor relació senyal-soroll (SNR) la qual cosa permet l’ús d'esquemes de modulació d'ordres superiors i, per tant, aconseguir velocitats de transmissió més altes. En el context de les comunicacions sense fils en UAVs, el consum de potència, la mida i el pes de la càrrega útil són de vital importància. Per tant, el disseny del PA ha de tenir en compte el compromís entre ample de banda, potència de sortida, linealitat i eficiència energètica (molt crític en dispositius alimentats amb bateries). El PA es pot dissenyar per maximitzar la seva eficiència energètica o la seva linealitat, però no totes dues. Per tant, per afrontar aquest compromís s'utilitzen topologies amplificadores d'alta eficiència i es deixa que el linealitzador s'encarregui de garantir els nivells necessaris de linealitat. Entre els linealitzadors, la linealització DPD és la solució preferida tant per al món acadèmic com per a la indústria, per la seva alta flexibilitat i rendiment. Per tal d'estalviar tant recursos computacionals com consum de potència, la implementació d'un DPD en lla_c obert resulta una solució molt atractiva per a les aplicacions UAV. Aquesta tesi contribueix a la linealització del PA, especialment a l'entrenament fora de línia de linealitzadors DPD en llaç obert, presentant dos mètodes diferents per reduir el cost computacional i augmentar la fiabilitat dels DPDs en llaç obert. El primer mètode se centra en l’anàlisi de l’estadística del senyal d'entrada, proposant mètodes de selecció de malla (MeS) per seleccionar les mostres més significatives per a una estimació computacionalment eficient dels paràmetres del DPD. El mètode proposat IQ MeS amb memòria es pot combinar amb tècniques de reducció del model del DPD i d'aquesta manera poder aconseguir una reducció de la complexitat computacional en el subsistema d’identificació per un factor de 65, en comparació amb l’ús de l'algoritme clàssic QR-LS i selecció de mostres d'entrenament consecutives. El segon mètode consisteix en l’ús de tècniques d'aprenentatge automàtic pel disseny del DPD quan es considera un gran nombre de graus de llibertat (paràmetres) per sintonitzar. D'una banda, l'algorisme d’optimització global adaLIPO s'utilitza per trobar la millor configuració de paràmetres d'un model polinomial amb memòria generalitzat per a DPD. D'altra banda, es proposa una estratègia per l’optimització global d'un conjunt de paràmetres clau per al disseny a nivell de circuit i sistema, que combinats amb linealització DPD i les tècniques de reducció del factor de cresta, poden maximitzar l’eficiència de PAs d'entrada dual de gran ample de banda, alhora que compleixen les especificacions de linealitat. Els avantatges d'aquestes tècniques proposades s'han validat mitjançant proves experimentals i els resultats obtinguts s'analitzen i es discuteixen al llarg d'aquesta tesi

Computationally efficient real-time digital predistortion architectures for envelope tracking power amplifiers

This paper presents and discusses two possible real-time digital predistortion (DPD) architectures suitable for envelope tracking (ET) power amplifiers (PAs) oriented at a final computationally efficient implementation in a field programmable gate array (FPGA) device. In ET systems, by using a shaping function is possible to modulate the supply voltage according to different criteria. One possibility is to use slower versions of the original RF signal’s envelope in order to relax the slew-rate (SR) and bandwidth (BW) requirements of the envelope amplifier (EA) or drain modulator. The nonlinear distortion that arises when performing ET with a supply voltage signal that follows both the original and the slow envelope will be presented, as well as the DPD function capable of compensating for these unwanted effects. Finally, two different approaches for efficiently implementing the DPD functions, a polynomial-based and a look-up table-based, will be discussed.Peer ReviewedPostprint (published version

Contribution to dimensionality reduction of digital predistorter behavioral models for RF power amplifier linearization

The power efficiency and linearity of radio frequency (RF) power amplifiers (PAs) are critical in wireless communication systems. The main scope of PA designers is to build the RF PAs capable to maintain high efficiency and linearity figures simultaneously. However, these figures are inherently conflicted to each other and system-level solutions based on linearization techniques are required. Digital predistortion (DPD) linearization has become the most widely used solution to mitigate the efficiency versus linearity trade-off. The dimensionality of the DPD model depends on the complexity of the system. It increases significantly in high efficient amplification architectures when considering current wideband and spectrally efficient technologies. Overparametrization may lead to an ill-conditioned least squares (LS) estimation of the DPD coefficients, which is usually solved by employing regularization techniques. However, in order to both reduce the computational complexity and avoid ill-conditioning problems derived from overparametrization, several efforts have been dedicated to investigate dimensionality reduction techniques to reduce the order of the DPD model. This dissertation contributes to the dimensionality reduction of DPD linearizers for RF PAs with emphasis on the identification and adaptation subsystem. In particular, several dynamic model order reduction approaches based on feature extraction techniques are proposed. Thus, the minimum number of relevant DPD coefficients are dynamically selected and estimated in the DPD adaptation subsystem. The number of DPD coefficients is reduced, ensuring a well-conditioned LS estimation while demanding minimum hardware resources. The presented dynamic linearization approaches are evaluated and compared through experimental validation with an envelope tracking PA and a class-J PA The experimental results show similar linearization performance than the conventional LS solution but at lower computational cost.La eficiencia energetica y la linealidad de los amplificadores de potencia (PA) de radiofrecuencia (RF) son fundamentales en los sistemas de comunicacion inalambrica. El principal objetivo a alcanzar en el diserio de amplificadores de radiofrecuencia es lograr simultaneamente elevadas cifras de eficiencia y de linealidad. Sin embargo, estas cifras estan inherentemente en conflicto entre si, y se requieren soluciones a nivel de sistema basadas en tecnicas de linealizacion. La linealizacion mediante predistorsion digital (DPD) se ha convertido en la solucion mas utilizada para mitigar el compromise entre eficiencia y linealidad. La dimension del modelo del predistorsionador DPD depende de la complejidad del sistema, y aumenta significativamente en las arquitecturas de amplificacion de alta eficiencia cuando se consideran los actuales anchos de banda y las tecnologfas espectralmente eficientes. El exceso de parametrizacion puede conducir a una estimacion de los coeficientes DPD, mediante minimos cuadrados (LS), mal condicionada, lo cual generalmente se resuelve empleando tecnicas de regularizacion. Sin embargo, con el fin de reducir la complejidad computacional y evitar dichos problemas de mal acondicionamiento derivados de la sobreparametrizacion, se han dedicado varies esfuerzos para investigar tecnicas de reduccion de dimensionalidad que permitan reducir el orden del modelo del DPD. Esta tesis doctoral contribuye a aportar soluciones para la reduccion de la dimension de los linealizadores DPD para RF PA, centrandose en el subsistema de identificacion y adaptacion. En concrete, se proponen varies enfoques de reduccion de orden del modelo dinamico, basados en tecnicas de extraccion de caracteristicas. El numero minimo de coeficientes DPD relevantes se seleccionan y estiman dinamicamente en el subsistema de adaptacion del DPD, y de este modo la cantidad de coeficientes DPD se reduce, lo cual ademas garantiza una estimacion de LS bien condicionada al tiempo que exige menos recursos de hardware. Las propuestas de linealizacion dinamica presentados en esta tesis se evaluan y comparan mediante validacion experimental con un PA de seguimiento de envolvente y un PA tipo clase J. Los resultados experimentales muestran unos resultados de linealizacion de los PA similares a los obtenidos cuando se em plea la solucion LS convencional, pero con un coste computacional mas reducido.Postprint (published version

Power Efficiency Enhancement and Linearization Techniques for Power Amplifiers in Wireless Communications

Wireless communication systems require Power Amplifiers (PAs) for signal transmissions. The trade-off between power efficiency and nonlinear distortion in PAs degrades the communication performance. Thus, power efficiency and nonlinearity are two main concerns of operating PAs in communication systems. Nonlinear behavioral models are typically used to quantify and mitigate the distortion effects of PAs on communication systems. This dissertation presents an estimation approach for modeling and linearizing the PA Amplitude-to-Amplitude (AM/AM) nonlinearity using the design specifications of PAs, such as gain, the third-order intercept point, and 1dB compression point. Furthermore, an enhanced approach for modeling solid-state power amplifiers is developed by modifying the Saleh empirical model. The Envelope Tracking (ET) technique for PAs has been a popular power efficiency enhancement in modern cellular systems. However, the time-varying effects of the supply voltage impacts the PA linearity. Therefore, an accurate behavioral model for PA with ET has become an important research effort to characterize the effect of dynamic supply voltage on both the amplitude and phase nonlinearities. Furthermore, the empirical models of ET PAs are widely used to improve PAs linearity by using Digital Predistortion (DPD). This dissertation develops an extended modeling approach to characterize the AM/AM and Amplitude-to-Phase (AM/PM) conversions as well as account for the impact of the time-varying supply voltage on the ET PAs. Memory effects, due to energy storage elements (e.g. capacitors and inductors) in ET PA circuits in addition to the temperature variation of integrated circuit, are modeled using digital filters (finite impulse-response filters) in series with the static AM/AM and static AM/PM nonlinearities. A least-squares approach is mathematically derived for estimating the model coefficients of ET PAs. The model identification of many coefficients requires high computational cost in Float Point Operations (FLOPS), such as multipliers and adders. In addition, the computational cost in FLOPs of a complex number is equivalent to (2-6) times the cost of real numbers. The estimation complexity of the ET PAs model in this work requires around half the number of FLOPS compared to the state-of-the-art behavioral models. This is because the modeling approach in this work consists of real coefficients and a lower number of model parameters. A DPD model is derived in this dissertation to compensate for both the AM/AM and AM/PM nonlinear distortions in ET PAs. A dual-input single-output function architecture is calculated for the DPD model to compensate for the nonlinearities in the AM/AM and AM/PM conversions contributed by the time-varying supply voltage in the ET system. Both the proposed AM/AM and AM/PM DPD models exhibit lower numbers of coefficients, which result in reduction of the identification complexity compared to the state-of-the-art DPD models. The proposed behavioral models of the ET PA and DPD are both evaluated in the time and frequency domains, as well as compared to the state-of-the-art models in terms of model accuracy and estimation complexity

Linearization of RF Power Amplifiers Using Adaptive Kalman Filtering Algorithm

International audienceIn this paper, a new linearization algorithm of Power Amplifier, based on Kalman filtering theory is proposed for obtaining fast convergence of the adaptive digital predistortion. The proposed method uses the real-time digital processing of baseband signals to compensate the nonlinearities and memory effects in radio-frequency Power Amplifier. To reduce the complexity of computing in classical Kalman Filtering, a sliding time-window has been inserted which combines off-line measurement and on-line parameter estimation with high sampling time to track the changes in the PA characteristics. We evaluated the performance of the proposed linearization scheme through simulation and experiments. Using digital signal processing, experimental results with commercial power amplifier are presented for multicarrier signals to demonstrate the effectiveness of this new approach