Development of convective reflow-projection moire warpage measurement system and prediction of solder bump reliability on board assemblies affected by warpage

Out-of-plane displacement (warpage) is one of the major thermomechanical reliability concerns for board-level electronic packaging. Printed wiring board (PWB) and component warpage results from CTE mismatch among the materials that make up the PWB assembly (PWBA). Warpage occurring during surface-mount assembly reflow processes and normal operations may cause serious reliability problems. In this research, a convective reflow and projection moire warpage measurement system was developed. The system is the first real-time, non-contact, and full-field measurement system capable of measuring PWB/PWBA/chip package warpage with the projection moire technique during different thermal reflow processes. In order to accurately simulate the reflow process and to achieve the ideal heating rate, a convective heating system was designed and integrated with the projection moire system. An advanced feedback controller was implemented to obtain the optimum heating responses. The developed system has the advantages of simulating different types of reflow processes, and reducing the temperature gradients through the PWBA thickness to ensure that the projection moire system can provide more accurate measurements. Automatic package detection and segmentation algorithms were developed for the projection moire system. The algorithms are used for automatic segmentation of the PWB and assembled packages so that the warpage of the PWB and chip packages can be determined individually. The effect of initial PWB warpage on the fatigue reliability of solder bumps on board assemblies was investigated using finite element modeling (FEM) and the projection moire system. The 3-D models of PWBAs with varying board warpage were used to estimate the solder bump fatigue life for different chip packages mounted on PWBs. The simulation results were validated and correlated with the experimental results obtained using the projection moire system and accelerated thermal cycling tests. Design of experiments and an advanced prediction model were generated to predict solder bump fatigue life based on the initial PWB warpage, package dimensions and locations, and solder bump materials. This study led to a better understanding of the correlation between PWB warpage and solder bump thermomechanical reliability on board assemblies.Ph.D.Committee Chair: Dr. Ume, I. Charles; Committee Member: Dr. Book, Wayne; Committee Member: Dr. Kim, Yeong; Committee Member: Dr. Pan, Jiahui; Committee Member: Dr. Sitaraman, Suresh; Committee Member: Dr. Wu, C. F. Jef

The durability of solder joints under thermo-mechanical loading; application to Sn-37Pb and Sn-3.8Ag-0.7Cu lead-free replacement alloy

Solder joints in electronic packages provide mechanical, electrical and thermal connections. Hence, their reliability is also a major concern to the electronic packaging industry. Ball Grid Arrays (BGAs) are a very common type of surface mount technology for electronic packaging. This work primarily addresses the thermo-mechanical durability of BGAs and is applied to the exemplar alloys; traditional leaded solder and a popular lead-free solder. Isothermal mechanical fatigue tests were carried out on 4-ball test specimens of the lead-free (Sn-3.8Ag-0.7Cu) and leaded (Sn-37Pb) solder under load control at room temperature, 35°C and 75°C. As well as this, a set of combined thermal and mechanical cycling tests were carried out, again under load control with the thermal cycles either at a different frequency from the mechanical cycles (not-in-phase) or at the same frequency (both in phase and out-of-phase). The microstructural evaluation of both alloys was investigated by carrying out a series of simulated ageing tests, coupled with detailed metallurgical analysis and hardness testing. The results were treated to produce stress-life, cyclic behaviour and creep curves for each of the test conditions. Careful calibration allowed the effects of substrate and grips to be accounted for and so a set of strain-life curves to be produced. These results were compared with other results from the literature taking into account the observations on microstructure made in the ageing tests. It is generally concluded that the TMF performance is better for the Sn-Ag-Cu alloy than for the Sn-Pb alloy, when expressed as stress-life curves. There is also a significant effect on temperature and phase for each of the alloys, the Sn-Ag-Cu being less susceptible to these effects. When expressed as strain life, the effects of temperature, phase and alloy type are much diminished. Many of these conclusions coincided with only parts of the literature and reasons for the remaining differences are advanced

Fiabilité de l’underfill et estimation de la durée de vie d’assemblages microélectroniques

Abstract : In order to protect the interconnections in flip-chip packages, an underfill material layer is used to fill the volumes and provide mechanical support between the silicon chip and the substrate. Due to the chip corner geometry and the mismatch of coefficient of thermal expansion (CTE), the underfill suffers from a stress concentration at the chip corners when the temperature is lower than the curing temperature. This stress concentration leads to subsequent mechanical failures in flip-chip packages, such as chip-underfill interfacial delamination and underfill cracking. Local stresses and strains are the most important parameters for understanding the mechanism of underfill failures. As a result, the industry currently relies on the finite element method (FEM) to calculate the stress components, but the FEM may not be accurate enough compared to the actual stresses in underfill. FEM simulations require a careful consideration of important geometrical details and material properties. This thesis proposes a modeling approach that can accurately estimate the underfill delamination areas and crack trajectories, with the following three objectives. The first objective was to develop an experimental technique capable of measuring underfill deformations around the chip corner region. This technique combined confocal microscopy and the digital image correlation (DIC) method to enable tri-dimensional strain measurements at different temperatures, and was named the confocal-DIC technique. This techique was first validated by a theoretical analysis on thermal strains. In a test component similar to a flip-chip package, the strain distribution obtained by the FEM model was in good agreement with the results measured by the confocal-DIC technique, with relative errors less than 20% at chip corners. Then, the second objective was to measure the strain near a crack in underfills. Artificial cracks with lengths of 160 μm and 640 μm were fabricated from the chip corner along the 45° diagonal direction. The confocal-DIC-measured maximum hoop strains and first principal strains were located at the crack front area for both the 160 μm and 640 μm cracks. A crack model was developed using the extended finite element method (XFEM), and the strain distribution in the simulation had the same trend as the experimental results. The distribution of hoop strains were in good agreement with the measured values, when the model element size was smaller than 22 μm to capture the strong strain gradient near the crack tip. The third objective was to propose a modeling approach for underfill delamination and cracking with the effects of manufacturing variables. A deep thermal cycling test was performed on 13 test cells to obtain the reference chip-underfill delamination areas and crack profiles. An artificial neural network (ANN) was trained to relate the effects of manufacturing variables and the number of cycles to first delamination of each cell. The predicted numbers of cycles for all 6 cells in the test dataset were located in the intervals of experimental observations. The growth of delamination was carried out on FEM by evaluating the strain energy amplitude at the interface elements between the chip and underfill. For 5 out of 6 cells in validation, the delamination growth model was consistent with the experimental observations. The cracks in bulk underfill were modelled by XFEM without predefined paths. The directions of edge cracks were in good agreement with the experimental observations, with an error of less than 2.5°. This approach met the goal of the thesis of estimating the underfill initial delamination, areas of delamination and crack paths in actual industrial flip-chip assemblies.Afin de protéger les interconnexions dans les assemblages, une couche de matériau d’underfill est utilisée pour remplir le volume et fournir un support mécanique entre la puce de silicium et le substrat. En raison de la géométrie du coin de puce et de l’écart du coefficient de dilatation thermique (CTE), l’underfill souffre d’une concentration de contraintes dans les coins lorsque la température est inférieure à la température de cuisson. Cette concentration de contraintes conduit à des défaillances mécaniques dans les encapsulations de flip-chip, telles que la délamination interfaciale puce-underfill et la fissuration d’underfill. Les contraintes et déformations locales sont les paramètres les plus importants pour comprendre le mécanisme des ruptures de l’underfill. En conséquent, l’industrie utilise actuellement la méthode des éléments finis (EF) pour calculer les composantes de la contrainte, qui ne sont pas assez précises par rapport aux contraintes actuelles dans l’underfill. Ces simulations nécessitent un examen minutieux de détails géométriques importants et des propriétés des matériaux. Cette thèse vise à proposer une approche de modélisation permettant d’estimer avec précision les zones de délamination et les trajectoires des fissures dans l’underfill, avec les trois objectifs suivants. Le premier objectif est de mettre au point une technique expérimentale capable de mesurer la déformation de l’underfill dans la région du coin de puce. Cette technique, combine la microscopie confocale et la méthode de corrélation des images numériques (DIC) pour permettre des mesures tridimensionnelles des déformations à différentes températures, et a été nommée le technique confocale-DIC. Cette technique a d’abord été validée par une analyse théorique en déformation thermique. Dans un échantillon similaire à un flip-chip, la distribution de la déformation obtenues par le modèle EF était en bon accord avec les résultats de la technique confocal-DIC, avec des erreurs relatives inférieures à 20% au coin de puce. Ensuite, le second objectif est de mesurer la déformation autour d’une fissure dans l’underfill. Des fissures artificielles d’une longueuer de 160 μm et 640 μm ont été fabriquées dans l’underfill vers la direction diagonale de 45°. Les déformations circonférentielles maximales et principale maximale étaient situées aux pointes des fissures correspondantes. Un modèle de fissure a été développé en utilisant la méthode des éléments finis étendue (XFEM), et la distribution des contraintes dans la simuation a montré la même tendance que les résultats expérimentaux. La distribution des déformations circonférentielles maximales était en bon accord avec les valeurs mesurées lorsque la taille des éléments était plus petite que 22 μm, assez petit pour capturer le grand gradient de déformation près de la pointe de fissure. Le troisième objectif était d’apporter une approche de modélisation de la délamination et de la fissuration de l’underfill avec les effets des variables de fabrication. Un test de cyclage thermique a d’abord été effectué sur 13 cellules pour obtenir les zones délaminées entre la puce et l’underfill, et les profils de fissures dans l’underfill, comme référence. Un réseau neuronal artificiel (ANN) a été formé pour établir une liaison entre les effets des variables de fabrication et le nombre de cycles à la délamination pour chaque cellule. Les nombres de cycles prédits pour les 6 cellules de l’ensemble de test étaient situés dans les intervalles d’observations expérimentaux. La croissance de la délamination a été réalisée par l’EF en évaluant l’énergie de la déformation au niveau des éléments interfaciaux entre la puce et l’underfill. Pour 5 des 6 cellules de la validation, le modèle de croissance du délaminage était conforme aux observations expérimentales. Les fissures dans l’underfill ont été modélisées par XFEM sans chemins prédéfinis. Les directions des fissures de bord étaient en bon accord avec les observations expérimentales, avec une erreur inférieure à 2,5°. Cette approche a répondu à la problématique qui consiste à estimer l’initiation des délamination, les zones de délamination et les trajectoires de fissures dans l’underfill pour des flip-chips industriels

Optimised solder interconnections in crystalline silicon (c-Si) photovoltaic modules for improved performance in elevated temperature climate

A thesis submitted in partial fulfilment of the requirements of the University of Wolverhampton for the degree of Doctor of Philosophy.The operations of c-Si PV modules in elevated temperature climates like Africa and the Middle East are plagued with poor thermo-mechanical reliability and short fatigue lives. There is the need to improve the performance of the system operating in such regions to solve the grave energy poverty and power shortages. Solder interconnection failure due to accelerated thermo-mechanical degradation is identified as the most dominant degradation mode and responsible for over 40% of c-Si PV module failures. Hence the optimisation of c-Si PV module solder interconnections for improved performance in elevated temperature climate is the focus of this research. The effects of relevant reliability influencing factors (RIFs) on the performance (thermo-mechanical degradation and fatigue life) of c-Si PV module solder interconnections are investigated utilising a combination of ANSYS finite element modelling (FEM), Taguchi L25 orthogonal array and analytical techniques. The investigated RIFs are operating temperature, material combination and interconnection geometry. Garofalo creep relations and temperature dependent Young’s Modulus of Elasticity are used to model solder properties, EVA layer is modelled as viscoelastic while the other component layers are modelled using appropriate constitutive material models. Results show that fatigue life decays with increases in ambient temperature loads. A power function model =721.48−1.343, was derived to predict the fatigue life (years) of c-Si PV modules in any climatic region. Of the various ribbon-contact material combination models investigated, Silver-Silver, Aluminium-Aluminium, Silver-Aluminium and Aluminium-Silver are the top four best performing solder interconnection models with low deformation ratios, , normalised degradation values, 1. Further findings indicate that only the solder layer demonstrates good miniaturisation properties while the standard dimensions for ribbon and contact layers remain the best performing geometry settings. Additionally, from the Taguchi robust optimisation, the Aluminium-Silver ribbon-contact material combination model (ribbon = 180μm, solder = 56μm, contact = 50μm) demonstrated the best performance in elevated temperature climate, reduced solder degradation by 95.1% and is the most suitable substitute to the conventional c-Si PV module solder interconnection in elevated temperature climate conditions – in terms of thermo-mechanical degradation. These findings presented provide more insight into the design and development of c-Si PV modules operating in elevated temperature climates by providing a fatigue life prediction model in various ambient conditions, identifying material combinations and geometry which demonstrate improved thermo-mechanical reliability and elongated fatigue life.Schlumberger Faculty for the Future Foundation (FFTF

Index to 1984 NASA Tech Briefs, volume 9, numbers 1-4

Short announcements of new technology derived from the R&D activities of NASA are presented. These briefs emphasize information considered likely to be transferrable across industrial, regional, or disciplinary lines and are issued to encourage commercial application. This index for 1984 Tech B Briefs contains abstracts and four indexes: subject, personal author, originating center, and Tech Brief Number. The following areas are covered: electronic components and circuits, electronic systems, physical sciences, materials, life sciences, mechanics, machinery, fabrication technology, and mathematics and information sciences

Mission and spacecraft support functions of the Materials Engineering Branch: A space oriented technology resource

The capabilities of the Materials Engineering Branch (MEB) of the Goddard Space Flight Center, Greenbelt, Maryland, are surveyed. The specific functions of spacecraft materials review, materials processing and information dissemination, and laboratory support, are outlined in the Activity Report. Further detail is provided by case histories of laboratory satellite support and equipment. Project support statistics are shown, and complete listings of MEB publications, patents, and tech briefs are included. MEB staff, and their respective discipline areas and spacecraft liaison associations, are listed

Micro-mechanical characteristics and dimensional change of Cu-Sn interconnects due to growth of interfacial intermetallic compounds

Sn-based solder alloys are extensively used in electronic devices to form interconnects between different components to provide mechanical support and electrical path. The formation of a reliable solder interconnects fundamentally relies on the metallurgic reaction between the molten solder and solid pad metallization in reflowing. The resultant IMC layer at the solder/pad metallization interface can grow continuously during service or aging at an elevated temperature, uplifting the proportion of IMCs in the entire solder joint. However, the essential mechanical properties of interfacial IMC (i.e. Cu6Sn5, Cu3Sn) layers, such as Young s modulus and hardness, are drastically different in comparison with Sn-based solder and substrate. Therefore, the increasing fraction of interfacial IMCs in the solder joint can lead to significant deformation incompatibility under exterior load, which becomes an important reliability concern in the uses of solder joints for electronic interconnects. In the past decades, extensive research works were implemented and reported regarding the growth of interfacial IMC layers and its effect on the mechanical integrity of solder joints. But, the following fundamental issues in terms of mechanical and microstructural evolution in the uses of solder joints still remain unclear, demanding further research to elaborate: (1) The protrusion of IMCs: Though the growth of interfacial IMC layers along the diffusion direction in solder joints were studied extensively, the growth of IMCs perpendicular to the diffusion direction were reported in only a few papers without any further detailed investigation. This phenomena can crucially govern the long-term reliability of solder interconnects, in particular, in the applications that require a robust microstructural integrity from a solder joint. (2) Fracture behaviour of interfacial IMC layers: The fracture behaviour of interfacial IMC layers is a vital factor in determining the failure mechanism of solder joints, but this was scarcely investigated due to numerous challenges to enable a potential in-situ micro-scale tests. It is therefore highly imperative to carry out such study in order to reveal the fracture behaviour of interfacial IMC layers which can eventually provide better understanding of the influence of interfacial IMC layers on the mechanical integrity of solder joints. (3) Volume shrinkage: The volume shrinkage (or solder joint collapse) induced by the growth of interfacial IMC layers was frequently ascribed as one of the main causes of the degradation of mechanical reliability during aging due to the potentially resulted voids and residual stress at the solder/substrate interface. However, very few experimental works on the characterisation of such type of volume shrinkage can be found in literatures, primarily due to the difficulties of observing the small dimensional changes that can be encountered in the course of IMCs growth. (4) Residual stress: The residual stress within solder joints is another key factor that contributes to the failure of solder joints under external loads. However, the stress evolution in solder joints as aging progresses and the potential correlation between the residual stress and the growth of interfacial IMC layers is yet to be fully understood, as stress/strain status can fundamentally alter the course of total failure of a solder joint. (5) Crack initiation and propagation in solder joints: Modelling on the mechanical behaviour of solder joints is often undertaken primarily on the stress distribution within solder joints, for instance, under a given external loading. But there is lack of utilising numerical analysis to simulate the crack initiation and propagation within solder joints, thus the effect of interfacial IMC layers on the fracture behaviour of the solder joints can be elaborated in further details. In this thesis, the growth of interfacial IMCs in parallel and perpendicular to the interdiffusion direction in the Sn99Cu1/Cu solder joints after aging was investigated and followed by observation with SEM, with an intention of correlating the growth of IMCs along these two directions with aging durations based on the measured thickness of IMC layer and height of perpendicular IMCs. The mechanism of the protrusion of IMCs and the mutual effect between the growth of IMCs along these two directions was also discussed. The tensile fracture behaviour of interfacial Cu6Sn5 and Cu3Sn layers at the Sn99Cu1/Cu interface was characterised by implementing cantilever bending tests on micro Cu6Sn5 and Cu3Sn pillars prepared by focused ion beam (FIB). The fracture stress and strain were evaluated by finite element modelling using Abaqus. The tensile fracture mechanism of both Cu6Sn5 and Cu3Sn can then be proposed and discussed based on the observed fracture surface of the micro IMC pillars. The volume shrinkage of solder joints induced by the growth of interfacial IMC layers in parallel to the interdiffusion direction in solder joint was also studied by specifically designed specimens, to enable the collapse of the solder joint to be estimated by surface profiling with Zygo Newview after increased durations of aging. Finite element modelling was also carried out to understand the residual stress potentially induced due to the volume shrinkage. The volume shrinkage in solder joints is likely to be subjected to the constraint from both the attached solder and substrate, which can lead to the build-up of residual stress at the solder/Cu interface. Depth-controlled nanoindentation tests were therefore carried out in the Sn99Cu1 solder, interfacial Cu6Sn5 layer, Cu3Sn layer and Cu with Vickers indenter after aging. The residual stress was then evaluated in the correlation with aging durations, different interlayers and the locations in the solder joint. Finally, finite element models incorporated with factors that may contribute to the failure of solder joints, including microstructure of solder joints, residual stress and the fracture of interfacial IMC, were built using Abaqus to reveal the effect of these factors on the fracture behaviour of solder joints under applied load. The effect of growth of IMC layer during aging on the fracture behaviour was then discussed to provide a better understanding of the degradation of mechanical integrity of solder joints due to aging. The results from this thesis can facilitate the understanding of the influence of interfacial IMC layers on the mechanical behaviour of solder joints due to long-term exposure to high temperatures

Research Activities of JWRI

Abstracts of the Article

Identification of damage and fracture modes in power electronic packaging from experimental micro-shear tests and finite element modeling

Micro-shear tests are performed in order to characterize the mechanical behavior and the fracture of the chip/metallized ceramic substrate assemblies of power electronic devices. These assemblies are elaborated using three types of junctions: AuGe solder/Au or Ag finish, transient liquid phase bonding (TLPB) AgIn/Ag finish and Ag nanoparticles/Au or Ag finish. The experiments are associated to finite element simulations of both nano-indentation and micro-shear tests. The mechanical behavior of the different assembly interfaces is represented using an in-built cohesive zone model (CZM) available in the user friendly finite element code Abaqus. It is worth noting that the fracture mechanisms observed during the test and service periods of the power electronic packaging are not only due to the debonding at the interfaces but also to the initiation and growth of voids in the joint. Therefore, in addition to the CZM model, Gurson-Tvergaard-Needlmann (GTN) damage model is used in combination with the Rice bifurcation theory to correctly describe the fracture in the joint and, therefore the overall fracture mechanism of the entire junction. The simulation results are compared with the experimental force displacement curves and the SEM observations in order to assess the implemented model