Photonic integration enabling new multiplexing concepts in optical board-to-board and rack-to-rack interconnects

New broadband applications are causing the datacenters to proliferate, raising the bar for higher interconnection speeds. So far, optical board-to-board and rack-to-rack interconnects relied primarily on low-cost commodity optical components assembled in a single package. Although this concept proved successful in the first generations of optical-interconnect modules, scalability is a daunting issue as signaling rates extend beyond 25 Gb/s. In this paper we present our work towards the development of two technology platforms for migration beyond Infiniband enhanced data rate (EDR), introducing new concepts in board-to-board and rack-to-rack interconnects. The first platform is developed in the framework of MIRAGE European project and relies on proven VCSEL technology, exploiting the inherent cost, yield, reliability and power consumption advantages of VCSELs. Wavelength multiplexing, PAM-4 modulation and multi-core fiber (MCF) multiplexing are introduced by combining VCSELs with integrated Si and glass photonics as well as BiCMOS electronics. An in-plane MCF-to-SOI interface is demonstrated, allowing coupling from the MCF cores to 340x400 nm Si waveguides. Development of a low-power VCSEL driver with integrated feed-forward equalizer is reported, allowing PAM-4 modulation of a bandwidth-limited VCSEL beyond 25 Gbaud. The second platform, developed within the frames of the European project PHOXTROT, considers the use of modulation formats of increased complexity in the context of optical interconnects. Powered by the evolution of DSP technology and towards an integration path between inter and intra datacenter traffic, this platform investigates optical interconnection system concepts capable to support 16QAM 40GBd data traffic, exploiting the advancements of silicon and polymer technologies

Ball lens embedded through-package via to enable backside coupling between silicon photonics interposer and board-level interconnects

Development of an efficient and densely integrated optical coupling interface for silicon photonics based board-level optical interconnects is one of the key challenges in the domain of 2.5D/3D electro-optic integration. Enabling high-speed on-chip electro-optic conversion and efficient optical transmission across package/board-level short-reach interconnections can help overcome the limitations of a conventional electrical I/O in terms of bandwidth density and power consumption in a high-performance computing environment. In this context, we have demonstrated a novel optical coupling interface to integrate silicon photonics with board-level optical interconnects. We show that by integrating a ball lens in a via drilled in an organic package substrate, the optical beam diffracted from a downward directionality grating on a photonics chip can be coupled to a board-level polymer multimode waveguide with a good alignment tolerance. A key result from the experiment was a 14 chip-to-package 1-dB lateral alignment tolerance for coupling into a polymer waveguide with a cross-section of 20 x 25. An in-depth analysis of loss distribution across several interfaces was done and a -3.4 dB coupling efficiency was measured between the optical interface comprising of output grating, ball lens and polymer waveguide. Furthermore, it is shown that an efficiency better than -2 dB can be achieved by tweaking few parameters in the coupling interface. The fabrication of the optical interfaces and related measurements are reported and verified with simulation results

Integrated GHz silicon photonic interconnect with micrometer-scale modulators and detectors

We report an optical link on silicon using micrometer-scale ring-resonator enhanced silicon modulators and waveguide-integrated germanium photodetectors. We show 3 Gbps operation of the link with 0.5 V modulator voltage swing and 1.0 V detector bias. The total energy consumption for such a link is estimated to be ~120 fJ/bit. Such compact and low power monolithic link is an essential step towards large-scale on-chip optical interconnects for future microprocessors

CMOS compatible athermal silicon microring resonators

Silicon photonics promises to alleviate the bandwidth bottleneck of modern day computing systems. But silicon photonic devices have the fundamental problem of being highly sensitive to ambient temperature fluctuations due to the high thermo-optic (TO) coefficient of silicon. Most of the approaches proposed to date to overcome this problem either require significant power consumption or incorporate materials which are not CMOS-compatible. Here we demonstrate a new class of optical devices which are passively temperature compensated, based on tailoring the optical mode confinement in silicon waveguides. We demonstrate the operation of a silicon photonic resonator over very wide temperature range of greater than 80 degrees. The fundamental principle behind this work can be extended to other photonic structures such as modulators, routers, switches and filters.Comment: 9 pages, 4 figure