On differences in the Frenco-American relations in 1995–2002

In article of Vadzim Haurylau studies the questions French-American relations in 1995-2002, conflicts and contradictions between countries in a system of international relations; analyzed specific features of French-American relations as a part of relations and disagreements in Western World.В статье рассмотрены вопросы франко-американского взаимодействия в 1995-2002 годах сквозь призму обострения двусторонних разногласий и укрепления антагонизма обеих стран на международной арене, а через это – анализ крупного раскола в лагере западных государств по линии Франция-США

Integrated GHz silicon photonic interconnect with micrometer-scale modulators and detectors

We report an optical link on silicon using micrometer-scale ring-resonator enhanced silicon modulators and waveguide-integrated germanium photodetectors. We show 3 Gbps operation of the link with 0.5 V modulator voltage swing and 1.0 V detector bias. The total energy consumption for such a link is estimated to be ~120 fJ/bit. Such compact and low power monolithic link is an essential step towards large-scale on-chip optical interconnects for future microprocessors

Design, Performance

Interconnect has become a primary bottleneck in integrated circuit design. As CMOS technology is scaled, it will become increasingly difficult for conventional copper interconnect to satisfy the design requirements of delay, power, bandwidth, and noise. On-chip optical interconnect has been considered as a potential substitute for electrical interconnect in the past two decades. In this paper, predictions of the performance of CMOS compatible optical devices are made based on current state-of-art optical technologies. Electrical and optical interconnects are compared for various design criteria based on these predictions. The critical dimensions beyond which optical interconnect becomes advantageous over electrical interconnect are shown to be approximately one tenth of the chip edge length at the 22 nm technology node

Electrical and optical on-chip interconnects in scaled microprocessors

Abstract — Interconnect has become a primary bottleneck in integrated circuit design. As CMOS technology is scaled, it will become increasingly difficult for conventional copper interconnect to satisfy the design requirements of delay, power, bandwidth, and noise. Onchip optical interconnect is therefore being considered as a potential substitute for electrical interconnect. Based on predictions of optical device development, electrical and optical interconnects are compared for various design criteria. The critical dimensions beyond which optical interconnect becomes advantageous over electrical interconnect at the 22 nm technology node are approximately one tenth of the chip edge length. I