Characterization of a Single Photon Sensing and Photon Number Resolving CMOS Detector for Astrophysics

Next-generation NASA missions, such as the LUVIOR and HabEx concepts, require single photon counting large-format detectors. Charge Coupled Devices (CCDs) have typically been used for optical applications in similar flagship missions of the past. CCDs have excellent properties in most metrics but have their own challenges for single photon counting applications. First, typical CCDs have a read noise of a few electrons, although recent modifications (EMCCDs) use an on-chip gain to amplify the signal above the read noise. Secondly, the signal is carried by charge that is transferred across the detector array. While CCDs for NASA missions are carefully fabricated to minimize defects, continuous bombardment from high energy radiation in space will damage the detector over the lifetime of the mission. This will degrade the charge transfer efficiency and in turn, reduce the single photon counting ability of the CCD. CMOS devices offer a different architecture that mitigates some of these problems. In CMOS image sensors, each pixel has its own charge to voltage converter and in-pixel amplifier mitigating issues found with charge transfer efficiency. Additional circuits that are critical to operation of the sensor can be incorporated on chip allowing for a parallel readout architecture that increases frame rate and can decrease read noise. This thesis is a collection of work for the characterization of a room temperature characterization, low-noise, single photon counting and photon number resolving CMOS detector. The work performed in this thesis will provide the framework for a technology development project funded by NASA Cosmic Origins (COR) program office. At the end of the two-year project, a megapixel CMOS focal plane array will be demonstrated to satisfy the stated needs of the LUVOIR and HabEx future astrophysics space mission concepts with a launch date near the 2040s

Radiation Effects on CMOS Active Pixel Image Sensors

Today, Complementary-Metal-Oxide-Semiconductor (CMOS) Image Sensors (CIS), also called Active Pixel Sensors (APS), are the most popular imager technology with several billions manufactured every year. They represent about 90% of the imager market and should exceed 95% in a couple of years. Compared to the main alternative imager technology, the Charge Coupled Device (CCD), CISs have several major benefits such as low-power consumption, high-integration, high speed and the capacity to integrate advanced CMOS functions on-chip (and even inside the pixel). Thanks to the latest technology innovations, CISs are now matching the performances of CCDs in terms of image quality and sensitivity placing them at the forefront even in high-end applications such as digital single-lens reflex, scientific instruments, and machine vision. Thanks to these advantages, CISs are also used in harsh radiation environment for applications such as: space applications, X-ray medical imaging, electron microscopy, nuclear facility monitoring and remote handling (nuclear power plants, nuclear waste repositories, nuclear physics facilities…), particle detection and imaging, military applications etc.. Designing, hardening and testing a sensor for such applications require the understanding of the CIS behavior when exposed to radiation sources. Understanding and improving further the intrinsically good radiation hardness of APS has been a topic of interest since its invention. This interest has been recently growing with the coming of new behaviors brought by the profound evolution of CIS technologies (as discussed throughout this manuscript) compared to the older generation mainstream CMOS processes used in early work. The aim of this chapter is to give an overview of the parasitic effects that can undergo a modern CIS when it is exposed to a high energy particle radiation field

Ultra Low Noise CMOS Image Sensors

CMOS Image Sensors (CIS) overtook the charge coupled devices (CCDs) in low noise performance. Photoelectron counting capability is the next step for CIS for ultimate low light performance and new imaging paradigms. This work presents a review of CMOS image sensors based on pinned photo diodes (PPDs). The latter includes the historical background, the PPD physics and the readout chain circuits used for low-noise performance. The physical mechanisms behind the random fluctuations affecting the signal at different levels of conventional CIS readout chains are reviewed and clarified. This thesis dedicates a particular focus to the readout circuit noise given that it precludes photoelectron counting in conventional CIS. A detailed analytical calculation of the temporal read noise (TRN) in conventional CIS readout chain is presented. The latter suggests different noise reduction techniques at process and circuit design level. Among the noise reduction techniques suggested by the analytical noise calculation, the increase of the oxide capacitance by using a thin oxide in-pixel amplifying transistor, for low 1/f noise, is suggested for the first time. A test chip designed in a 180 nm CIS process and embedding optimized readout chains exploiting the new pixels together with state-of-the-art 4T pixels optimized at process level for low 1/f noise. A mean input-referred noise of 0.4 e-rms has been measured. Compared with the state-of-the-art pixels, also present onto the test chip, the mean RMS noise is divided by more than 2. Based on these encouraging result, a full VGA (640H×480V) imager has been integrated in a standard CIS process. The presented imager relies on a 4T pixel of 6.5 µm pitch with a properly sized and biased thin oxide PMOS source follower. A full characterization of the proposed image sensor, at room temperature, is presented. The sensor chip features an input-referred noise histogram from 0.25 e-rms to a few e-rms peaking at 0.48 e-rms. This sub-0.5 electron noise performance is obtained with a full well capacity of 6400 e- and a frame rate that can go up to 80 fps. The VGA imager also features a fixed pattern noise as low as 0.77%, a lag of 0.1% and a dark current of 5.6 e-/s. Correlated multiple sampling (CMS) is a noise reduction technique commonly used in low noise CIS. This work presents an original design for CMS based on a passive switched-capacitor network, with a minimum number of capacitors. The proposed circuit requires no additional active circuitry, has no impact on the output dynamic range and does not need multiple analog-to-digital conversions. It was verified with transient noise simulations and shows a noise reduction in perfect agreement with ideal CMS. For a future perspective, the impact of the technology downscale on CIS sensitivity from an electronic read noise aspect is investigated. Active imaging in the Terahertz (THz) band is an emerging technology. Source modulation combined with a selective filtering can be used to reduce the noise in CMOS THz imagers. This work presents the first integration of a 1 kpixel CMOS THz imager integrating, in each pixel, a metal antenna with a MOS rectifier, low noise amplification and highly selective filtering, based on a switch-capacitor N-path filter combined with a broad band Gm-C filter. The latter has been tested successfully. An input-referred noise of 0.2 µV RMS corresponding to a total noise equivalent THz power of 0.6 nW at 270 GHz and 0.8 nW at 600 GHz

Combined C-V/I-V and RTN CMOS Variability Characterization Using An On-Chip Measurement System

With the number of transistors integrated into a single integrated circuit (IC) crossing the one-billion mark and complementary metal-oxide-semiconductor (CMOS) technology scaling pushing device dimensions ever-so-close to atomic scales, variability in transistor performance is becoming the dominant constraint in modern-day CMOS IC design. Developing novel approaches for device characterization, which allow a detailed study of electrical transistor characteristics across large statistical sample sets, is crucial for the proper identification, characterization, and modeling of different physical sources of device variability. On-chip characterization methodologies have the potential to address all of these issues by enabling the characterization of large statistical device sample sets, while also allowing for high measurement quality and throughput. In this work, a fully-integrated system for on-chip combined capacitance-voltage (C-V) and current-voltage (I-V) characterization of a large integrated test transistor array implemented in a 45-nm bulk CMOS process is presented. On-chip I-V characterization is implemented using a four-point Kelvin measurement technique with 12-bit sub-10 nA current measurement resolution, 10-bit sub-1 mV voltage measurement resolution, and sampling speeds on the order of 100 kHz. C-V characterization is performed using a novel leakage- and parasitics-insensitive charge-based capacitance measurement (CBCM) technique with atto-Farad resolution. The on-chip system is employed in developing a comprehensive CMOS transistor variability characterization methodology, studying both random and systematic sources of quasi-static device variability. For the first time, combined C-V/I-V characterization of circuit-representative devices is demonstrated and used to extract variations in the under- lying physical parameters of the device. Additionally, the fast current sampling capabilities of the system are used for the characterization of random telegraph noise (RTN) in small area devices. An automated methodology for the extraction of RTN parameters is developed, and the statistics of RTN are studied across device type, bias, and geometry

Nevada Test Site-Directed Research, Development, and Demonstration

The Nevada Test Site-Directed Research, Development, and Demonstration (SDRD) program completed a very successful year of research and development activities in FY 2005. Fifty new projects were selected for funding this year, and five FY 2004 projects were brought to conclusion. The total funds expended by the SDRD program were $5.4 million, for an average per project cost of just under$100,000. Two external audits of SDRD accounting practices were conducted in FY 2005. Both audits found the program's accounting practices consistent with the requirements of DOE Order 413.2A, and one included the observation that the NTS contractor ''did an exceptional job in planning and executing year-start activities.'' Highlights for the year included: the filing of 18 invention disclosures for intellectual property generated by FY 2005 projects; programmatic adoption of 17 FY 2004 SDRD-developed technologies; participation in the tri-lab Laboratory Directed Research and Development (LDRD) and SDRD program review that was broadly attended by NTS, NNSA, LDRD, and U.S. Department of Homeland Security representatives; peer reviews of all FY 2005 projects; and the successful completion of 55 R&D projects, as presented in this report

Advanced scanners and imaging systems for earth observations

Assessments of present and future sensors and sensor related technology are reported along with a description of user needs and applications. Five areas are outlined: (1) electromechanical scanners, (2) self-scanned solid state sensors, (3) electron beam imagers, (4) sensor related technology, and (5) user applications. Recommendations, charts, system designs, technical approaches, and bibliographies are included for each area

2.5D Chiplet Architecture for Embedded Processing of High Velocity Streaming Data

This dissertation presents an energy efficient 2.5D chiplet-based architecture for real-time probabilistic processing of high-velocity sensor data, from an autonomous real-time ubiquitous surveillance imaging system. This work addresses problems at all levels of description. At the lowest physical level, new standard cell libraries have been developed for ultra-low voltage CMOS synthesis, as well as custom SRAM memory blocks, and mixed-signal physical true random number generators based on the perturbation of Sigma-Delta structures using random telegraph noise (RTN) in single transistor devices. At the chip level architecture, an innovative compact buffer-less switched circuit mesh network on chip (NoC) capable of reaching very high throughput (1.6Tbps), finite packet delay delivery, free from packet dropping, and free from dead-locks and live-locks, was designed for this chiplet-based solution. Additionally, a second NoC connecting processors in the network, was implemented based on token-rings, allowing access to external DDR memory. Furthermore, a new clock tree distribution network, and a wide bandwidth DRAM physical interface have been designed to address the data flow requirements within and across chiplets. At the algorithm and representation levels, the Online Change Point Detection (CPD) algorithm has been implemented for on-line learning of background-foreground segmentation. Instead of using traditional binary representation of numbers, this architecture relies on unconventional processing of signals using a bio-inspired (spike-based) unary representation of numbers, where these numbers are represented in a stochastic stream of Bernoulli random variables. By using this representation, probabilistic algorithms can be executed in a native architecture with precision on demand, where if more accuracy is required, more computational time and power can be allocated. The SoC chiplet architecture has been extensively simulated and validated using state of the art CAD methodology, and has been submitted to fabrication in a dedicated 55nm GF CMOS technology wafer run. Experimental results from fabricated test chips in the same technology are also presented

NASA Tech Briefs, April 1997

Topics covered include: Video and Imaging; Electronic Components and Circuits; Electronic Systems; Physical Sciences; Materials; Computer Programs; Mechanics; Machinery/Automation; Manufacturing/Fabrication; Mathematics and Information Sciences; Life Sciences; Books and Reports

The Supercam Instrument Suite on the NASA Mars 2020 Rover: Body Unit and Combined System Tests

The SuperCam instrument suite provides the Mars 2020 rover, Perseverance, with a number of versatile remote-sensing techniques that can be used at long distance as well as within the robotic-arm workspace. These include laser-induced breakdown spectroscopy (LIBS), remote time-resolved Raman and luminescence spectroscopies, and visible and infrared (VISIR; separately referred to as VIS and IR) reflectance spectroscopy. A remote micro-imager (RMI) provides high-resolution color context imaging, and a microphone can be used as a stand-alone tool for environmental studies or to determine physical properties of rocks and soils from shock waves of laser-produced plasmas. SuperCam is built in three parts: The mast unit (MU), consisting of the laser, telescope, RMI, IR spectrometer, and associated electronics, is described in a companion paper. The on-board calibration targets are described in another companion paper. Here we describe SuperCam’s body unit (BU) and testing of the integrated instrument. The BU, mounted inside the rover body, receives light from the MU via a 5.8 m optical fiber. The light is split into three wavelength bands by a demultiplexer, and is routed via fiber bundles to three optical spectrometers, two of which (UV and violet; 245–340 and 385–465 nm) are crossed Czerny-Turner reflection spectrometers, nearly identical to their counterparts on ChemCam. The third is a high-efficiency transmission spectrometer containing an optical intensifier capable of gating exposures to 100 ns or longer, with variable delay times relative to the laser pulse. This spectrometer covers 535–853 nm (105–7070 cm−1 Raman shift relative to the 532 nm green laser beam) with 12 cm−1 full-width at half-maximum peak resolution in the Raman fingerprint region. The BU electronics boards interface with the rover and control the instrument, returning data to the rover. Thermal systems maintain a warm temperature during cruise to Mars to avoid contamination on the optics, and cool the detectors during operations on Mars. Results obtained with the integrated instrument demonstrate its capabilities for LIBS, for which a library of 332 standards was developed. Examples of Raman and VISIR spectroscopy are shown, demonstrating clear mineral identification with both techniques. Luminescence spectra demonstrate the utility of having both spectral and temporal dimensions. Finally, RMI and microphone tests on the rover demonstrate the capabilities of these subsystems as well