Electrodeposition and characterisation of lead-free solder alloys for electronics interconnection

Conventional tin-lead solder alloys have been widely used in electronics interconnection owing to their properties such as low melting temperature, good ductility and excellent wettability on copper and other substrates. However, due to the worldwide legislation addressing the concern over the toxicity of lead, the usage of lead-containing solders has been phased out, thus stimulating substantial efforts on lead-free alternatives, amongst which eutectic Sn-Ag and Sn-Cu, and particularly Sn-Ag-Cu alloys, are promising candidates as recommended by international parties. To meet the increasing demands of advanced electronic products, high levels of integration of electronic devices are being developed and employed, which is leading to a reduction in package size, but with more and more input/output connections. Flip chip technology is therefore seen as a promising technique for chip interconnection compared with wire bonding, enabling higher density, better heat dissipation and a smaller footprint. This thesis is intended to investigate lead-free (eutectic Sn-Ag, Sn-Cu and Sn-Ag-Cu) wafer level solder bumping through electrodeposition for flip chip interconnection, as well as electroplating lead-free solderable finishes on electronic components. The existing knowledge gap in the electrochemical processes as well as the fundamental understanding of the resultant tin-based lead-free alloys electrodeposits are also addressed. For the electrodeposition of the Sn-Cu solder alloys, a methanesulphonate based electrolyte was established, from which near-eutectic Sn-Cu alloys were achieved over a relatively wide process window of current density. The effects of methanesulphonic acid, thiourea and OPPE (iso-octyl phenoxy polyethoxy ethanol) as additives were investigated respectively by cathodic potentiodynamic polarisation curves, which illustrated the resultant electrochemical changes to the electrolyte. Phase identification by X-ray diffraction showed the electrodeposits had a biphasic structure (β-Sn and Cu6Sn5). Microstructures of the Sn-Cu electrodeposits were comprehensively characterised, which revealed a compact and crystalline surface morphology under the effects of additives, with cross-sectional observations showing a uniform distribution of Cu6Sn5 particles predominantly along β-Sn grain boundaries. The electrodeposition of Sn-Ag solder alloys was explored in another pyrophosphate based system, which was further extended to the application for Sn-Ag-Cu solder alloys. Cathodic potentiodynamic polarisation demonstrated the deposition of noble metals, Ag or Ag-Cu, commenced before the deposition potential of tin was reached. The co-deposition of Sn-Ag or Sn-Ag-Cu alloy was achieved with the noble metals electrodepositing at their limiting current densities. The synergetic effects of polyethylene glycol (PEG) 600 and formaldehyde, dependent on reaching the cathodic potential required, helped to achieve a bright surface, which consisted of fine tin grains (~200 nm) and uniformly distributed Ag3Sn particles for Sn-Ag alloys and Ag3Sn and Cu6Sn5 for Sn-Ag-Cu alloys, as characterised by microstructural observations. Near-eutectic Sn-Ag and Sn-Ag-Cu alloys were realised as confirmed by compositional analysis and thermal measurements. Near-eutectic lead-free solder bumps of 25 μm in diameter and 50 μm in pitch, consisting of Sn-Ag, Sn-Cu or Sn-Ag-Cu solder alloys depending on the process and electrolyte employed, were demonstrated on wafers through the electrolytic systems developed. Lead-free solder bumps were further characterised by material analytical techniques to justify the feasibility of the processes developed for lead-free wafer level solder bumping

Study of intermetallic compound layer formation, growth and evaluation of shear strength of lead-free solder joints

Solder joints play a very important role in electronic products as the integrity of electronics packaging and assembly rests on the quality of these connections. The increasing demands for higher performance, lower cost, and miniaturisation in hand-held and consumer electronic products have led to the use of dense interconnections. This miniaturization trend means that solder joint reliability remains an important challenge with surface mount electronics assembly, especially those used in hostile environments, and applications such as automobile, aerospace and other safety critical operations. One of the most important factors which are known to affect solder joint reliability is the thickness of intermetallic compound (IMC) layer formed between the solder and the substrate. Although the formation of an IMC layer signifies good bonding between the solder and substrate, its main disadvantage is that it is also known to be the most brittle part of the solder joint. Thus as the miniaturisation trend continues, and solder joints become even smaller in size, the nature and impact of IMC layer thickness on solder joint reliability becomes even more of a concern with the introduction of new lead-free soldering. Other factors which are known to affect solder joint reliability include the bonding strength, the voiding percentage in joints, the size of the voids and their location within the joint. The work reported in this thesis on formation and growth of intermetallic compound layer, and evaluation of the shear strength of lead-free solder joints is divided into four main parts. The first part of the study is concerned with understanding of the effect of pad sizes on Inter-metallic compound layer formation and growth for lead-free solder joints. The second part concerns the study of the effect of temperature cycling and reflow profiles on intermetallic growth between Sn-Ag-Cu alloy and Cu substrate. The third part of the study concerns the investigation of the effect of reflow soldering profile optimization on solder volumes using design of experiment technique. The focus of the final part of the study is the investigation of the effect of Inter-metallic Compound thickness on shear strength of 1206 surface mount chip resistor. The results from the experimental work showed that the pad size has very little influence on the growth of the IMC. The result also shows that the growth of IMC depends on diffusion rate, temperature and time according to the power-law model; and that the IMC layer thickness is independent of pad size. The significance of this result is that with further reductions in joint size (with IMC layer thickness remaining the same), the ratio of the IMC layer thickness to solder joint size will increase and adversely impact the joint reliability. The work carried out on ageing temperatures and reflow profiles of Sn-Ag-Cu alloy and Cu substrate also showed the reaction-diffusion mechanism of intermetallic compound formation and growth in solder joints. The study also showed that the most significant factor in achieving lower IMC layer thickness and fine microstructures is the time to peak temperature of the reflow soldering process. The effect of IMC layer thickness on the shear strength of Sn-Ag-Cu solder joints was investigated. The relationship of shear strength, interfacial microstructures and fracture surfaces was considered. It is clear that formation of continuous Cu-Sn and SnNiCu layers are the reason for the weak interface strength. The results show that the shear strength of solder joints decreases with increasing ageing time. The results of this study have been disseminated through journal and conference publications and will be of interest to R&D personnel working in the area of high temperature electronics and in particular those working in the field of automotive electronics

Microstructural and mechanical characteristics of micro-scale intermetallic compounds interconnections

Following the continually increasing demand for high-density interconnection and multilayer packaging for chips, solder bump size has decreased significantly over the years, this has led to some challenges in the reliability of interconnects. This thesis presents research into the resulting effects of miniaturization on the interconnection with Sn-solder, especially focusing on the full intermetallics (IMCs) micro-joints which appear in the 3D IC stacking packaging. Thereby, systematic studies have been conducted to study the microstructural evolution and reliability issues of Cu-Sn and Cu-Sn-Ni IMCs micro-joints. (1) Phenomenon of IMCs planar growth: The planar IMCs interlayer was asymmetric and composed of (Cu,Ni)6Sn5 mainly in Ni/Sn (2.5~5 µm)/Cu interconnect. Meanwhile, it was symmetric two-layer structure in Cu/Sn (2.5~5 µm)/Cu interconnect with the Cu3Sn fine grains underneath Cu6Sn5 cobblestone-shape-like grains for each IMCs layer. Besides, it is worth noticing that the appearance of Cu-rich whiskers (the mixture of Cu/Cu2O/SnOx/Cu6Sn5) could potentially lead to short-circuit in the cases of ultra-fine (<10 µm pitch) interconnects for the miniaturization of electronics devices. (2) Microstructural evolution process of Cu-Sn IMCs micro-joint: The simultaneous solidification of IMCs interlayer supressed the scalloped growth of Cu6Sn5 grains in Cu/Sn (2.5 µm)/Cu interconnect during the transient liquid phase (TLP) soldering process. The growth factor of Cu3Sn was in the range of 0.29~0.48 in Cu-Cu6Sn5 diffusion couple at 240~290 °C, which was impacted significantly by the type of substrates. And the subsequent homogenization process of Cu3Sn grains was found to be consistent with the description of flux-driven ripening (FDR) theory. Moreover, Kirkendall voids appeared only in the Cu3Sn layer adjacent to Cu-plated substrate, and this porous Cu3Sn micro-joint was mechanically robust during the shear test. (3) Microstructural evolution of Cu-Sn-Ni IMCs micro-joint: There was obvious inter-reaction between the interfacial reactions in Ni/Sn (1.5 µm)/Cu interconnect. The growth factor of (Cu,Ni)3Sn on Cu side was about 0.36 at 240 °C, and the reaction product on Ni side was changed from Ni3Sn4 into (Cu,Ni)6Sn5 with the increase of soldering temperature. In particular, the segregation of Ni atoms occurred along with phase transformation at 290 °C and thereby stabilized the (Cu,Ni)6Sn5 phase for the high Ni content of 20 at.%. (4) Micro-mechanical characteristics of Cu-Sn-Ni IMCs micro-joint: The Young s modulus and hardness of Cu-Sn-Ni IMCs were measured by nanoindentation test, such as 160.6±3.1 GPa/ 7.34±0.14 GPa for (Cu,Ni)6Sn5 and 183.7±4.0 GPa/ 7.38±0.46 GPa for (Cu,Ni)3Sn, respectively. Besides, in-situ nano-compression tests have been conducted on IMCs micro-cantilevers, the fracture strength turns out to be 2.46 GPa. And also, the ultimate tensile stress was calculated to be 2.3±0.7 GPa from in-situ micro-bending tests, which is not sensitive with the microstructural change of IMCs after dwelling at 290 °C

Novel fine pitch interconnection methods using metallised polymer spheres

There is an ongoing demand for electronics devices with more functionality while reducing size and cost, for example smart phones and tablet personal computers. This requirement has led to significantly higher integrated circuit input/output densities and therefore the need for off-chip interconnection pitch reduction. Flip-chip processes utilising anisotropic conductive adhesives anisotropic conductive films (ACAs/ACFs) have been successfully applied in liquid crystal display (LCD) interconnection for more than two decades. However the conflict between the need for a high particle density, to ensure sufficient the conductivity, without increasing the probability of short circuits has remained an issue since the initial utilization of ACAs/ACFs for interconnection. But this issue has become even more severe with the challenge of ultra-fine pitch interconnection. This thesis advances a potential solution to this challenge where the conductive particles typically used in ACAs are selectively deposited onto the connections ensuring conductivity without bridging. The research presented in this thesis work has been undertaken to advance the fundamental understanding of the mechanical characteristics of micro-sized metal coated polymer particles (MCPs) and their application in fine or ultra-fine pitch interconnections. This included use of a new technique based on an in-situ nanomechanical system within SEM which was utilised to study MCP fracture and failure when undergoing deformation. Different loading conditions were applied to both uncoated polymer particles and MCPs, and the in-situ system enables their observation throughout compression. The results showed that both the polymer particles and MCP display viscoelastic characteristics with clear strain-rate hardening behaviour, and that the rate of compression therefore influences the initiation of cracks and their propagation direction. Selective particle deposition using electrophoretic deposition (EPD) and magnetic deposition (MD) of Ni/Au-MCPs have been evaluated and a fine or ultra-fine pitch deposition has been demonstrated, followed by a subsequent assembly process. The MCPs were successfully positively charged using metal cations and this charging mechanism was analysed. A new theory has been proposed to explain the assembly mechanism of EPD of Ni/Au coated particles using this metal cation based charging method. The magnetic deposition experiments showed that sufficient magnetostatic interaction force between the magnetized particles and pads enables a highly selective dense deposition of particles. Successful bonding to form conductive interconnections with pre-deposited particles have been demonstrated using a thermocompression flip-chip bonder, which illustrates the applicable capability of EPD of MCPs for fine or ultra-fine pitch interconnection

Electrodeposition of indium bumps for ultrafine pitch interconnections

Microelectronics integration continuously follows the trend of miniaturisation for which the technologies enabling fine pitch interconnection are in high demand. The recent advancement in the assembly of Hybrid Pixel Detectors, a high resolution detecting and imaging device, is an example of where novel materials and processes can be applied for ultra-fine pitch interconnections. For this application, indium is often used for the fine pitch bump bonding process due to its unique properties that make it especially suitable, in particular in a cryogenic environment where some types of detector have to serve. Indium bumps are typically fabricated through vacuum evaporation at the wafer level; however, this thesis investigates an alternative low cost manufacturing process at the wafer scale for the deposition of indium micro-bumps through electroplating. The work has placed its emphasis on the requirements of future technologies which will enable a low temperature ( 40,000 IOs/cm2) with a high throughput and high production yield. This research is a systematic investigation of the wafer-scale indium bumping process through electrodeposition using indium sulphamate solution. An intensive experimental study of micro-bump formation has been carried out to elaborate the effects of two of the main electroplating factors that can significantly influence the quality of bumps in the course of electrodeposition, namely the current distribution and mass transport. To adjust the current density distribution, various waveforms of current input, including direct current (DC), unipolar pulse current and bipolar pulse reverse current, were employed in the experiments. To assist mass transportation prior to or during electroplating, acoustic agitation including ultrasonic agitation at 30 kHz frequency as well as megasonic agitation at 1 MHz, were utilised. The electrochemical properties of the indium sulphamate solution were first investigated using non-patterned plain substrates prior to indium bumping trials. This provided understanding of the microstructural characteristics of indium deposits produced by electroplating and, through cathodic polarisation measurements, the highest current density suitable for electrodeposition was achieved as approximately 30 mA/cm2 when electroplating was carried out at room temperature and with no agitation applied. The typical surface morphology of DC electroplated indium contained a granular structure with a surface feature size as large as 10 µm. Pulse and pulse reverse electroplating significantly altered the surface morphology of the deposits and the surface became much smoother. By introducing acoustic agitation, the current density range suitable for electrodeposition could be significantly expanded due to the greater mass transfer, which led to a higher speed of deposition with high current efficiency. Wafer-scale indium bumping (15 µm to 25 µm diameter) at a minimum pitch size of 25 µm was successfully developed through electroplating trials with 3 inch test wafers and subsequently applied onto the standard 4 inch wafers. The results demonstrate the capability of electroplating to generate high quality indium bumps with ultrafine pitch at a high consistency and yield. To maximise the yield, pre-wetting of the ultrafine pitch photoresist patterns by both ultrasonic or megasonic agitation is essential leading to a bumping yield up to 99.9% on the wafer scale. The bump profiles and their uniformity at both the wafer and pattern scale were measured and the effects of electrodeposition regimes on the bump formation evaluated. The bump uniformity and microstructure at the feature scale were also investigated by cross-sectioning the electroplated bumps from different locations on the wafers. The growth mechanism of indium bumps were proposed on the basis of experimental observation. It was found that the use of a conductive current thief ring can homogenise the directional bump uniformity when the electrical contact is made asymmetrically, and improve the overall uniformity when the electrical contact is made symmetrically around the periphery of the wafer. Both unipolar pulse electroplating and bipolar pulse reverse electroplating improved the uniformity of the bump height at the wafer scale and pattern scale, and the feature scale uniformity could be significantly improved by pulse reverse electroplating. The best uniformity of 13.6% for a 4 inch wafer was achieved by using pulse reverse electroplating. The effect of ultrasonic agitation on the process was examined, but found to cause damage to the photoresist patterns if used for extended periods and therefore not suitable for use throughout indium bumping. Megasonic agitation enabled high speed bumping without sacrifice of current efficiency and with little damage to the photoresist patterns. However, megasonic agitation tended to degrade some aspects of wafer scale uniformity and should therefore be properly coupled with other electroplating parameters to assist the electroplating process.EThOS - Electronic Theses Online ServiceGBUnited Kingdo

Développement d’un procédé d’électrodéposition séquentielle pour fabrication des microbilles à haute densité

Aujourd’hui l’industrie des semiconducteurs aborde une époque requérant le couplage de l’innovation au niveau de l'assemblage avec la mise à l’échelle des dispositifs. Cette dernière n’est plus l’élément clé qui propulse l’évolution technologique à cause de l’énorme investissement requis vis-à-vis sa rentabilité qui devient de plus en plus limitée. Avec la réorientation de l’intérêt de la majorité des acteurs vers l’innovation au niveau des assemblages, cette thèse s’inscrit dans un contexte d’amélioration de la fiabilité des assemblages de larges puces renversées pour le calul haute performance à travers le développement des microbilles de brasures à faible coût et de métallurgie optimisée. Des microbilles de brasure à faible coût et hétérogènes sont proposées comme une approche simple qui présente des bénéfices métallurgiques et économiques. D’une part, l’électrodéposition séquentielle des couches de Sn et Ag pures au lieu d’alliage est réalisée à un faible coût d’acquisition et avec une simplicité de maintenance. D’une autre part, la même installation d’électrodéposition de Sn et Ag purs peut servir à la fabrication d’une multitude de brasures avec différentes teneurs en Ag. Malgré le besoin d’une standardisation des procédés de fabrication des microbilles, les motivations citées précédemment peuvent constituer un facteur d’attraction pour l’industrie afin de l’adopter comme alternative à l’électrodéposition conventionnelle des alliages. En plus de son faible coût, l’approche de fabrication des microbilles par électrodéposition séquentielle amène une flexibilité métallurgique avec l’utilisation d’une barrière qui limite la diffusion d’Ag. Cette dernière résulte en une microbille de brasure unique, qui peut à la fois i) avoir une structure hétérogène avec une faible teneur en Ag dont la ductilité élevée est maintenue à proximité des couches fragiles de la métallisation de la puce lors des étapes de l’assemblage; ii) avoir une forme en pilier dont des bénéfices sont similaires à ceux du pilier en Cu en évitant les effets néfastes de sa rigidité sur les couches du BEOL. Les différentes étapes de fabrication des microbilles de brasure ont été développées en se limitant à des procédés qui peuvent être intégrés facilement dans un environnement de production industrielle. La manipulation de la métallurgie des joints de brasure a été réalisée avec succès en démontrant une structure hétérogène unique de brasure dans un assemblage de puces renversées

Properties and behaviour of Pb-free solders in flip-chip scale solder interconnections

Due to pending legislations and market pressure, lead-free solders will replace Sn–Pb solders in 2006. Among the lead-free solders being studied, eutectic Sn–Ag, Sn–Cu and Sn–Ag–Cu are promising candidates and Sn–3.8Ag–0.7Cu could be the most appropriate replacement due to its overall balance of properties. In order to garner more understanding of lead-free solders and their application in flip-chip scale packages, the properties of lead free solders, including the wettability, intermetallic compound (IMC) growth and distribution, mechanical properties, reliability and corrosion resistance, were studied and are presented in this thesis. [Continues.

Deposition and application of electroless Ni–W–P under bump metallisation for high temperature lead-free solder interconnects

A reliable and robust diffusion barrier, commonly known as under bump metallisation (UBM), is indispensable in solder interconnects in order to retard the interfacial reaction rate, hence the growth of intermetallic compounds (IMCs). However, electroless Ni-P coatings are not adequate to inhibit interfacial reactions effectively since the formation of columnar structure and voids in the crystalline Ni3P layer in hybrid automotive devices (operating temperature above 300ºC) can significantly deteriorate the mechanical integrity of solder joints. In this thesis, electroless Ni-W-P coatings, as an effective UBM capable to serving under high temperature (up to 450ºC), are developed, characterised and subsequently applied onto the high temperature lead-free solder interconnects. [Continues.

Pulse Electrodeposition of Lead-Free Tin-Based Composites for Microelectronic Packaging

This chapter provides a detailed overview of the various Sn-based composites solders reinforced with ceramic nanoparticles. These solders are lead free in nature and are produced by various process like powder metallurgy, ball milling, casting as well as simple and economic pulse co-electrodeposition technique. In this chapter, various electrodeposited composite solders, their synthesis, characterization, and evaluation of various properties for microelectronic packaging applications, such as microstructure, microhardness, density and porosity, wear and friction, electrochemical corrosion, melting point, electrical resistivity, and residual stress of the monolithic Sn-based and (nano)composite solders have been presented and discussed. This chapter is divided into the following sections: such as introduction to microelectronic packaging, synthesis routes for solders and composites, various nanoreinforcement, and the mechanism of incorporation in solder matrix, the pulse co-electrodeposition technique, the various factors affecting composite deposition, and the improved properties of composite solders over monolithic solders for microelectronic packaging applications are also summarized here

Simulation and characterisation of electroplated micro-copper columns for electronic interconnection

Growth mechanism of electroplated copper columns has been systematically studied by simulations and characterizations. A two-dimensional cross-sectional kinetic Monte Carlo (2DCS-KMC) model has been developed to simulate the electrodeposition of single crystal copper. The evolution of the microstructure has been visualized. The cluster density, average cluster size, variance of the cluster size and average aspect ratio were obtained from the simulations. The growth history of the deposition from the first atom to an equivalent of 100 monolayers was reconstructed. Following the single-lattice 2DCS-KMC model for a single crystal, a two-dimensional cross-sectional poly-lattice kinetic Monte Carlo (2DCSP-KMC) model has been developed for simulation of the electrodeposition of polycrystalline copper on both a copper and a gold substrate. With this model, the early-stage nucleation and the grain growth after impingement of nuclei can be simulated; as such the entire growth history is reconstructed in terms of the evolution of microstructure, grain statistics and grain boundary misorientation. The model is capable of capturing some key aspects of nucleation and growth mechanisms including the nucleation type (e.g. homogeneous or heterogeneous), texture development, the growth of grains and higher energetic state of grain boundaries. The model has also proven capable of capturing the effects of deposition parameters including applied electrode potential, concentration of cupric ions and temperature. Their effects are largely dependent on the substrates. The early-stage electrocrystallization of Cu on polycrystalline Au has been studied by ex-situ AFM observations. The evolution of surface morphology of the electrodeposited copper on a sputtered Au seed layer from 16ms to 1000s was observed and their formation mechanism discussed. The heterogeneous nucleation phenomenon, the competitive growth both longitudinally and laterally, and the dominant growth of some nuclei were experimentally observed, which are also visualized by the relevant KMC simulation results at a smaller size scale and a shorter time scale. A heuristic model is therefore proposed to describe the mechanism of the early-stage electrocrystallization of Cu on a polycrystalline Au seed layer. Electroplated copper columns plated for different times have been characterized in terms of the evolution of their external morphology, cross-sectional microstructure and crystal structure. The microstructure of electroplated copper columns is characteristic of bi-modal or tri-modal grain size distribution. The results indicate that recrystallization has occurred during or after the plating, top-down and laterally. Slight changes of the crystal structure were observed by in-situ XRD and it was found that the changes of the (111) and (200) planes occurred at different stages of self-annealing. Finally, the results indicate the presence of organic additives is not essential for self-annealing of a copper column to occur