149 research outputs found
Highly Linear 2,5-V CMOS ΣΔ Modulator for ADSL+
We present a 90-dB spurious-free dynamic range sigma–delta modulator (ΣΔM) for asymmetric digital subscriber line applications (both ADSL and ADSL+), with up to a 4.4-MS/s digital output rate. It uses a cascade (MASH) multibit architecture and has been implemented in a 2.5-V supply, 0.25μm CMOS process with metal–insulator–metal capacitors. The prototypes feature 78-dB dynamic range (DR) in the 30-kHz to 2.2-MHz band (ADSL+) and 85-dB DR in the 30-kHz to 1.1-MHz band (ADSL). Integral and differential nonlinearity are within +/-0.85 and +/-0.80 LSB, respectively. The ΣΔ modulator and its auxiliary blocks (clock phase and reference voltage generators, and I/O buffers) dissipate 65.8 mW. Only 55 mW are dissipated in the ΣΔ modulator.This work was supported by the European Union under IST Project 29261/MIXMODEST and IST Project 2001-34283/TAMES-2 and the Spanish MCyT and the ERDF under Project TIC2001-0929/ADAVERE.This work was supported by the European Union under IST Project 29261/MIXMODEST and IST Project 2001-34283/TAMES-2 and the Spanish MCyT and the ERDF under Project TIC2001-0929/ADAVERE.Peer reviewe
Oversampled analog-to-digital converter architectures based on pulse frequency modulation
Mención Internacional en el título de doctorThe purpose of this research work is providing new insights in the development
of voltage-controlled oscillator based analog-to-digital converters (VCO-based
ADCs). Time-encoding based ADCs have become of great interest to the designer
community due to the possibility of implementing mostly digital circuits,
which are well suited for current deep-submicron CMOS processes. Within this
topic, VCO-based ADCs are one of the most promising candidates.
VCO-based ADCs have typically been analyzed considering the output phase
of the oscillator as a state variable, similar to the state variables considered in __
modulation loops. Although this assumption might take us to functional designs
(as verified by literature), it does not take into account neither the oscillation
parameters of the VCO nor the deterministic nature of quantization noise. To
overcome this issue, we propose an interpretation of these type of systems based
on the pulse frequency modulation (PFM) theory. This permits us to analytically
calculate the quantization noise, in terms of the working parameters of the system.
We also propose a linear model that applies to VCO-based systems. Thanks to
it, we can determine the different error processes involved in the digitization of
the input data, and the performance limitations which these processes direct to.
A generic model for any order open-loop VCO-based ADCs is made based on the
PFM theory. However, we will see that only the first-order case and a second order
approximation can be implemented in practice. The PFM theory also
allows us to propose novel approaches to both single-stage and multistage VCObased
architectures. We describe open-loop architectures such as VCO-based
architectures with digital precoding, PFM-based architectures that can be used
as efficient ADCs or MASH architectures with optimal noise-transfer-function
(NTF) zeros. We also make a first approach to the proposal and analysis of closed loop
architectures. At the same time, we deal with one of the main limitations of
VCOs (especially those built with ring oscillators), which is the non-linear voltage to-
frequency relation. In this document, we describe two techniques mitigate this
phenomenon.
Firstly, we propose to use a pulse width modulator in front of the VCO. This
way, there are only two possible oscillation states. Consequently, the oscillator
works linearly. To validate the proposed technique, an experimental prototype
was implemented in a 40-nm CMOS process. The chip showed noise problems
that degraded the expected resolution, but allowed us to verify that the potential
performance was close to the expected one. A potential signal-to-noise-distortion
ratio (SNDR) equal to 56 dB was achieved in 20 MHz bandwidth, consuming
2.15 mW with an occupied area equal to 0.03 mm2. In comparison to other equivalent systems, the proposed architecture is simpler, while keeping similar
power consumption and linearity properties.
Secondly, we used a pulse frequency modulator to implement a second ADC.
The proposed architecture is intrinsically linear and uses a digital delay line to
increase the resolution of the converter. One experimental prototype was implemented
in a 40-nm CMOS process using one of these architectures. Proper results
were measured from this prototype. These results allowed us to verify that the
PFM-based architecture could be used as an efficient ADC. The measured peak
SNDR was equal to 53 dB in 20 MHz bandwidth, consuming 3.5 mW with an
occupied area equal to 0.08 mm2. The architecture shows a great linearity, and
in comparison to related work, it consumes less power and occupies similar area.
In general, the theoretical analyses and the architectures proposed in the
document are not restricted to any application. Nevertheless, in the case of the
experimental chips, the specifications required for these converters were linked to
communication applications (e.g. VDSL, VDSL2, or even G.fast), which means
medium resolution (9-10 bits), high bandwidth (20 MHz), low power and low
area.El propósito del trabajo presentado en este documento es aportar una nueva perspectiva
para el diseño de convertidores analógico-digitales basados en osciladores
controlados por tensión. Los convertidores analógico-digitales con codificación
temporal han llamado la atención durante los últimos años de la comunidad de
diseñadores debido a la posibilidad de implementarlos en su gran mayoría con
circuitos digitales, los cuales son muy apropiados para los procesos de diseño
manométricos. En este ámbito, los convertidores analógico-digitales basados en
osciladores controlados por tensión son uno de los candidatos más prometedores.
Los convertidores analógico-digitales basados en osciladores controlados por
tensión han sido típicamente analizados considerando que la fase del oscilador
es una variable de estado similar a las que se observan en los moduladores __.
Aunque esta consideración puede llevarnos a diseños funcionales (como se puede
apreciar en muchos artículos de la literatura), en ella no se tiene en cuenta ni
los parámetros de oscilación ni la naturaleza determinística del ruido de cuantificación. Para solventar esta cuestión, en este documento se propone una interpretación alternativa de este tipo de sistemas haciendo uso de la teoría de
la modulación por frecuencia de pulsos. Esto nos permite calcular de forma
analítica las ecuaciones que modelan el ruido de cuantificación en función de los
parámetros de oscilación. Se propone también un modelo lineal para el análisis de
convertidores analógico-digitales basados en osciladores controlados por tensión.
Este modelo permite determinar las diferentes fuentes de error que se producen
durante el proceso de digitalización de los datos de entrada y las limitaciones
que suponen. Un modelo genérico de convertidor de cualquier orden se propone
con la ayuda de este modelo. Sin embargo, solo los casos de primer orden y una
aproximación al caso de segundo orden se pueden implementar en la práctica.
La teoría de la modulación por frecuencia de pulsos también permite nuevas perspectivas
para la propuesta y el análisis tanto de arquitecturas de una sola etapa
como de arquitecturas de varias etapas construidas con osciladores controlados
por tensión. Se proponen y se describen arquitecturas en lazo abierto como son
las basadas en osciladores controlador por tensión con moduladores digitales en
la etapa de entrada, moduladores por frecuencia de pulsos que se utilizan como
convertidores analógico-digitales eficientes o arquitecturas en cascada en las que
se optimizan la distribución de los ceros en la función de transferencia del ruido.
También se realiza una aproximación a la propuesta y el análisis de arquitecturas
en lazo cerrado. Al mismo tiempo, se aborda una de las problemáticas más importantes
de los osciladores controlados por tensión (especialmente en aquellos
implementados mediante osciladores en anillo): la relación tensión-freculineal que presentan este tipo de circuitos. En el documento, se describen dos
técnicas cuyo objetivo es mitigar esta limitación.
La primera técnica de corrección se basa en el uso de un modulador por
ancho de pulsos antes del oscilador controlado por tensión. De esta forma, solo
existen dos estados de oscilación en el oscilador, se trabaja de forma lineal y
no se genera distorsión en los datos de salida. La técnica se propone de forma
teórica haciendo uso de la teoría desarrollada previamente. Para llevar a cabo
la validación de la propuesta teórica se fabricó un prototipo experimental en un
proceso CMOS de 40-nm. El chip mostró problemas de ruido que limitaban la
resolución, sin embargo, nos permitió velicar que la resolución ideal que se podrá
haber obtenido estaba muy cercana a la resolución esperada. Se obtuvo una
potencial relación señal-(ruido-distorsión) igual a 56 dB en 20 MHz de ancho de
banda, un consumo de 2.15 mW y un área igual a 0.03 mm2. En comparación con
sistemas equivalentes, la arquitectura propuesta es más simple al mismo tiempo
que se mantiene el consumo así como la linealidad.
A continuación, se propone la implementación de un convertidor analógico digital
mediante un modulador por frecuencia de pulsos. La arquitectura propuesta
es intrínsecamente lineal y hace uso de una línea de retraso digital con
el fin de mejorar la resolución del convertidor. Como parte del trabajo experimental,
se fabricó otro chip en tecnología CMOS de 40 nm con dicha arquitectura,
de la que se obtuvieron resultados notables. Estos resultados permitieron
verificar que la arquitectura propuesta, en efecto, podrá emplearse como convertidor
analógico-digital eficiente. La arquitectura consigue una relación real
señal-(ruido-distorsión) igual a 53 dB en 20 MHz de ancho de banda, un consumo
de 3.5 mW y un área igual a 0.08 mm2. Se obtiene una gran linealidad y, en
comparación con arquitecturas equivalentes, el consumo es menor mientras que
el área ocupada se mantiene similar.
En general, las aportaciones propuestas en este documento se pueden aplicar a
cualquier tipo de aplicación, independientemente de los requisitos de resolución,
ancho de banda, consumo u área. Sin embargo, en el caso de los prototipos
fabricados, las especificaciones se relacionan con el ámbito de las comunicaciones
(VDSL, VDSL2, o incluso G.fast), en donde se requiere una resolución media
(9-10 bits), alto ancho de banda (20 MHz), manteniendo bajo consumo y baja
área ocupada.Programa Oficial de Doctorado en Ingeniería Eléctrica, Electrónica y AutomáticaPresidente: Michael Peter Kennedy.- Secretario: Antonio Jesús López Martín.- Vocal: Jörg Hauptman
MEASUREMENT AND ANALYSIS OF SEA WAVES NEAR A REFLECTIVE STRUCTURE
Merged with duplicate record 10026.1/2047 on 06.20.2017 by CS (TIS)Methods and equipment for the measurement of ocean waves were reviewed
and their suitability assessed for the aim of this project: field measurement
of sea waves near a reflective coastal structure such as a breakwater. None
was found to be suitable. The functional and performance objectives are set
out for a new system. The evolution of the final design, based on an array
of pressure sensors, is described. The whole system is intended to be
deployed on the sea-bed. It is fully self contained and independent of shore
based services. Located away from the surf zone it is well placed to survive
storm conditions and unauthorised interference.
Theoretical methods for the re-construction of surface elevation records
from measured sub-surface pressures, and the experimental findings of other
workers, are presented. Available methods of estimating the wave
directional spectrum from a spatial array of surface elevation records are
reviewed, and the most appropriate one implemented.
The system has given extensive service at a number of coastal defence sites.
The results of subsequent analysis of selected data sets are presented in
detail. They show the pronounced nodal structure in amplitude expected in
the presence of wave reflection, clearly demonstrating that a single point
measurement is likely to give misleading estimates of incident wave height.
For near-calm to moderate, shore-normal incident wave conditions the
results were found to agree with theoretical predictions both of wave height
as a function of distance offshore, and of the structure's
frequency-dependent reflection coefficient. For rougher conditions, in
which both theoretical and physical models are less applicable, the results
agreed with visual observations
Efficient audio signal processing for embedded systems
We investigated two design strategies that would allow us to efficiently process audio signals on embedded systems such as mobile phones and portable electronics. In the first strategy, we exploit properties of the human auditory system to process audio signals. We designed a sound enhancement algorithm to make piezoelectric loudspeakers sound "richer" and "fuller," using a combination of bass extension and dynamic range compression. We also developed an audio energy reduction algorithm for loudspeaker power management by suppressing signal energy below the masking threshold. In the second strategy, we use low-power analog circuits to process the signal before digitizing it. We designed an analog front-end for sound detection and implemented it on a field programmable analog array (FPAA). The sound classifier front-end can be used in a wide range of applications because programmable floating-gate transistors are employed to store classifier weights. Moreover, we incorporated a feature selection algorithm to simplify the analog front-end. A machine learning algorithm AdaBoost is used to select the most relevant features for a particular sound detection application. We also designed the circuits to implement the AdaBoost-based analog classifier.PhDCommittee Chair: Anderson, David; Committee Member: Hasler, Jennifer; Committee Member: Hunt, William; Committee Member: Lanterman, Aaron; Committee Member: Minch, Bradle
On-line health monitoring of passive electronic components using digitally controlled power converter
This thesis presents System Identification based On-Line Health Monitoring to analyse the dynamic behaviour of the Switch-Mode Power Converter (SMPC), detect, and diagnose anomalies in passive electronic components. The anomaly detection in this research is determined by examining the change in passive component values due to degradation. Degradation, which is a long-term process, however, is characterised by inserting different component values in the power converter. The novel health-monitoring capability enables accurate detection of passive electronic components despite component variations and uncertainties and is valid for different topologies of the switch-mode power converter.
The need for a novel on-line health-monitoring capability is driven by the need to improve unscheduled in-service, logistics, and engineering costs, including the requirement of Integrated Vehicle Health Management (IVHM) for electronic systems and components. The detection and diagnosis of degradations and failures within power converters is of great importance for aircraft electronic manufacturers, such as Thales, where component failures result in equipment downtime and large maintenance costs. The fact that existing techniques, including built-in-self test, use of dedicated sensors, physics-of-failure, and data-driven based health-monitoring, have yet to deliver extensive application in IVHM, provides the motivation for this research ... [cont.]
Wired, wireless and wearable bioinstrumentation for high-precision recording of bioelectrical signals in bidirectional neural interfaces
It is widely accepted by the scientific community that bioelectrical signals, which can be used for the identification of neurophysiological biomarkers indicative of a diseased or pathological state, could direct patient treatment towards more effective therapeutic strategies. However, the design and realisation of an instrument that can precisely record weak bioelectrical signals in the presence of strong interference stemming from a noisy clinical environment is one of the most difficult challenges associated with the strategy of monitoring bioelectrical signals for diagnostic purposes. Moreover, since patients often have to cope with the problem of limited mobility being connected to bulky and mains-powered instruments, there is a growing demand for small-sized, high-performance and ambulatory biopotential acquisition systems in the Intensive Care Unit (ICU) and in High-dependency wards.
Furthermore, electrical stimulation of specific target brain regions has been shown to alleviate symptoms of neurological disorders, such as Parkinson’s disease, essential tremor, dystonia, epilepsy etc. In recent years, the traditional practice of continuously stimulating the brain using static stimulation parameters has shifted to the use of disease biomarkers to determine the intensity and timing of stimulation. The main motivation behind closed-loop stimulation is minimization of treatment side effects by providing only the necessary stimulation required within a certain period of time, as determined from a guiding biomarker. Hence, it is clear that high-quality recording of local field potentials (LFPs) or electrocorticographic (ECoG) signals during deep brain stimulation (DBS) is necessary to investigate the instantaneous brain response to stimulation, minimize time delays for closed-loop neurostimulation and maximise the available neural data.
To our knowledge, there are no commercial, small, battery-powered, wearable and wireless recording-only instruments that claim the capability of recording ECoG signals, which are of particular importance in closed-loop DBS and epilepsy DBS. In addition, existing recording systems lack the ability to provide artefact-free high-frequency (> 100 Hz) LFP recordings during DBS in real time primarily because of the contamination of the neural signals of interest by the stimulation artefacts.
To address the problem of limited mobility often encountered by patients in the clinic and to provide a wide variety of high-precision sensor data to a closed-loop neurostimulation platform, a low-noise (8 nV/√Hz), eight-channel, battery-powered, wearable and wireless multi-instrument (55 × 80 mm2) was designed and developed. The performance of the realised instrument was assessed by conducting both ex vivo and in vivo experiments. The combination of desirable features and capabilities of this instrument, namely its small size (~one business card), its enhanced recording capabilities, its increased processing capabilities, its manufacturability (since it was designed using discrete off-the-shelf components), the wide bandwidth it offers (0.5 – 500 Hz) and the plurality of bioelectrical signals it can precisely record, render it a versatile tool to be utilized in a wide range of applications and environments.
Moreover, in order to offer the capability of sensing and stimulating via the same electrode, novel real-time artefact suppression methods that could be used in bidirectional (recording and stimulation) system architectures are proposed and validated. More specifically, a novel, low-noise and versatile analog front-end (AFE), which uses a high-order (8th) analog Chebyshev notch filter to suppress the artefacts originating from the stimulation frequency, is presented. After defining the system requirements for concurrent LFP recording and DBS artefact suppression, the performance of the realised AFE is assessed by conducting both in vitro and in vivo experiments using unipolar and bipolar DBS (monophasic pulses, amplitude ranging from 3 to 6 V peak-to-peak, frequency 140 Hz and pulse width 100 µs). Under both in vitro and in vivo experimental conditions, the proposed AFE provided real-time, low-noise and artefact-free LFP recordings (in the frequency range 0.5 – 250 Hz) during stimulation. Finally, a family of tunable hardware filter designs and a novel method for real-time artefact suppression that enables wide-bandwidth biosignal recordings during stimulation are also presented. This work paves the way for the development of miniaturized research tools for closed-loop neuromodulation that use a wide variety of bioelectrical signals as control signals.Open Acces
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