Metodi per il calcolo di funzioni elementari in alta precisione

Nella tesi vengono descritti e analizzati i principali metodi per il calcolo di funzioni elementari in alta precisione. Particolare interesse e' rivolto alla complessità degli algoritmi in termini di operazioni binarie. Nel primo capitolo che ha carattere introduttivo vengono presentati i principali strumenti utilizzati nel seguito della tesi. In particolare si riportano i metodi asintoticamente veloci per l'aritmetica di numeri interi e floating point quali il metodo di Karatsuba e i metodi basati sull'uso della FFT. Vengono riportate le proprietà di convergenza del metodo di Newton e la sua applicazione al calcolo di radici. Il secondo capitolo è dedicato ai metodi per il calcolo della funzione esponenziale. Si discutono i metodi basati sulla serie di Taylor, sugli approssimanti di Padé e sull'algoritmo AGM. Il terzo capitolo é rivolto al calcolo della funzione logaritmo. Oltre ai metodi basati sullo sviluppo in serie si considerano metodi che utilizzano l'inversione della funzione esponenziale ottenuta mediante l'iterazione di Newton. Il calcolo delle funzioni trigonometriche è considerato nel quarto capitolo in cui si trattano metodi basati su serie di potenze, approssimanti di Padé, iterazione AGM e tecniche CORDIC

Reconfigurable Signal Processing and DSP Hardware Generator for 5G Transmitters

To impose the reconfigurability and reusability of digital circuits for millimeterwave transmitter architectures, high-speed digital signal processing architectures are explored. The digital front-end of these next-generation transmitters can be implemented up to the maximum operating frequency to meet the requirements of the 5G NR FR2 frequency bands. This paper presents an efficient implementation of a reconfigurable digital signal processor (DSP) that contains programmable multistage multirate filters, operable up to 4 GHz, and a flexible generator for polar, outphasing, and multilevel outphasing modulation. The system achieves an excellent ACLR of 42 dB and EVM degradation of 1.61% with a 7-bit phase signal at a sampling frequency of 4 GHz for outphasing modulation. Digital synthesis of the circuit in a 22 nm FDSOI process results in a core area of 0.12 mm2and an estimated power consumption of 142 mW for a 200 MHz bandwidth 5G NR baseband signal.acceptedVersionPeer reviewe

Блок обчислення функцій арктангенса і модуля вектора

Робота присвячена огляду властивостей алгоритму CORDIC та зроблено висновок про те, що алгоритм CORDIC може бути використаний в двох режимах – «поворот» і «вектор». Досліджено головні області використання досліджуваного алгоритму та перелічено основні підходи до його класифікації. Проведено аналіз можливостей мови VHDL та названо її функціональні можливості. Коротко описано її походження та проаналізовано способи використання на практиці. Досліджено та проаналізовано архітектурно- структурну організацію ПЛІС. Розглянуті сучасні напрямки розвитку ПЛІС- технологій.The paper reviews the properties of the CORDIC algorithm and concludes that the CORDIC algorithm can be used in two modes – «rotation» and «vector». The main areas of application of the algorithm under study are investigated and the main approaches to its classification are described. An analysis of the capabilities of the VHDL language and named its functionality. Its use is briefly described and ways of using it in practice are analyzed. The architectural and structural organization of FPGA is studied and analyzed. Modern trends in the development of FPGA technologies are considered

Super - cordic: Low delay cordic architectures for computing complex functions

This thesis proposes an optimized Co-ordinate Rotation Digital Computer (CORDIC) algorithm in the rotation and extended vectoring mode of the circular co-ordinate system. The CORDIC algorithm computes the values of trigonometric functions and their inverses. The proposed algorithm provides the result with a lower overall latency than existing systems. This is done by using redundant representations and approximations of the required direction and angle of each rotation. The algorithm has been designed to provide the result in a fixed number of iterations $n$ for the rotation mode and $3\lceil n/2 \rceil + \lfloor n/2 \rfloor$ for the extended vectoring mode; where, $n$ is a design parameter. In each iteration, the algorithm performs between 0 and $p/n$ parallel rotations, where, $p$ is the number of precision bits and $n$ is the selected number of iterations. A technique to handle the scaling factor compensation for such an algorithm is proposed. The results of the functional verification for different values of $n$ and an estimation of the overall latency are presented. Based on the results, guidelines to choosing a value of $n$ to meet the required performance have also been presented.M.S

Optimisation of a self-mixing laser displacement sensor

Optical Feedback Interferometry, also known as Self-Mixing, results in compact, selfaligned and contact-less sensors. In this phenomenon, a portion of the laser beam is back reflected from the target and enters the active laser cavity to vary its spectral properties. The laser diode then simultaneously acts as a light source, a micro- nterferometer as well as a light detector. In this thesis, a self-mixing displacement sensor has been optimised so that precise measurement can be obtained in real-time. The sensor is robust to the disappearance of self-mixing fringes for harmonic vibrations. It is also able to auto-adapt itself to a change in the optical feedback regime and so can extract displacement from the weak as well as moderate feedback regime signals. The use of adaptive optics, in the form of a liquid lens, has also been demonstrated for this sensor, which has allowed us to maintain the sensor in a fringe-loss less regime. The influence of speckle has also been reduced so that the sensor can now measure up to the centimetric range for non-cooperative targets. A novel technique has also been presented that makes the sensor insensitive to parasitic mechanical vibrations that would falsify the measurement under industrial conditions

TFermion: a non-Clifford gate cost assessment library of quantum phase estimation algorithms for quantum chemistry

Quantum Phase Estimation is one of the most useful quantum computing algorithms for quantum chemistry and as such, significant effort has been devoted to designing efficient implementations. In this article, we introduce TFermion, a library designed to estimate the T-gate cost of such algorithms, for an arbitrary molecule. As examples of usage, we estimate the T-gate cost of a few simple molecules and compare the same Taylorization algorithms using Gaussian and plane-wave basis

Frequency-domain method for measuring alpha factor by self-mixing interferometry

Linewidth enhancement factor, also known as the alpha factor, is a fundamental characteristic parameter of a laser diode (LD). It characterises the broadening of the laser linewidth, the frequency chirp, the injection lock range and the response to external optical feedback. In the past few decades, extensive researches have been dedicated to the measurement of alpha. Among all the existing approaches, the methods based on selfmixing interferometry (SMI) are considered the most simple and effective. The core components of a SMI consist of an LD, a lens and a moving target. When a portion of laser light backscattered or reflected by the external target and re-enters the laser cavity, a modulated lasing field will be generated. The modulated laser power is also called SMI signal, which carries the information of target movement and LD related parameters, including alpha

Low-voltage embedded biomedical processor design

Thesis (Ph. D.)--Massachusetts Institute of Technology, Dept. of Electrical Engineering and Computer Science, 2010.Cataloged from PDF version of thesis.Includes bibliographical references (p. 180-190).Advances in mobile electronics are fueling new possibilities in a variety of applications, one of which is ambulatory medical monitoring with body-worn or implanted sensors. Digital processors on such sensors serve to analyze signals in real-time and extract key features for transmission or storage. To support diverse and evolving applications, the processor should be flexible, and to extend sensor operating lifetime, the processor should be energy-efficient. This thesis focuses on architectures and circuits for low power biomedical signal processing. A general-purpose processor is extended with custom hardware accelerators to reduce the cycle count and energy for common tasks, including FIR and median filtering as well as computing FFTs and mathematical functions. Improvements to classic architectures are proposed to reduce power and improve versatility: an FFT accelerator demonstrates a new control scheme to reduce datapath switching activity, and a modified CORDIC engine features increased input range and decreased quantization error over conventional designs. At the system level, the addition of accelerators increases leakage power and bus loading; strategies to mitigate these costs are analyzed in this thesis. A key strategy for improving energy efficiency is to aggressively scale the power supply voltage according to application performance demands. However, increased sensitivity to variation at low voltages must be mitigated in logic and SRAM design. For logic circuits, a design flow and a hold time verification methodology addressing local variation are proposed and demonstrated in a 65nm microcontroller functioning at 0.3V. For SRAMs, a model for the weak-cell read current is presented for near-V supply voltages, and a self-timed scheme for reducing internal bus glitches is employed with low leakage overhead. The above techniques are demonstrated in a 0.5-1.OV biomedical signal processing platform in 0.13p-Lm CMOS. The use of accelerators for key signal processing enabled greater than 10x energy reduction in two complete EEG and EKG analysis applications, as compared to implementations on a conventional processor.by Joyce Y. S. Kwong.Ph.D

Hardware-accelerated image features with subpixel accuracy for SLAM localization and object detection

Die Navigation von autonomen Systemen wird durch den Fortschritt der Technik und durch die steigenden Anforderungen der Anwendungen immer komplexer. Eines der wichtigsten offenen Probleme ist die Genauigkeit und die Robustheit der merkmalsbasierten SLAM-Lokalisierung für Anwendungen im dreidimensionalen Raum. In dieser Arbeit werden Methoden zur Optimierung der Merkmalserkennung mit Subpixel-genauer Bestimmung der Merkmalsposition für merkmalsbasiserte 6-DoF SLAM Verfahren untersucht. Zusätzlich wird eine Erweiterung des Merkmalsdeskriptors mit Farbinformationen und einer Subpixel-genauen Rotation des Deskriptor-Patterns betrachtet. Aus den Ergebnissen der Untersuchung wird das Subpixel-accurate Oriented AGAST and Rotated BRIEF (SOARB) Verfahren zur Merkmalserkennung entwickelt, dass trotz der effizienten und Ressourcen-optimierten Implementierung eine Verbesserung der Lokalisierung und Kartenerstellung in Relation zu anderen vergleichbaren Verfahren erreicht. Durch den Einsatz eines PCIe FPGA-Beschleunigers und der Xilinx SDAccel HW-SW-Codesign Umgebung mit OpenCL Unterstützung wird eine FPGA-basierte Version des SOARB Algorithmus zur Anbindung an SLAM-Systeme gezeigt. Die FPGA-Implementierung des SOARB-Verfahrens erreicht dabei Bildraten von 41 Bildern/s. Sie ist damit um Faktor 2,6x schneller als die schnellste getestete GPU-basierte Implementierung der OpenCV-Bibliothek mit Sub-pixel-genauer Bestimmung der Merkmalsposition. Durch eine geringe Leistungsaufnahme von 13,7W der FPGA-Komponente kann die Leistungseffizienz (Bilder/s pro Watt) des Gesamtsystems im Vergleich zu einer ebenfalls erstellten SOARB GPU-Referenzimplementierung um den Faktor 1,28x gesteigert werden. Der SOARB-Algorithmus wird zur Evaluation in das RTAB-Map SLAM System integriert und erreicht in Tests mit Bildaufnahme-Sequenzen aus dem Straßenverkehr eine Verbesserung des Translations- und Rotationsfehlers von durchschnittlich 22% und 19% im Vergleich zu dem häufig genutzten ORB-Verfahren. Die maximale Verbesserung des Root Mean Square Errors (RMSE) liegt bei 50% für die Translation und 40% für die Rotation. Durch einen Deskriptor mit Farbinformationen kann das SOARB-RGB Verfahren in der Evaluation mit dem Oxford Datensatz zur Bewertung von affinen kovarianten Merkmalen ein sehr gutes Inlier-Verhältnis von 99,2% über die ersten drei Bildvergleiche aller Datensätze erzielen.The navigation of autonomous systems is becoming more and more complex due to advances in technology and the increasing demands of applications. One of the most critical open issues is the accuracy and robustness of feature-based SLAM localization for three-dimensional SLAM applications. In this work the optimization of feature detection with subpixel-accurate features points for feature-based 6-DoF SLAM methods is investigated. In addition, an extension of the feature descriptor with color information and sub-pixel accurate rotation of the descriptor pattern is evaluated. This work develops a Subpixel-accurate Oriented AGAST and Rotated BRIEF (SOARB) feature extraction that, despite the efficient and resource-optimized implementation, improves localization and mapping compared to other comparable algorithms. Using a PCIe FPGA accelerator and the Xilinx SDAccel HW-SW Codesign environment with OpenCL support an FPGA-based version of the SOARB algorithm for interfacing to SLAM systems is demonstrated. The hardware implementation uses high-throughput pipeline processing and parallel units for computation. For faster processing, the subpixel interpolation and a bilinear interpolation is performed in fixed-point arithmetic and the angle calculation is implemented using a CORDIC method. The FPGA implementation of the SOARB algorithm achieves frame rates of 41 frames/s. Thus, it is a factor of 2.6 times faster than the fastest of the tested GPU-based OpenCV implementation with subpixel-accurate feature positions. With a low power consumption of 13.7W of the FPGA component, the overall system power efficiency (fps per watt) can be increased by a factor of 1.28x compared to an implemented SOARB-GPU reference implementation. For evaluation the SOARB algorithm is integrated into the RTAB Map SLAM system. It achieves an average of 22% and 19% improvement in translational and rotational errors compared to the commonly used ORB feature extraction in tests with dataset sequences for autonomous driving. The maximum improvement in root mean square error (RMSE) is 50% for translation and 40% for rotation. To analyze the impact of descriptor with color information, the SOARB-RGB method ist evaluated using the Oxford dataset for affine covariant features. The SOARB-RGB achieves a very good inlier-ratio of 99.2% over the first three dataset image of all datasets