A temporal logic approach to modular design of synthetic biological circuits

We present a new approach for the design of a synthetic biological circuit whose behaviour is specified in terms of signal temporal logic (STL) formulae. We first show how to characterise with STL formulae the input/output behaviour of biological modules miming the classical logical gates (AND, NOT, OR). Hence, we provide the regions of the parameter space for which these specifications are satisfied. Given a STL specification of the target circuit to be designed and the networks of its constituent components, we propose a methodology to constrain the behaviour of each module, then identifying the subset of the parameter space in which those constraints are satisfied, providing also a measure of the robustness for the target circuit design. This approach, which leverages recent results on the quantitative semantics of Signal Temporal Logic, is illustrated by synthesising a biological implementation of an half-adder

Computers from plants we never made. Speculations

We discuss possible designs and prototypes of computing systems that could be based on morphological development of roots, interaction of roots, and analog electrical computation with plants, and plant-derived electronic components. In morphological plant processors data are represented by initial configuration of roots and configurations of sources of attractants and repellents; results of computation are represented by topology of the roots' network. Computation is implemented by the roots following gradients of attractants and repellents, as well as interacting with each other. Problems solvable by plant roots, in principle, include shortest-path, minimum spanning tree, Voronoi diagram, $\alpha$-shapes, convex subdivision of concave polygons. Electrical properties of plants can be modified by loading the plants with functional nanoparticles or coating parts of plants of conductive polymers. Thus, we are in position to make living variable resistors, capacitors, operational amplifiers, multipliers, potentiometers and fixed-function generators. The electrically modified plants can implement summation, integration with respect to time, inversion, multiplication, exponentiation, logarithm, division. Mathematical and engineering problems to be solved can be represented in plant root networks of resistive or reaction elements. Developments in plant-based computing architectures will trigger emergence of a unique community of biologists, electronic engineering and computer scientists working together to produce living electronic devices which future green computers will be made of.Comment: The chapter will be published in "Inspired by Nature. Computing inspired by physics, chemistry and biology. Essays presented to Julian Miller on the occasion of his 60th birthday", Editors: Susan Stepney and Andrew Adamatzky (Springer, 2017

Synthesis of Topological Quantum Circuits

Topological quantum computing has recently proven itself to be a very powerful model when considering large- scale, fully error corrected quantum architectures. In addition to its robust nature under hardware errors, it is a software driven method of error corrected computation, with the hardware responsible for only creating a generic quantum resource (the topological lattice). Computation in this scheme is achieved by the geometric manipulation of holes (defects) within the lattice. Interactions between logical qubits (quantum gate operations) are implemented by using particular arrangements of the defects, such as braids and junctions. We demonstrate that junction-based topological quantum gates allow highly regular and structured implementation of large CNOT (controlled-not) gate networks, which ultimately form the basis of the error corrected primitives that must be used for an error corrected algorithm. We present a number of heuristics to optimise the area of the resulting structures and therefore the number of the required hardware resources.Comment: 7 Pages, 10 Figures, 1 Tabl

Direct neural-network hardware-implementation algorithm

An algorithm for compact neural network hardware implementation is presented, which exploits special properties of the Boolean functions describing the operation of artificial neurones with step activation function. The algorithm contains three steps: ANN mathematical model digitisation, conversion of the digitised model into a logic gate structure, and hardware optimisation by elimination of redundant logic gates. A set of C++ programs automates algorithm implementation, generating optimised VHDL code. This strategy bridges the gap between ANN design software and hardware design packages (Xilinx). Although the method is directly applicable only to neurones with step activation functions, it can be extended to sigmoidal functions

Compositional circuit design with asynchronous concepts

PhD ThesisSynchronous circuits are pervasive in modern digital systems, such as smart-phones, wearable devices and computers. Synchronous circuits are controlled by a global clock signal, which greatly simplifies their design but is also a limitation in some applications. Asynchronous circuits are a logical alternative: they do not use a global clock to synchronise their components. Instead, every component reacts to input events at the rate they occur. Asynchronous circuits are not widely adopted by industry, because they are often harder to design and require more sophisticated tools and formal models. Signal Transition Graphs (STGs) is a well-studied formal model for the specification, verification and synthesis of asynchronous circuits with state-of-the-art tool support. STGs use a graphical notation where vertices and arcs specify the operation of an asynchronous circuit. These graphical specifications can be difficult to describe compositionally, and provide little reusability of useful sections of a graph. In this thesis we present Asynchronous Concepts, a new design methodology for asynchronous circuit design. A concept is a self-contained description of a circuit requirement, which is composable with any other concept, allowing compositional specification of large asynchronous circuits. Concepts can be shared, reused and extended by users, promoting the reuse of behaviours within single or multiple specifications. Asynchronous Concepts can be translated to STGs to benefit from the existing theory and tools developed by the asynchronous circuits community. Plato is a software tool developed for Asynchronous Concepts that supports the presented design methodology, and provides automated methods for translation to STGs. The design flow which utilises Asynchronous Concepts is automated using Plato and the open-source toolsuite Workcraft, which can use the translated STGs in verification and synthesis using integrated tools. The proposed language, the design flow, and the supporting tools are evaluated on real-world case studies

Training Single Walled Carbon Nanotube based Materials to perform computation

This thesis illustrates the use of Single Walled Carbon Nanotube based materials for the solution of various computational problems by using the process of computer controlled evolution. The study aims to explore and identify three dimensions of a form of unconventional computing called, `Evolution-in-materio'. First, it focuses on identifying suitable materials for computation. Second, it explores suitable methods, i.e. optimisation and evolutionary algorithms to train these materials to perform computation. And third, it aims to identify suitable computational problems to test with these materials. Different carbon based materials, mainly single walled carbon nano-tubes with their varying concentrations in polymers have been studied to be trained for different computational problems using the principal of `evolution-in-materio'. The conductive property of the materials is used to train these materials to perform some meaningful computation. The training process is formulated as an optimisation problem with hardware in loop. It involves the application of an external stimuli (voltages) on the material which brings changes in its electrical properties. In order to train the material for a specific computational problem, a large number of configuration signals need to be tested to find the one that transforms the incident signal in such a way that a meaningful computation can be extracted from the material. An evolutionary algorithm is used to identify this configuration data and using a hardware platform, this data is transformed into incident signals. Depending on the computational problem, the specific voltages signals when applied at specific points on to the material, as identified by an evolutionary algorithm, can make the material behave as a Logic gate, a tone discriminator or a data classifier. The problem is implemented on two types of hardware platforms, one a more simple implementation using mbed ( a micro- controller) and other is a purpose-built platform for `Evolution-in-materio" called Mecobo. The results of this study showed that the single walled carbon nanotube composites can be trained to perform simple computational tasks (such as tone discriminator, AND, OR logic gates and a Half adder circuit), as well as complex computational problems such as Full Adder circuit and various binary and multiple class machine learning problems. The study has also identified the suitability of using evolutionary algorithms such as Particle Swarm Optimisation algorithm (PSO) and Differential evolution for finding solutions of complex computational problems such as complex logic gates and various machine learning classification problems. The implementation of classification problem with the carbon nanotube based materials also identified the role of a classifier. It has been found that K-nearest neighbour method and its variant kNN ball tree algorithm are more suitable to train carbon nanotube based materials for different classification problems. The study of varying concentrations of single walled carbon nanotubes in fixed polymer ratio for the solution of different computational problems provided an indication of the link between single walled carbon nanotubes concentration and ability to solve computational problem. The materials used in this study showed stability in the results for all the considered computational problems. These material systems can compliment the current electronic technology and can be used to create a new type of low energy and low cost electronic devices. This offers a promising new direction for evolutionary computation