10,787 research outputs found

    Current Mirror With Programmable Floating Gate

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    Systems and methods are discussed for using a floating-gate MOSFET as a programmable reference circuit. One example of the programmable reference circuit is a programmable voltage reference source, while a second example of a programmable reference circuit is a programmable reference current source. The programmable voltage reference source and/or the reference current source may be incorporated into several types of circuits, such as comparator circuits, current-mirror circuits, and converter circuits. Comparator circuits and current-mirror circuits are often incorporated into circuits such as converter circuits. Converter circuits include analog-to-digital converters and digital-to-analog converters.Georgia Tech Research Corporatio

    Agenator: An open source computer-controlled dry aging system for beef

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    Dry aging of beef is a process where beef is exposed to a controlled environment with the ultimate goal of drying the beef to improve its quality and value. Comprehensive investigations into the effects of various environmental conditions on dry aging are crucial for understanding and optimizing the process, but the lack of affordable equipment focused on data collection makes it difficult to do so. The Agenator was thus developed as an open source system with a suite of features for investigating dry aging such as: measuring and recording relative humidity, temperature, mass, air velocity, and fan rotational speed; precise control within 1% for relative humidity and 50 rpm for fan rotational speed; robust signal integrity preservation and data recovery features; modular design for easy addition and removal of individual chamber units; and non-permanent fixtures to allow easy adaptation of the system for other applications such as investigating dehydration of food products. The open source system comes with user-friendly computer software for interfacing with the system and creating sophisticated environmental control programs. The Agenator is available to the public at https://osf.io/87nck/

    Analog-to-digital Converter With Programmable Floating Gate

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    Systems and methods are discussed for using a floating-gate MOSFET as a programmable reference circuit. One example of the programmable reference circuit is a programmable voltage reference source, while a second example of a programmable reference circuit is a programmable reference current source. The programmable voltage reference source and/or the reference current source may be incorporated into several types of circuits, such as comparator circuits, current-mirror circuits, and converter circuits. Comparator circuits and current-mirror circuits are often incorporated into circuits such as converter circuits. Converter circuits include analog-to-digital converters and digital-to-analog converters.Georgia Tech Research Corporatio

    Development and testing of laser Doppler system components for wake vortex monitoring. Volume 2: Scanner operations manual

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    The theory and operation of the scanner portion of the laser Doppler system for detecting and monitoring aircraft trailing vortices in an airport environment are discussed. Schematics, wiring diagrams, component values, and operation and checkout procedures are included

    XONN: XNOR-based Oblivious Deep Neural Network Inference

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    Advancements in deep learning enable cloud servers to provide inference-as-a-service for clients. In this scenario, clients send their raw data to the server to run the deep learning model and send back the results. One standing challenge in this setting is to ensure the privacy of the clients' sensitive data. Oblivious inference is the task of running the neural network on the client's input without disclosing the input or the result to the server. This paper introduces XONN, a novel end-to-end framework based on Yao's Garbled Circuits (GC) protocol, that provides a paradigm shift in the conceptual and practical realization of oblivious inference. In XONN, the costly matrix-multiplication operations of the deep learning model are replaced with XNOR operations that are essentially free in GC. We further provide a novel algorithm that customizes the neural network such that the runtime of the GC protocol is minimized without sacrificing the inference accuracy. We design a user-friendly high-level API for XONN, allowing expression of the deep learning model architecture in an unprecedented level of abstraction. Extensive proof-of-concept evaluation on various neural network architectures demonstrates that XONN outperforms prior art such as Gazelle (USENIX Security'18) by up to 7x, MiniONN (ACM CCS'17) by 93x, and SecureML (IEEE S&P'17) by 37x. State-of-the-art frameworks require one round of interaction between the client and the server for each layer of the neural network, whereas, XONN requires a constant round of interactions for any number of layers in the model. XONN is first to perform oblivious inference on Fitnet architectures with up to 21 layers, suggesting a new level of scalability compared with state-of-the-art. Moreover, we evaluate XONN on four datasets to perform privacy-preserving medical diagnosis.Comment: To appear in USENIX Security 201

    Efficient polar optimization of transport aircraft in transonic RANS flow using adjoint gradient based approach

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    A major design requirement for transport aircraft is efficient cruise flight in the transonic region. From the aerodynamic viewpoint, this is achieved by favorable lift-to-drag ratio of the aircraft, both at the main design point and at off-design conditions. We therefore present a method to efficiently perform a multi-point optimization of a representative wing-body configuration. Designs are evaluated with RANS CFD simulations, the wing is parametrized using 40 free-form deformation control points, and a gradient-based method is used to drive the optimization. The gradient of cost functions is computed with a discrete adjoint approach, in which flow and mesh adjoint equations are solved. Compared to single-point optimization, with multi-point optimization we obtain a design with slightly lower best lift-to-drag ratio, but which has improved lift-to-drag polar over the whole range of practical lift coefficients compared to the baseline design

    Fluidic-thermochromic display device Patent

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    Fluidic-thermochromic display devic

    A double-sided silicon micro-strip super-module for the ATLAS inner detector upgrade in the high-luminosity LHC

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    The ATLAS experiment is a general purpose detector aiming to fully exploit the discovery potential of the Large Hadron Collider (LHC) at CERN. It is foreseen that after several years of successful data-taking, the LHC physics programme will be extended in the so-called High-Luminosity LHC, where the instantaneous luminosity will be increased up to 5 × 1034 cm−2 s−1. For ATLAS, an upgrade scenario will imply the complete replacement of its internal tracker, as the existing detector will not provide the required performance due to the cumulated radiation damage and the increase in the detector occupancy. The current baseline layout for the new ATLAS tracker is an all-silicon-based detector, with pixel sensors in the inner layers and silicon micro-strip detectors at intermediate and outer radii. The super-module is an integration concept proposed for the strip region of the future ATLAS tracker, where double-sided stereo silicon micro-strip modules are assembled into a low-mass local support structure. An electrical super-module prototype for eight double-sided strip modules has been constructed. The aim is to exercise the multi-module readout chain and to investigate the noise performance of such a system. In this paper, the main components of the current super-module prototype are described and its electrical performance is presented in detail
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