Intrinsically Evolvable Artificial Neural Networks

Dedicated hardware implementations of neural networks promise to provide faster, lower power operation when compared to software implementations executing on processors. Unfortunately, most custom hardware implementations do not support intrinsic training of these networks on-chip. The training is typically done using offline software simulations and the obtained network is synthesized and targeted to the hardware offline. The FPGA design presented here facilitates on-chip intrinsic training of artificial neural networks. Block-based neural networks (BbNN), the type of artificial neural networks implemented here, are grid-based networks neuron blocks. These networks are trained using genetic algorithms to simultaneously optimize the network structure and the internal synaptic parameters. The design supports online structure and parameter updates, and is an intrinsically evolvable BbNN platform supporting functional-level hardware evolution. Functional-level evolvable hardware (EHW) uses evolutionary algorithms to evolve interconnections and internal parameters of functional modules in reconfigurable computing systems such as FPGAs. Functional modules can be any hardware modules such as multipliers, adders, and trigonometric functions. In the implementation presented, the functional module is a neuron block. The designed platform is suitable for applications in dynamic environments, and can be adapted and retrained online. The online training capability has been demonstrated using a case study. A performance characterization model for RC implementations of BbNNs has also been presented

Técnicas de controlo não-linear baseadas em redes neuronais - do algoritmo à implementação

O presente trabalho analisa soluções de controlo não-linear baseadas em Redes Neuronais e apresenta a sua aplicação a um caso prático, desde o algoritmo de treino até à implementação física em hardware. O estudo inicial do estado da arte da utilização das Redes Neuronais para o controlo leva à proposta de soluções iterativas para a definição da arquitectura das mesmas e para o estudo das técnicas de Regularização e Paragem de Treino Antecipada, através dos Algoritmos Genéticos e à proposta de uma forma de validação dos modelos obtidos. Ao longo da tese são utilizadas quatro malhas para o controlo baseado em modelos, uma das quais uma contribuição original, e é implementado um processo de identificação on-line, tendo por base o algoritmo de treino Levenberg-Marquardt e a técnica de Paragem de Treino Antecipada que permite o controlo de um sistema, sem necessidade de recorrer ao conhecimento prévio das suas características. O trabalho é finalizado com um estudo do hardware comercial disponível para a implementação de Redes Neuronais e com o desenvolvimento de uma solução de hardware utilizando uma FPGA. De referir que o trabalho prático de teste das soluções apresentadas é realizado com dados reais provenientes de um forno eléctrico de escala reduzida.The present work analyses non-linear control solutions based on Neural Networks and presents its application to a case study, from the training algorithm to the hardware implementation. The initial study of the state of the art of Neural Networks use in control led to a proposal of iterative solutions for architecture definition and establishment of the Regularization and Early Stopping parameters, through the use of Genetic Algorithms and to the proposal of a new validation technique for the models. Throughout this thesis, four different loops for model based control are used, one of which is an original contribution, and an on-line identification procedure, based on the Levenberg-Marquardt algorithm with Early Stopping that allows system identification without previous knowledge of its characteristics. The work is finalized with a commercial hardware study for Neural Networks and with the development of a hardware solution based on a FPGA. It is worth mentioning that proposed solutions are tested with real data provided by a reduced scale electric kiln