Transient Response Improvement For Multi-phase Voltage Regulators

Next generation microprocessor (Vcore) requirements for high current slew rates and fast transient response together with low output voltage have posed great challenges on voltage regulator (VR) design . Since the debut of Intel 80X86 series, CPUs have greatly improved in performance with a dramatic increase on power consumption. According to the latest Intel VR11 design guidelines , the operational current may ramp up to 140A with typical voltages in the 1.1V to 1.4V range, while the slew rate of the transient current can be as high as 1.9A/ns [1, 2]. Meanwhile, the transient-response requirements are becoming stringer and stringer. This dissertation presents several topics on how to improve transient response for multi-phase voltage regulators. The Adaptive Modulation Control (AMC) is a type of non-linear control method which has proven to be effective in achieving high bandwidth designs as well as stabilizing the control loop during large load transients. It adaptively adjusts control bandwidth by changing the modulation gain, depending on different load conditions. With the AMC, a multiphase voltage regulator can be designed with an aggressively high bandwidth. When in heavy load transients where the loop could be potentially unstable, the bandwidth is lowered. Therefore, the AMC provides an optimal means for robust high-bandwidth design with excellent transient performance. The Error Amplifier Voltage Positioning (EAVP) is proposed to improve transient response by removing undesired spikes and dips after initial transient response. The EAVP works only in a short period of time during transient events without modifying the power stage and changing the control loop gain. It facilitates the error amplifier voltage recovering during transient events, achieving a fast settling time without impact on the whole control loop. Coupled inductors are an emerging topology for computing power supplies as VRs with coupled inductors show dynamic and steady-state advantages over traditional VRs. This dissertation first covers the coupling mechanism in terms of both electrical and reluctance modeling. Since the magnetizing inductance plays an important role in the coupled-inductor operation, a unified State-Space Averaging model is then built for a two-phase coupled-inductor voltage regulator. The DC solutions of the phase currents are derived in order to show the impact of the magnetizing inductance on phase current balancing. A small signal model is obtained based on the state-space-averaging model. The effects of magnetizing inductance on dynamic performance are presented. The limitations of conventional DCR current-sensing for coupled inductors are addressed. Traditional inductor DCR current sensing topology and prior arts fail to extract phase currents for coupled inductors. Two new DCR current sensing topologies for coupled inductors are presented in this dissertation. By implementation of simple RC networks, the proposed topologies can preserve the coupling effect between phases. As a result, accurate phase inductor currents and total current can be sensed, resulting in excellent current and voltage regulation. While coupled-inductor topologies are showing advantages in transient response and are becoming industry practices, they are suffering from low steady-state operating efficiency. Motivated by the challenging transient and efficiency requirements, this dissertation proposes a Full Bridge Coupled Inductor (FBCI) scheme which is able to improve transient response as well as savor high efficiency at (a) steady state. The FBCI can change the circuit configuration under different operational conditions. Its flexible topology is able to optimize both transient response and steady-state efficiency. The flexible core configuration makes implementation easy and clear of IP issues. A novel design methodology for planar magnetics based on numerical analysis of electromagnetic fields is offered and successfully applied to the design of low-voltage high power density dc-dc converters. The design methodology features intense use of FEM simulation. The design issues of planar magnetics, including loss mechanism in copper and core, winding design on PCB, core selections, winding arrangements and so on are first reviewed. After that, FEM simulators are introduced to numerically compute the core loss and winding loss. Consequently, a software platform for magnetics design is established, and optimized magnetics can then be achieved. Dynamic voltage scaling (DVS) technology is a common industry practice in optimizing power consumption of microprocessors by dynamically altering the supply voltage under different operational modes, while maintaining the performance requirements. During DVS operation, it is desirable to position the output voltage to a new level commanded by the microprocessor (CPU) with minimum delay. However, voltage deviation and slow settling time usually exist due to large output capacitance and compensation delay in voltage regulators. Although optimal DVS can be achieved by modifying the output capacitance and compensation, this method is limited by constraints from stringent static and dynamic requirements. In this dissertation, the effects of output capacitance and compensation network on DVS operation are discussed in detail. An active compensator scheme is then proposed to ensure smooth transition of the output voltage without change of power stage and compensation during DVS. Simulation and experimental results are included to demonstrate the effectiveness of the proposed scheme

ANALYSIS AND DESIGN OF CONTINUOUS INPUT CURRENT MULTIPHASE INTERLEAVED BUCK CONVERTER

The power requirements for microprocessors have been increasing per Moore\u27s Law. According to International Technology Roadmap (ITRS), Voltage Regulator Module (VRM) for microprocessors will be about 200 W at 1 V output in 2010. With the VRM’s topology of synchronous buck, serious technical challenges such as small duty cycle, high switching frequencies, and higher current demands, contribute to decreased power density and increased cost. This thesis proposes a Continuous Input Current Multiphase Interleaved Buck topology to solve the technical challenges of powering future microprocessors. This new topology is aimed to improve past topologies by providing continuous input current and improved efficiency. An open loop system of the proposed new topology is simulated using OrCAD PSpice to evaluate the performance criteria of the VRM. A hardware prototype of a four-phase Continuous Input Current Multiphase Interleaved Buck Converter is constructed and tested to assess the targeted improvements

Chemical And Biological Treatment Of Mature Landfill Leachate

The challenges imposed on Voltage Regulator Modules (VRM) become difficult to be achieved with the conventional multiphase buck converter commonly used on PC motherboards. For faster data transfer, a decrease in the output voltage is needed. This decrease causes small duty cycle that is accompanied by critical problems which impairs the efficiency. Therefore, these problems need to be addressed. Transformer-based non-isolated topologies are not new approaches to extend the duty cycle and avoid the associated drawbacks. High leakage, several added components and complicated driving and control schemes are some of the trade-offs to expand the duty cycle. The objective of this work is to present a new dc-dc buck-based topology, which extends the duty cycle with minimum drawbacks by adding two transformers that can be integrated to decrease the size and two switches with zero voltage switching (ZVS). Another issue addressed in this thesis is deriving a small signal model for a two-input two-phase buck converter as an introduction to a new evolving field of multi-input converters

Survey on Photo-Voltaic Powered Interleaved Converter System

Renewable energy is the best solution to meet the growing demand for energy in the country. The solar energy is considered as the most promising energy by the researchers due to its abundant availability, eco-friendly nature, long lasting nature, wide range of application and above all it is a maintenance free system. The energy absorbed by the earth can satisfy 15000 times of today’s total energy demand and its hundred times more than that our conventional energy like coal and other fossil fuels. Though, there are overwhelming advantages in solar energy, It has few drawbacks as well such as its low conversion ratio, inconsistent supply of energy due to variation in the sun light, less efficiency due to ripples in the converter, time dependent and, above all, high capitation cost. These aforementioned flaws have been addressed by the researchers in order to extract maximum energy and attain hundred percentage benefits of this heavenly resource. So, this chapter presents a comprehensive investigation based on photo voltaic (PV) system requirements with the following constraints such as system efficiency, system gain, dynamic response, switching losses are investigated. The overview exhibits and identifies the requirements of a best PV power generation system

New Control Strategy for Energy Conversion Based on Coupled Magnetic Structures

In this paper, a new strategy for energy conversion based on a coupled magnetic structure is presented. A proper control of the input voltages provides constant output voltage at any time and ideally no output filter is required and no energy is stored, enabling very fast dynamics and low losses in the converter since switching frequency can be very small. Ideal features and actual limitations of the proposed concept are analyzed. A prototype with a two-input magnetic structure is built in order to prove the concept

DC-DC Converter with Coupled-Inductors Current-doubler

A coupled-inductor current-doubler topology for a power converter has first and second rectifiers and first and second coupled inductors. Each coupled indicator has a main inductor inductively coupled with a secondary inductor. The secondary inductor of the first coupled inductor is coupled in series with one of the first and second rectifiers and the secondary inductor of the second coupled inductor coupled in series with the other one of the first and second rectifiers

Push-pull switching power amplifier

A true push-pull switching power amplifier is disclosed utilizing two dc-to-dc converters. Each converter is comprised of two inductances, one inductance in series with a DC source and the other inductor in series with the output load, and an electrical energy transferring device with storage capability, namely storage capacitance, with suitable switching means between the inductances to obtain DC level conversion, where the switching means allows bidirectional current (and power) flow, and the switching means of one dc-to-dc converter is driven by the complement of a square-wave switching signal for the other dc-to-dc converter for true push-pull operation. For reduction of current ripple, the inductances in each of the two converters may be coupled, and with proper design of the coupling, the ripple can be reduced to zero at either the input or the output, but preferably the output

Dual-frequency dual-inductor multiple-outputs (DF-DIMO) buck converter topologies with fully-integrated output filters

In multi-core DSPs, there is a need for multiple independent power supplies to power the digital cores. Each power supply needs to have fast dynamic response and must support a wide range of output voltage with up to hundreds of mA load current. In this dissertation, the key performance metrics in power converter design are introduced, the advantages and dis-advantages of the conventional power converter topology are analyzed and a new Dual-Frequency Dual-Inductor Multiple-Output (DF-DIMO) buck converter topology is presented to improve the limitations of the conventional topologies. The proposed topology employs a dual-phase 20-MHz current-mode-controlled input stage to reduce the inductance required per phase to only 200 nH, and a 4-output 100-MHz comparator-controlled fully-integrated output stage to reduce the capacitance required per output to 10 nF. To enable each output to handle up to 250-mA load with less than 40-mV voltage ripple, a 3rd-order bond-wire-based notch filter is employed at each output for voltage ripple suppression. Additionally, the proposed design employs dynamic output re-ordering to enhance dynamic and cross-regulation performance, interleaved pulse-skipping to enhance light-load efficiency, and high-gain local output feedback to enhance DC load Regulation. Targeting multi-core DSPs, the proposed design is implemented in standard 65-nm CMOS technology with 1.8-V input, and outputs in the range of 0.6–1.2 V with a total load of 1 A. It achieves a peak efficiency of 74%, less than 40-mV output voltage ripple, 0.5-V/70-ns Dynamic Voltage Scaling (DVS), and settling time of less than 85 ns for 125-mA all with no cross regulations

Simulation Based Analysis of Digitally Controlled 4-phase DC-DC Converter with Coupled Inductors

Interleaved converters are used in many different conversion systems involving various topologies and are related to different fields of application due its advantages over single-phase converters. Such advantages include reduced current in switching devices and passive elements, reduced output current ripple, and so on. Reductions in size and costs of magnetic components and inductors current ripple can be achieved by an integration of magnetics. In this paper application of 2-phase coupled inductor designed in convenient way by using commercially manufactured coil formers and ferrite cores is analyzed to developed 4-phase  interleaved DC-DC converter. Different structures of the coupled inductor for 4 phases is studied. The steady state phase and output current ripple in buck mode of the interleaving magnetic integrated bidirectional DC-DC converter is simulated. The necessary count of inductors for selected topology are  manufactured and placed on the PCB board