A Sub-500 mu W Interface Electronics for Bionic Ears

This paper presents an ultra-low power current-mode circuit for a bionic ear interface. Piezoelectric (PZT) sensors at the system input transduce sound vibrations into multi-channel electrical signals, which are then processed by the proposed circuit to stimulate the auditory nerves consistently with the input amplitude level. The sensor outputs are first amplified and range-compressed through ultra-low power logarithmic amplifiers (LAs) into AC current waveforms, which are then rectified through custom current-mode circuits. The envelopes of the rectified signals are extracted, and are selectively sampled as reference for the stimulation current generator, armed with a 7-bit user-programmed DAC to enable patient fitting (calibration). Adjusted biphasic stimulation current is delivered to the nerves according to continuous inter-leaved sampling (CIS) stimulation strategy through a switch matrix. Each current pulse is optimized to have an exponentially decaying shape, which leads to reduced supply voltage, and hence similar to 20% lower stimulator power dissipation. The circuit has been designed and fabricated in 180nm high-voltage CMOS technology with up to 60 dB measured input dynamic range, and up to 1 mA average stimulation current. The 8-channel interface has been validated to be fully functional with 472 mu W power dissipation, which is the lowest value in the literature to date, when stimulated by a mimicked speech signal

Low-Power Circuits for Brain–Machine Interfaces

This paper presents work on ultra-low-power circuits for brain–machine interfaces with applications for paralysis prosthetics, stroke, Parkinson’s disease, epilepsy, prosthetics for the blind, and experimental neuroscience systems. The circuits include a micropower neural amplifier with adaptive power biasing for use in multi-electrode arrays; an analog linear decoding and learning architecture for data compression; low-power radio-frequency (RF) impedance-modulation circuits for data telemetry that minimize power consumption of implanted systems in the body; a wireless link for efficient power transfer; mixed-signal system integration for efficiency, robustness, and programmability; and circuits for wireless stimulation of neurons with power-conserving sleep modes and awake modes. Experimental results from chips that have stimulated and recorded from neurons in the zebra finch brain and results from RF power-link, RF data-link, electrode- recording and electrode-stimulating systems are presented. Simulations of analog learning circuits that have successfully decoded prerecorded neural signals from a monkey brain are also presented

A review of current neuromorphic approaches for vision, auditory, and olfactory sensors

Conventional vision, auditory, and olfactory sensors generate large volumes of redundant data and as a result tend to consume excessive power. To address these shortcomings, neuromorphic sensors have been developed. These sensors mimic the neuro-biological architecture of sensory organs using aVLSI (analog Very Large Scale Integration) and generate asynchronous spiking output that represents sensing information in ways that are similar to neural signals. This allows for much lower power consumption due to an ability to extract useful sensory information from sparse captured data. The foundation for research in neuromorphic sensors was laid more than two decades ago, but recent developments in understanding of biological sensing and advanced electronics, have stimulated research on sophisticated neuromorphic sensors that provide numerous advantages over conventional sensors. In this paper, we review the current state-of-the-art in neuromorphic implementation of vision, auditory, and olfactory sensors and identify key contributions across these fields. Bringing together these key contributions we suggest a future research direction for further development of the neuromorphic sensing field

Speech filtering for improving intelligibility in noisy transients

Thesis (M. Eng.)--Massachusetts Institute of Technology, Dept. of Electrical Engineering and Computer Science, 2011.Cataloged from PDF version of thesis.Includes bibliographical references.Hearing impairment is a problem that affects a large percentage of the population. Cochlear implants allow those with profound or total hearing loss to regain some hearing by stimulating auditory nerve fibers with implanted electrodes, in response to sound picked up by an external microphone. The signal processing chain from microphone input to stimulation output is an important factor in the overall speech intelligibility of the implant system. This thesis work improves on an existing ultra-low-power cochlear implant system by utilizing an improved noise and power efficient bandpass filter bank to implement a novel frequency-selective gain control algorithm capable of reducing, and in some cases removing, loud transient noises, thereby improving speech intelligibility. This gain control algorithm takes advantage of the inherent frequency-specific gain control afforded by the improved bandpass filter topology. This contribution makes an improvement to the existing state-of-the-art system in both power efficiency and performance.by Andrew Lewine.M.Eng

Interfacing of neuromorphic vision, auditory and olfactory sensors with digital neuromorphic circuits

The conventional Von Neumann architecture imposes strict constraints on the development of intelligent adaptive systems. The requirements of substantial computing power to process and analyse complex data make such an approach impractical to be used in implementing smart systems. Neuromorphic engineering has produced promising results in applications such as electronic sensing, networking architectures and complex data processing. This interdisciplinary field takes inspiration from neurobiological architecture and emulates these characteristics using analogue Very Large Scale Integration (VLSI). The unconventional approach of exploiting the non-linear current characteristics of transistors has aided in the development of low-power adaptive systems that can be implemented in intelligent systems. The neuromorphic approach is widely applied in electronic sensing, particularly in vision, auditory, tactile and olfactory sensors. While conventional sensors generate a huge amount of redundant output data, neuromorphic sensors implement the biological concept of spike-based output to generate sparse output data that corresponds to a certain sensing event. The operation principle applied in these sensors supports reduced power consumption with operating efficiency comparable to conventional sensors. Although neuromorphic sensors such as Dynamic Vision Sensor (DVS), Dynamic and Active pixel Vision Sensor (DAVIS) and AEREAR2 are steadily expanding their scope of application in real-world systems, the lack of spike-based data processing algorithms and complex interfacing methods restricts its applications in low-cost standalone autonomous systems. This research addresses the issue of interfacing between neuromorphic sensors and digital neuromorphic circuits. Current interfacing methods of these sensors are dependent on computers for output data processing. This approach restricts the portability of these sensors, limits their application in a standalone system and increases the overall cost of such systems. The proposed methodology simplifies the interfacing of these sensors with digital neuromorphic processors by utilizing AER communication protocols and neuromorphic hardware developed under the Convolution AER Vision Architecture for Real-time (CAVIAR) project. The proposed interface is simulated using a JAVA model that emulates a typical spikebased output of a neuromorphic sensor, in this case an olfactory sensor, and functions that process this data based on supervised learning. The successful implementation of this simulation suggests that the methodology is a practical solution and can be implemented in hardware. The JAVA simulation is compared to a similar model developed in Nengo, a standard large-scale neural simulation tool. The successful completion of this research contributes towards expanding the scope of application of neuromorphic sensors in standalone intelligent systems. The easy interfacing method proposed in this thesis promotes the portability of these sensors by eliminating the dependency on computers for output data processing. The inclusion of neuromorphic Field Programmable Gate Array (FPGA) board allows reconfiguration and deployment of learning algorithms to implement adaptable systems. These low-power systems can be widely applied in biosecurity and environmental monitoring. With this thesis, we suggest directions for future research in neuromorphic standalone systems based on neuromorphic olfaction

Analysis and Implementation of Hybrid FIR Architecture in Speech Processor

Hearing aid is an electronic gadget precisely used into the internal ear which reestablishes halfway hearing to smooth hearing. The discourse processor of CI parts the sound-related sign into groups of various frequencies and changes over them into appropriate codes for animating the cathodes in cochlea of ear. The cathode actuates sound-related nerve filaments to give hearing sensation. The expense of the CI alone goes to around 100,000 US dollars. For the efficient less well-to-do individuals with hearing sickness, it might be too exorbitant to even consider affording for this hardware to recoup from the conference misfortune. It gets important to cut down the expense. The cost decrease might be accomplished with diminished region, low force and rapid activity of the CI. This goal intuited both the simple and the computerized based CI originators to inquire about their techniques to give individuals less expensive and profoundly understandable CI. The primary objective of this paper is to develop reconfigurable DSP architectures for the filter banks in speech processor of CI with the following features like minimized area of the filter, reduced power consumption of the speech processor and enhanced presentation of the filter. This paper involves the design and hardware implementation of narrow band pass FIR filter for speech processor of CI using the Xilinx System Generator (XSG) tool on Virtex 7 FPGA

Optimal analog wavelet bases construction using hybrid optimization algorithm

An approach for the construction of optimal analog wavelet bases is presented. First, the definition of an analog wavelet is given. Based on the definition and the least-squares error criterion, a general framework for designing optimal analog wavelet bases is established, which is one of difficult nonlinear constrained optimization problems. Then, to solve this problem, a hybrid algorithm by combining chaotic map particle swarm optimization (CPSO) with local sequential quadratic programming (SQP) is proposed. CPSO is an improved PSO in which the saw tooth chaotic map is used to raise its global search ability. CPSO is a global optimizer to search the estimates of the global solution, while the SQP is employed for the local search and refining the estimates. Benefiting from good global search ability of CPSO and powerful local search ability of SQP, a high-precision global optimum in this problem can be gained. Finally, a series of optimal analog wavelet bases are constructed using the hybrid algorithm. The proposed method is tested for various wavelet bases and the improved performance is compared with previous works.Peer reviewedFinal Published versio

Neuromorphic hardware for somatosensory neuroprostheses

In individuals with sensory-motor impairments, missing limb functions can be restored using neuroprosthetic devices that directly interface with the nervous system. However, restoring the natural tactile experience through electrical neural stimulation requires complex encoding strategies. Indeed, they are presently limited in effectively conveying or restoring tactile sensations by bandwidth constraints. Neuromorphic technology, which mimics the natural behavior of neurons and synapses, holds promise for replicating the encoding of natural touch, potentially informing neurostimulation design. In this perspective, we propose that incorporating neuromorphic technologies into neuroprostheses could be an effective approach for developing more natural human-machine interfaces, potentially leading to advancements in device performance, acceptability, and embeddability. We also highlight ongoing challenges and the required actions to facilitate the future integration of these advanced technologies

How Tiny Can Analog Filterbank Features Be Made for Ultra-low-power On-device Keyword Spotting?

Analog feature extraction is a power-efficient and re-emerging signal processing paradigm for implementing the front-end feature extractor in on device keyword-spotting systems. Despite its power efficiency and re-emergence, there is little consensus on what values the architectural parameters of its critical block, the analog filterbank, should be set to, even though they strongly influence power consumption. Towards building consensus and approaching fundamental power consumption limits, we find via simulation that through careful selection of its architectural parameters, the power of a typical state-of-the-art analog filterbank could be reduced by 33.6x, while sacrificing only 1.8% in downstream 10-word keyword spotting accuracy through a back-end neural network.Comment: Accepted as a full paper by the TinyML Research Symposium 202