Simulation Of Multi-core Systems And Interconnections And Evaluation Of Fat-Mesh Networks

Simulators are very important in computer architecture research as they enable the exploration of new architectures to obtain detailed performance evaluation without building costly physical hardware. Simulation is even more critical to study future many-core architectures as it provides the opportunity to assess currently non-existing computer systems. In this thesis, a multiprocessor simulator is presented based on a cycle accurate architecture simulator called SESC. The shared L2 cache system is extended into a distributed shared cache (DSC) with a directory-based cache coherency protocol. A mesh network module is extended and integrated into SESC to replace the bus for scalable inter-processor communication. While these efforts complete an extended multiprocessor simulation infrastructure, two interconnection enhancements are proposed and evaluated. A novel non-uniform fat-mesh network structure similar to the idea of fat-tree is proposed. This non-uniform mesh network takes advantage of the average traffic pattern, typically all-to-all in DSC, to dedicate additional links for connections with heavy traffic (e.g., near the center) and fewer links for lighter traffic (e.g., near the periphery). Two fat-mesh schemes are implemented based on different routing algorithms. Analytical fat-mesh models are constructed by presenting the expressions for the traffic requirements of personalized all-to-all traffic. Performance improvements over the uniform mesh are demonstrated in the results from the simulator. A hybrid network consisting of one packet switching plane and multiple circuit switching planes is constructed as the second enhancement. The circuit switching planes provide fast paths between neighbors with heavy communication traffic. A compiler technique that abstracts the symbolic expressions of benchmarks' communication patterns can be used to help facilitate the circuit establishment

Modeling, Design And Evaluation Of Networking Systems And Protocols Through Simulation

Computer modeling and simulation is a practical way to design and test a system without actually having to build it. Simulation has many benefits which apply to many different domains: it reduces costs creating different prototypes for mechanical engineers, increases the safety of chemical engineers exposed to dangerous chemicals, speeds up the time to model physical reactions, and trains soldiers to prepare for battle. The motivation behind this work is to build a common software framework that can be used to create new networking simulators on top of an HLA-based federation for distributed simulation. The goals are to model and simulate networking architectures and protocols by developing a common underlying simulation infrastructure and to reduce the time a developer has to learn the semantics of message passing and time management to free more time for experimentation and data collection and reporting. This is accomplished by evolving the simulation engine through three different applications that model three different types of network protocols. Computer networking is a good candidate for simulation because of the Internet\u27s rapid growth that has spawned off the need for new protocols and algorithms and the desire for a common infrastructure to model these protocols and algorithms. One simulation, the 3DInterconnect simulator, simulates data transmitting through a hardware k-array n-cube network interconnect. Performance results show that k-array n-cube topologies can sustain higher traffic load than the currently used interconnects. The second simulator, Cluster Leader Logic Algorithm Simulator, simulates an ad-hoc wireless routing protocol that uses a data distribution methodology based on the GPS-QHRA routing protocol. CLL algorithm can realize a maximum of 45% power savings and maximum 25% reduced queuing delay compared to GPS-QHRA. The third simulator simulates a grid resource discovery protocol for helping Virtual Organizations to find resource on a grid network to compute or store data on. Results show that worst-case 99.43% of the discovery messages are able to find a resource provider to use for computation. The simulation engine was then built to perform basic HLA operations. Results show successful HLA functions including creating, joining, and resigning from a federation, time management, and event publication and subscription

A new routing protocol for ad hoc wireless networks design, implementation and performance evaluation

A collection of mobile nodes can form a multi-hop radio network with a dynamic topology and without the need for any infrastructure such as base stations or wired network. Such a Mobile Ad Hoc Networks (MANETs) maintain their structure and connectivity in a decentralised and distributed fashion. Each mobile node acts as both a router for other nodes traffic, as well as a source of traffic of its own In this thesis we develop and present a new hybrid routing protocol called Multipath Distance Vector Zone Routing Protocol, which is referred to as MDVZRP. In MDVZRP we assume that all the routes in the routing table are active and usable at any time, unless the node received or discovered a broken link. There is no need to periodically update the routing tables, therefore reducing the periodic update messages and hence reducing the control traffic in the entire network. The protocol guarantees loop freedom and alternative disjoint paths. Routes are immediately available within each routing zone. For destinations outside the zone, MDVZRP employs a route discovery technique known as routing information on demand. Once the node is informed by either the MAC layer or itself that it should discover the non- reachable nodes, MDVZRP adopts a new technique. First, we discuss the Ad Hoc networks and routing in general, then the motivation of MDVZRP regarding the nodes‟ flat view, and the selection and acquisition of multipath getting and selection. Furthermore, we describe the stages of MDVZRP and the protocol routing process with examples. The performance of MDVZRP is then evaluated to determine its operating parameters, and also to investigate its performance in a range of different scenarios. Finally, MDVZRP is compared with DSDV and AODV ordinary routing protocols (standard) delivering CBR traffic. Simulation results show that MDVZRP gives a better performance than DSDV in all circumstances, it is also better than AODV in most of the scenarios, especially at low mobility

A new routing protocol for ad hoc wireless networks design, implementation and performance evaluation

A collection of mobile nodes can form a multi-hop radio network with a dynamic topology and without the need for any infrastructure such as base stations or wired network. Such a Mobile Ad Hoc Networks (MANETs) maintain their structure and connectivity in a decentralised and distributed fashion. Each mobile node acts as both a router for other nodes traffic, as well as a source of traffic of its own In this thesis we develop and present a new hybrid routing protocol called Multipath Distance Vector Zone Routing Protocol, which is referred to as MDVZRP. In MDVZRP we assume that all the routes in the routing table are active and usable at any time, unless the node received or discovered a broken link. There is no need to periodically update the routing tables, therefore reducing the periodic update messages and hence reducing the control traffic in the entire network. The protocol guarantees loop freedom and alternative disjoint paths. Routes are immediately available within each routing zone. For destinations outside the zone, MDVZRP employs a route discovery technique known as routing information on demand. Once the node is informed by either the MAC layer or itself that it should discover the non- reachable nodes, MDVZRP adopts a new technique. First, we discuss the Ad Hoc networks and routing in general, then the motivation of MDVZRP regarding the nodes‟ flat view, and the selection and acquisition of multipath getting and selection. Furthermore, we describe the stages of MDVZRP and the protocol routing process with examples. The performance of MDVZRP is then evaluated to determine its operating parameters, and also to investigate its performance in a range of different scenarios. Finally, MDVZRP is compared with DSDV and AODV ordinary routing protocols (standard) delivering CBR traffic. Simulation results show that MDVZRP gives a better performance than DSDV in all circumstances, it is also better than AODV in most of the scenarios, especially at low mobility

Boosting the Performance of PC-based Software Routers with FPGA-enhanced Network Interface Cards

The research community is devoting increasing attention to software routers based on off-the-shelf hardware and open-source operating systems running on the personalcomputer (PC) architecture. Today's high-end PCs are equipped with peripheral component interconnect (PCI) shared buses enabling them to easily fit into the multi-gigabit-per-second routing segment, for a price much lower than that of commercial routers. However, commercially-available PC network interface cards (NICs) lack programmability, and require not only packets to cross the PCI bus twice, but also to be processed in software by the operating system, strongly reducing the achievable forwarding rate. It is therefore interesting to explore the performance of customizable NICs based on field-programmable gate array (FPGA) logic devices we developed and assess how well they can overcome the limitations of today's commercially-available NIC

Integration of tools for the Design and Assessment of High-Performance, Highly Reliable Computing Systems (DAHPHRS), phase 1

Systems for Space Defense Initiative (SDI) space applications typically require both high performance and very high reliability. These requirements present the systems engineer evaluating such systems with the extremely difficult problem of conducting performance and reliability trade-offs over large design spaces. A controlled development process supported by appropriate automated tools must be used to assure that the system will meet design objectives. This report describes an investigation of methods, tools, and techniques necessary to support performance and reliability modeling for SDI systems development. Models of the JPL Hypercubes, the Encore Multimax, and the C.S. Draper Lab Fault-Tolerant Parallel Processor (FTPP) parallel-computing architectures using candidate SDI weapons-to-target assignment algorithms as workloads were built and analyzed as a means of identifying the necessary system models, how the models interact, and what experiments and analyses should be performed. As a result of this effort, weaknesses in the existing methods and tools were revealed and capabilities that will be required for both individual tools and an integrated toolset were identified

Submicron Systems Architecture: Semiannual Technical Report

No abstract available