117 research outputs found

    DESIGNING AN INEXPENSIVE RF SIGNAL ANALYSIS TOOL FOR TRANSMITTERS

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    Existing on-nick sources, for example power or envelope detectors or small additional circuitry, can be used as BiST purposes. Built-in self-test (BiST) for transmitters is really a desirable choice because it eliminates the reliance upon costly instrumentation to do radio-frequency signal analysis. We derive analytical expressions for that output signal in straight line and nonlinear modes. However, because of limited bandwidth, measurement of complex specifications, for example in-phase and quadrature (IQ) imbalance, and third-order intermediation intercept point (IIP3) is challenging. Since IQ imbalances are most amenable for digital compensation, their portrayal and monitoring are desirable. Within this paper, we advise a multistep BiST way of transmitter IQ imbalance and nonlinearity utilizing a self mixing envelope detector. Using straight line mode expression, we devise test signals to isolate the results of gain and phase imbalances, electricity offsets, and time skews using their company parameters from the system in low-power mode. Simulations and hardware measurements reveal that the process can offer accurate portrayal from the path. Once isolated, these parameters are calculated easily having a couple of mathematical operations. Within the next step, utilizing a greater power test signal, the nonlinear behavior from the transmitter is happy and also the IIP3 from the transmitter is computed in line with the analytical expressions

    Low-Overhead Built-In Self-Test for Advanced RF Transceiver Architectures

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    abstract: Due to high level of integration in RF System on Chip (SOC), the test access points are limited to the baseband and RF inputs/outputs of the system. This limited access poses a big challenge particularly for advanced RF architectures where calibration of internal parameters is necessary and ensure proper operation. Therefore low-overhead built-in Self-Test (BIST) solution for advanced RF transceiver is proposed. In this dissertation. Firstly, comprehensive BIST solution for RF polar transceivers using on-chip resources is presented. In the receiver, phase and gain mismatches degrade sensitivity and error vector magnitude (EVM). In the transmitter, delay skew between the envelope and phase signals and the finite envelope bandwidth can create intermodulation distortion (IMD) that leads to violation of spectral mask requirements. Characterization and calibration of these parameters with analytical model would reduce the test time and cost considerably. Hence, a technique to measure and calibrate impairments of the polar transceiver in the loop-back mode is proposed. Secondly, robust amplitude measurement technique for RF BIST application and BIST circuits for loop-back connection are discussed. Test techniques using analytical model are explained and BIST circuits are introduced. Next, a self-compensating built-in self-test solution for RF Phased Array Mismatch is proposed. In the proposed method, a sinusoidal test signal with unknown amplitude is applied to the inputs of two adjacent phased array elements and measure the baseband output signal after down-conversion. Mathematical modeling of the circuit impairments and phased array behavior indicates that by using two distinct input amplitudes, both of which can remain unknown, it is possible to measure the important parameters of the phased array, such as gain and phase mismatch. In addition, proposed BIST system is designed and fabricated using IBM 180nm process and a prototype four-element phased-array PCB is also designed and fabricated for verifying the proposed method. Finally, process independent gain measurement via BIST/DUT co-design is explained. Design methodology how to reduce performance impact significantly is discussed. Simulation and hardware measurements results for the proposed techniques show that the proposed technique can characterize the targeted impairments accurately.Dissertation/ThesisDoctoral Dissertation Electrical Engineering 201

    In-field Built-in Self-test for Measuring RF Transmitter Power and Gain

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    abstract: RF transmitter manufacturers go to great extremes and expense to ensure that their product meets the RF output power requirements for which they are designed. Therefore, there is an urgent need for in-field monitoring of output power and gain to bring down the costs of RF transceiver testing and ensure product reliability. Built-in self-test (BIST) techniques can perform such monitoring without the requirement for expensive RF test equipment. In most BIST techniques, on-chip resources, such as peak detectors, power detectors, or envelope detectors are used along with frequency down conversion to analyze the output of the design under test (DUT). However, this conversion circuitry is subject to similar process, voltage, and temperature (PVT) variations as the DUT and affects the measurement accuracy. So, it is important to monitor BIST performance over time, voltage and temperature, such that accurate in-field measurements can be performed. In this research, a multistep BIST solution using only baseband signals for test analysis is presented. An on-chip signal generation circuit, which is robust with respect to time, supply voltage, and temperature variations is used for self-calibration of the BIST system before the DUT measurement. Using mathematical modelling, an analytical expression for the output signal is derived first and then test signals are devised to extract the output power of the DUT. By utilizing a standard 180nm IBM7RF CMOS process, a 2.4GHz low power RF IC incorporated with the proposed BIST circuitry and on-chip test signal source is designed and fabricated. Experimental results are presented, which show this BIST method can monitor the DUT’s output power with +/- 0.35dB accuracy over a 20dB power dynamic range.Dissertation/ThesisMasters Thesis Electrical Engineering 201

    Analog Least Mean Square Loop with I/Q Imbalance for Self-Interference Cancellation in Full-Duplex Radios

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    © 1967-2012 IEEE. Analog least mean square (ALMS) loop is a promising structure for self-interference (SI) mitigation in full-duplex radios due to its simplicity and adaptive capability. However, being constructed from in-phase/quadrature (I/Q) demodulators and modulators to process complex signals, the ALMS loop may face I/Q imbalance problems. Thus, in this paper, the effects of frequency-independent I/Q imbalance in the ALMS loop are investigated. It is revealed that I/Q imbalance affects the loop gain and the level of SI cancellation. The loop gain can be easily compensated by adjusting the gain at other stages of the ALMS loop. Meanwhile, the degradation on cancellation performance is proved to be insignificant even under severe conditions of I/Q imbalance. In addition, an upper bound of the degradation factor is derived to provide an essential reference for the system design. Simulations are conducted to confirm the theoretical analyses

    Digital Front-End Signal Processing with Widely-Linear Signal Models in Radio Devices

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    Necessitated by the demand for ever higher data rates, modern communications waveforms have increasingly wider bandwidths and higher signal dynamics. Furthermore, radio devices are expected to transmit and receive a growing number of different waveforms from cellular networks, wireless local area networks, wireless personal area networks, positioning and navigation systems, as well as broadcast systems. On the other hand, commercial wireless devices are expected to be cheap, be relatively small in size, and have a long battery life. The demands for flexibility and higher data rates on one hand, and the constraints on production cost, device size, and energy efficiency on the other, pose difficult challenges on the design and implementation of future radio transceivers. Under these diametric constraints, in order to keep the overall implementation cost and size feasible, the use of simplified radio architectures and relatively low-cost radio electronics are necessary. This notion is even more relevant for multiple antenna systems, where each antenna has a dedicated radio front-end. The combination of simplified radio front-ends and low-cost electronics implies that various nonidealities in the remaining analog radio frequency (RF) modules, stemming from unavoidable physical limitations and material variations of the used electronics, are expected to play a critical role in these devices. Instead of tightening the specifications and tolerances of the analog circuits themselves, a more cost-effective solution in many cases is to compensate for these nonidealities in the digital domain. This line of research has been gaining increasing interest in the last 10-15 years, and is also the main topic area of this work. The direct-conversion radio principle is the current and future choice for building low-cost but flexible, multi-standard radio transmitters and receivers. The direct-conversion radio, while simple in structure and integrable on a single chip, suffers from several performance degrading circuit impairments, which have historically prevented its use in wideband, high-rate, and multi-user systems. In the last 15 years, with advances in integrated circuit technologies and digital signal processing, the direct-conversion principle has started gaining popularity. Still, however, much work is needed to fully realize the potential of the direct-conversion principle. This thesis deals with the analysis and digital mitigation of the implementation nonidealities of direct-conversion transmitters and receivers. The contributions can be divided into three parts. First, techniques are proposed for the joint estimation and predistortion of in-phase/quadrature-phase (I/Q) imbalance, power amplifier (PA) nonlinearity, and local oscillator (LO) leakage in wideband direct-conversion transmitters. Second, methods are developed for estimation and compensation of I/Q imbalance in wideband direct-conversion receivers, based on second-order statistics of the received communication waveforms. Third, these second-order statistics are analyzed for second-order stationary and cyclostationary signals under several other system impairments related to circuit implementation and the radio channel. This analysis brings new insights on I/Q imbalances and their compensation using the proposed algorithms. The proposed algorithms utilize complex-valued signal processing throughout, and naturally assume a widely-linear form, where both the signal and its complex-conjugate are filtered and then summed. The compensation processing is situated in the digital front-end of the transceiver, as the last step before digital-to-analog conversion in transmitters, or in receivers, as the first step after analog-to-digital conversion. The compensation techniques proposed herein have several common, unique, attributes: they are designed for the compensation of frequency-dependent impairments, which is seen critical for future wideband systems; they require no dedicated training data for learning; the estimators are computationally efficient, relying on simple signal models, gradient-like learning rules, and solving sets of linear equations; they can be applied in any transceiver type that utilizes the direct-conversion principle, whether single-user or multi-user, or single-carrier or multi-carrier; they are modulation, waveform, and standard independent; they can also be applied in multi-antenna transceivers to each antenna subsystem separately. Therefore, the proposed techniques provide practical and effective solutions to real-life circuit implementation problems of modern communications transceivers. Altogether, considering the algorithm developments with the extensive experimental results performed to verify their functionality, this thesis builds strong confidence that low-complexity digital compensation of analog circuit impairments is indeed applicable and efficient

    Advanced DSP Algorithms For Modern Wireless Communication Transceivers

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    A higher network throughput, a minimized delay and reliable communications are some of many goals that wireless communication standards, such as the fifthgeneration (5G) standard and beyond, intend to guarantee for its customers. Hence, many key innovations are currently being proposed and investigated by researchers in the academic and industry circles to fulfill these goals. This dissertation investigates some of the proposed techniques that aim at increasing the spectral efficiency, enhancing the energy efficiency, and enabling low latency wireless communications systems. The contributions lay in the evaluation of the performance of several proposed receiver architectures as well as proposing novel digital signal processing (DSP) algorithms to enhance the performance of radio transceivers. Particularly, the effects of several radio frequency (RF) impairments on the functionality of a new class of wireless transceivers, the full-duplex transceivers, are thoroughly investigated. These transceivers are then designed to operate in a relaying scenario, where relay selection and beamforming are applied in a relaying network to increase its spectral efficiency. The dissertation then investigates the use of greedy algorithms in recovering orthogonal frequency division multiplexing (OFDM) signals by using sparse equalizers, which carry out the equalization in a more efficient manner when the low-complexity single tap OFDM equalizer can no longer recover the received signal due to severe interferences. The proposed sparse equalizers are shown to perform close to conventional optimal and dense equalizers when the OFDM signals are impaired by interferences caused by the insertion of an insufficient cyclic prefix and RF impairments

    LMS-Based RF BIST Architecture for Multistandard Transmitters

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    Article accepté pour publicationInternational audienceSoftware defined radios (SDR) platforms are increasingly complex systems which combine great flexibility and high performance. These two characteristics, together with highly integrated architectures make production test a challenging task. In this paper, we introduce an Radio Frequency (RF) Built-in Self-Test (BIST) strategy based on Periodically Nonuniform Sampling of the signal at the output stages of multistandard radios. We leverage the I/Q ADC channels and the DSP resources to extract the bandpass waveform at the output of the power amplifier (PA). Analytic expressions and simulations show that our time-interleaved conversion scheme is sensitive to time-skew. We propose a time-skew estimation technique based on a Least Mean Squares (LMS) algorithm to solve this problem. Simulation results show that we can effectively reconstruct the bandpass signal of the output stage using this architecture, opening the way for a complete RF BIST strategy for multistandard radios

    A flexible BIST strategy for SDR transmitters

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    International audienceSoftware-defined radio (SDR) development aims for increased speed and flexibility. The advent of these system level requirements on the physical layer (PHY) access hardware is leading to more complex architectures, which together with higher levels of integration pose a challenging problem for product testing. For radio units that must be field-upgradeable without specialized equipment, Built-in Self-Test (BIST) schemes are arguably the only way to ensure continued compliance to specifications. In this paper we introduce a loopback RF BIST technique that uses Periodically Nonuniform Sampling (PNS2) of the transmitter (TX) output to evaluate compliance to spectral mask specifications. No significant hardware costs are incurred due to the re-use of available RX resources (I/Q ADCs, DSP, GPP, etc.). Simulation results of an homodyne TX demonstrate that Adjacent Channel Power Ratio (ACPR) can be accurately estimated. Future work will consist in validating our loopback RF BIST architecture on an in-house SDR testbed
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