An Initial study on The Reliability of Power Semiconductor Devices

An initial literature study combined with some basic comparative simulations has been performed on different electricfield modulation techniques and the subsequent reliability issues are reported for power semiconductor devices. An explanation of the most important power device metrics such as the offstate breakdown (BV) and specific on-resistance (RON) will be given, followed by a short overview of some of the electrostatic techniques (fieldplates, RESURF e.g. [1]) used to suppress peak electric fields. Furthermore it will be addressed that the high current operation of these devices results in shifting electric field peaks (Kirk effect [2], [3]) and as such different avalanche behavior, resulting in (gate oxide) reliability issues unlike those of conventional CMOS

A review of wildland fire spread modelling, 1990-present, 1: Physical and quasi-physical models

In recent years, advances in computational power and spatial data analysis (GIS, remote sensing, etc) have led to an increase in attempts to model the spread and behaviour of wildland fires across the landscape. This series of review papers endeavours to critically and comprehensively review all types of surface fire spread models developed since 1990. This paper reviews models of a physical or quasi-physical nature. These models are based on the fundamental chemistry and/or physics of combustion and fire spread. Other papers in the series review models of an empirical or quasi-empirical nature, and mathematical analogues and simulation models. Many models are extensions or refinements of models developed before 1990. Where this is the case, these models are also discussed but much less comprehensively.Comment: 31 pages + 8 pages references + 2 figures + 5 tables. Submitted to International Journal of Wildland Fir

Thermal Noise in Modern CMOS Technology

Non

Surface Potential Modelling of Hot Carrier Degradation in CMOS Technology

abstract: The scaling of transistors has numerous advantages such as increased memory density, less power consumption and better performance; but on the other hand, they also give rise to many reliability issues. One of the major reliability issue is the hot carrier injection and the effect it has on device degradation over time which causes serious circuit malfunctions. Hot carrier injection has been studied from early 1980's and a lot of research has been done on the various hot carrier injection mechanisms and how the devices get damaged due to this effect. However, most of the existing hot carrier degradation models do not consider the physics involved in the degradation process and they just calculate the change in threshold voltage for different stress voltages and time. Based on this, an analytical expression is formulated that predicts the device lifetime. This thesis starts by discussing various hot carrier injection mechanisms and the effects it has on the device. Studies have shown charges getting trapped in gate oxide and interface trap generation are two mechanisms for device degradation. How various device parameters get affected due to these traps is discussed here. The physics based models such as lucky hot electron model and substrate current model are presented and gives an idea how the gate current and substrate current can be related to hot carrier injection and density of traps created. Devices are stressed under various voltages and from the experimental data obtained, the density of trapped charges and interface traps are calculated using mid-gap technique. In this thesis, a simple analytical model based on substrate current is used to calculate the density of trapped charges in oxide and interface traps generated and it is a function of stress voltage and stress time. The model is verified against the data and the TCAD simulations. Finally, the analytical model is incorporated in a Verilog-A model and based on the surface potential method, the threshold voltage shift due to hot carrier stress is calculated.Dissertation/ThesisMasters Thesis Electrical Engineering 201

Opto-Electro-Thermal Approach to Modeling Photovoltaic Performance and Reliability from Cell to Module

Thanks to technology advancement in recent decades, the levelized cost of electricity (LCOE) of solar photovoltaics (PV) has finally been driven down close to that of traditional fossil fuels. Still, PV only provides approximately 0.5% of the total electricity consumption in the United States. To make PV more competitive with other energy resources, we must continuously reduce the LCOE of PV through improving their performance and reliability. As PV efficiencies approach the theoretical limit, however, further improvements are difficult. Meanwhile, solar modules in the field regularly fail prematurely before the manufacturers 25-year warranty. Therefore, future PV research needs innovative approaches and inventive solutions to continuously drive LCOE down. In this work, we present a novel approach to PV system design and analysis. The approach, comprised of three components: multiscale, multiphysics, and time, aims at systemically and collaboratively improving the performance and reliability of PV. First, we establish a simulation framework for translating the cell-level characteristics to the module level (multiscale). This framework has been demonstrated to reduce the cell-to-module efficiency gap. The framework also enables the investigation of module-level reliability. Physics-based compact models -the building blocks for this multiscale framework are, however, still missing or underdeveloped for promising materials such as perovskites and CIGS. Hence, we have developed compact models for these two technologies, which analytically describe salient features of their operation as a function of illumination and temperature. The models are also suitable for integration into a large-scale circuit network to simulate a solar module. In the second aspect of the approach, we study the fundamental physics underlying the notorious self-heating effects for PV and examine their detrimental influence on the electrical performance (multiphysics). After ascertaining the sources of self-heating, we propose novel optics-based self-cooling methodologies to reduce the operating temperature. The cooling technique developed in this work has been predicted to substantially enhance the efficiency and durability of commercial Si solar modules. In the third and last aspect of the approach, we have established a simulation framework that can forward predict the future energy yield for PV systems for financial scrutiny and inversely mine the historical field data to diagnose the pathology of degraded solar modules (time). The framework, which physically accounts for environmental factors (e.g., irradiance, temperature), can generate accurate projection and insightful analysis of the geographic-and technology-specific performance and reliability of solar modules. For the forward modeling, we simulate the optimization and predict the performance of bifacial solar modules to rigorously evaluate this emerging technology in a global context. For the inverse modeling, we apply this framework to physically mine the 20-year field data for a nearly worn-out silicon PV system and successfully pin down the primary degradation pathways, something that is beyond the capability of conventional methods. This framework can be applied to solar farms installed globally (an abundant yet unexploited testbed) to establish a rich database of these geographic-and technology-dependent degradation processes, a knowledge prerequisite for the next-generation reliability-aware design of PV systems. Finally, we note that the research paradigm for PV developed in this work can also be applied to other applications, e.g., battery and electronics, which share similar technical challenges for performance and reliability

A Unified Approach for Performance Degradation Analysis from Transistor to Gate Level

In this paper, we present an extensive analysis of the performance degradation in MOSFET based circuits. The physical effects that we consider are the random dopant fluctuation (RDF), the oxide thickness fluctuation (OTF) and the Hot-carrier-Instability (HCI). The work that we propose is based on two main key points: First, the performance degradation is studied considering BULK, Silicon-On-Insulator (SOI) and Double Gate (DG) MOSFET technologies. The analysis considers technology nodes from 45nm to 11nm. For the HCI effect we consider also the time-dependent evolution of the parameters of the circuit. Second, the analysis is performed from transistor level to gate level. Models are used to evaluate the variation of transistors key parameters, and how these variation affects performance at gate level as well.The work here presented was obtained using TAMTAMS Web, an open and publicly available framework for analysis of circuits based on transistors. The use of TAMTAMS Web greatly increases the value of this work, given that the analysis can be easily extended and improved in both complexity and depth