Ultra-Low Power Circuit Design for Miniaturized IoT Platform

This thesis examines the ultra-low power circuit techniques for mm-scale Internet of Things (IoT) platforms. The IoT devices are known for their small form factors and limited battery capacity and lifespan. So, ultra-low power consumption of always-on blocks is required for the IoT devices that adopt aggressive duty-cycling for high power efficiency and long lifespan. Several problems need to be addressed regarding IoT device designs, such as ultra-low power circuit design techniques for sleep mode and energy-efficient and fast data rate transmission for active mode communication. Therefore, this thesis highlights the ultra-low power always-on systems, focusing on energy efficient optical transmission in order to miniaturize the IoT systems. First, this thesis presents a battery-less sub-nW micro-controller for an always-operating system implemented with a newly proposed logic family. Second, it proposes an always-operating sub-nW light-to-digital converter to measure instant light intensity and cumulative light exposure, which employs the characteristics of this proposed logic family. Third, it presents an ultra-low standby power optical wake-up receiver with ambient light canceling using dual-mode operation. Finally, an energy-efficient low power optical transmitter for an implantable IoT device is suggested. Implications for future research are also provided.PHDElectrical EngineeringUniversity of Michigan, Horace H. Rackham School of Graduate Studieshttps://deepblue.lib.umich.edu/bitstream/2027.42/145862/1/imhotep_1.pd

Performance evaluation of wake-up radio based wireless body area network

Abstract. The last decade has been really ambitious in new research and development techniques to reduce energy consumption especially in wireless sensor networks (WSNs). Sensor nodes are usually battery-powered and thus have very limited lifetime. Energy efficiency has been the most important aspect to discuss when talking about wireless body area network (WBAN) in particular, since it is the bottleneck of these networks. Medium access control (MAC) protocols hold the vital position to determine the energy efficiency of a WBAN, which is a key design issue for battery operated sensor nodes. The wake-up radio (WUR) based MAC and physical layer (PHY) have been evaluated in this research work in order to contribute to the energy efficient solutions development. WUR is an on-demand approach in which the node is woken up by the wake-up signal (WUS). A WUS switches a node from sleep mode to wake up mode to start signal transmission and reception. The WUS is transmitted or received by a secondary radio transceiver, which operates on very low power. The energy benefit of using WUR is compared with conventional duty-cycling approach. As the protocol defines the nodes in WUR based network do not waste energy on idle listening and are only awakened when there is a request for communication, therefore, energy consumption is extremely low. The performance of WUR based MAC protocol has been evaluated for both physical layer (PHY) and MAC for transmission of WUS and data. The probabilities of miss detection, false alarm and detection error rates are calculated for PHY and the probabilities of collision and successful data transmission for channel access method Aloha is evaluated. The results are obtained to compute and compare the total energy consumption of WUR based network with duty cycling. The results prove that the WUR based networks have significant potential to improve energy efficiency, in comparison to conventional duty cycling approach especially, in the case of low data-reporting rate applications. The duty cycle approach is better than WUR approach when sufficiently low duty cycle is combined with highly frequent communication between the network nodes

Wireless wire - ultra-low-power and high-data-rate wireless communication systems

With the rapid development of communication technologies, wireless personal-area communication systems gain momentum and become increasingly important. When the market gets gradually saturated and the technology becomes much more mature, new demands on higher throughput push the wireless communication further into the high-frequency and high-data-rate direction. For example, in the IEEE 802.15.3c standard, a 60-GHz physical layer is specified, which occupies the unlicensed 57 to 64 GHz band and supports gigabit links for applications such as wireless downloading and data streaming. Along with the progress, however, both wireless protocols and physical systems and devices start to become very complex. Due to the limited cut-off frequency of the technology and high parasitic and noise levels at high frequency bands, the power consumption of these systems, especially of the RF front-ends, increases significantly. The reason behind this is that RF performance does not scale with technology at the same rate as digital baseband circuits. Based on the challenges encountered, the wireless-wire system is proposed for the millimeter wave high-data-rate communication. In this system, beamsteering directional communication front-ends are used, which confine the RF power within a narrow beam and increase the level of the equivalent isotropic radiation power by a factor equal to the number of antenna elements. Since extra gain is obtained from the antenna beamsteering, less front-end gain is required, which will reduce the power consumption accordingly. Besides, the narrow beam also reduces the interference level to other nodes. In order to minimize the system average power consumption, an ultra-low power asynchronous duty-cycled wake-up receiver is added to listen to the channel and control the communication modes. The main receiver is switched on by the wake-up receiver only when the communication is identified while in other cases it will always be in sleep mode with virtually no power consumed. Before transmitting the payload, the event-triggered transmitter will send a wake-up beacon to the wake-up receiver. As long as the wake-up beacon is longer than one cycle of the wake-up receiver, it can be captured and identified. Furthermore, by adopting a frequency-sweeping injection locking oscillator, the wake-up receiver is able to achieve good sensitivity, low latency and wide bandwidth simultaneously. In this way, high-data-rate communication can be achieved with ultra-low average power consumption. System power optimization is achieved by optimizing the antenna number, data rate, modulation scheme, transceiver architecture, and transceiver circuitries with regards to particular application scenarios. Cross-layer power optimization is performed as well. In order to verify the most critical elements of this new approach, a W-band injection-locked oscillator and the wake-up receiver have been designed and implemented in standard TSMC 65-nm CMOS technology. It can be seen from the measurement results that the wake-up receiver is able to achieve about -60 dBm sensitivity, 10 mW peak power consumption and 8.5 µs worst-case latency simultaneously. When applying a duty-cycling scheme, the average power of the wake-up receiver becomes lower than 10 µW if the event frequency is 1000 times/day, which matches battery-based or energy harvesting-based wireless applications. A 4-path phased-array main receiver is simulated working with 1 Gbps data rate and on-off-keying modulation. The average power consumption is 10 µW with 10 Gb communication data per day

Energy Efficiency in Communications and Networks

The topic of "Energy Efficiency in Communications and Networks" attracts growing attention due to economical and environmental reasons. The amount of power consumed by information and communication technologies (ICT) is rapidly increasing, as well as the energy bill of service providers. According to a number of studies, ICT alone is responsible for a percentage which varies from 2% to 10% of the world power consumption. Thus, driving rising cost and sustainability concerns about the energy footprint of the IT infrastructure. Energy-efficiency is an aspect that until recently was only considered for battery driven devices. Today we see energy-efficiency becoming a pervasive issue that will need to be considered in all technology areas from device technology to systems management. This book is seeking to provide a compilation of novel research contributions on hardware design, architectures, protocols and algorithms that will improve the energy efficiency of communication devices and networks and lead to a more energy proportional technology infrastructure

Modeling, design and implementation of a low-power FPGA based asynchronous wake-up receiver for wireless applications

Power consumption is a major concern for wireless sensor networks (WSNs) nodes, and it is often dominated by the power consumption of communication means. For such networks, devices are most of the time battery-powered and need to have very low power consumption. Moreover, for WSNs, limited amount of data are periodically sent and then the radio should be in idle or deep sleep mode most of the time. Thus using event-triggered radios is well suited and could lead to significant reduction of the overall power consumption of WSNs. Therefore this paper explores the design of an asynchronous module that can wake up the main receiver when another node is trying to send data. Furthermore, we implement the proposed solution in an FPGA to decrease the fabrication cost for low volume applications and make it easier to design, re-use and enhance. To decrease the static power consumption, we explore the possibility of reducing the supply voltage. The observed overall power consumption is under 5μW at 250 kbps. Moreover, using a new asynchronous design technique, we observed that power consumption can be further reduced

Ultra-Low-Power Uwb Impulse Radio Design: Architecture, Circuits, And Applications

Recent advances in home healthcare, environmental sensing, and low power computing have created a need for wireless communication at very low power for low data rate applications. Due to higher energy/bit requirements at lower data -rate, achieving power levels low enough to enable long battery lifetime (~10 years) or power-harvesting supplies have not been possible with traditional approaches. Dutycycled radios have often been proposed in literature as a solution for such applications due to their ability to shut off the static power consumption at low data rates. While earlier radio nodes for such systems have been proposed based on a type of sleepwake scheduling, such implementations are still power hungry due to large synchronization uncertainty (~1[MICRO SIGN]s). In this dissertation, we utilize impulsive signaling and a pulse-coupled oscillator (PCO) based synchronization scheme to facilitate a globally synchronized wireless network. We have modeled this network over a widely varying parameter space and found that it is capable of reducing system cost as well as providing scalability in wireless sensor networks. Based on this scheme, we implemented an FCC compliant, 3-5GHz, timemultiplexed, dual-band UWB impulse radio transceiver, measured to consume only 20[MICRO SIGN]W when the nodes are synchronized for peer-peer communication. At the system level the design was measured to consume 86[MICRO SIGN]W of power, while facilitating multi- hop communication. Simple pulse-shaping circuitry ensures spectral efficiency, FCC compliance and ~30dB band-isolation. Similarly, the band-switchable, ~2ns turn-on receiver implements a non-coherent pulse detection scheme that facilitates low power consumption with -87dBm sensitivity at 100Kbps. Once synchronized the nodes exchange information while duty-cycling, and can use any type of high level network protocols utilized in packet based communication. For robust network performance, a localized synchronization detection scheme based on relative timing and statistics of the PCO firing and the timing pulses ("sync") is reported. No active hand-shaking is required for nodes to detect synchronization. A self-reinforcement scheme also helps maintain synchronization even in the presence of miss-detections. Finally we discuss unique ways to exploit properties of pulse coupled oscillator networks to realize novel low power event communication, prioritization, localization and immediate neighborhood validation for low power wireless sensor applications

Integrated Circuits and Systems for Smart Sensory Applications

Connected intelligent sensing reshapes our society by empowering people with increasing new ways of mutual interactions. As integration technologies keep their scaling roadmap, the horizon of sensory applications is rapidly widening, thanks to myriad light-weight low-power or, in same cases even self-powered, smart devices with high-connectivity capabilities. CMOS integrated circuits technology is the best candidate to supply the required smartness and to pioneer these emerging sensory systems. As a result, new challenges are arising around the design of these integrated circuits and systems for sensory applications in terms of low-power edge computing, power management strategies, low-range wireless communications, integration with sensing devices. In this Special Issue recent advances in application-specific integrated circuits (ASIC) and systems for smart sensory applications in the following five emerging topics: (I) dedicated short-range communications transceivers; (II) digital smart sensors, (III) implantable neural interfaces, (IV) Power Management Strategies in wireless sensor nodes and (V) neuromorphic hardware