Compact Digital Predistortion for Multi-band and Wide-band RF Transmitters

This thesis is focusing on developing a compact digital predistortion (DPD) system which costs less DPD added power consumptions. It explores a new theory and techniques to relieve the requirement of the number of training samples and the sampling-rate of feedback ADCs in DPD systems. A new theory about the information carried by training samples is introduced. It connects the generalized error of the DPD estimation algorithm with the statistical properties of modulated signals. Secondly, based on the proposed theory, this work introduces a compressed sample selection method to reduce the number of training samples by only selecting the minimal samples which satisfy the foreknown probability information. The number of training samples and complex multiplication operations required for coefficients estimation can be reduced by more than ten times without additional calculation resource. Thirdly, based on the proposed theory, this thesis proves that theoretically a DPD system using memory polynomial based behavioural modes and least-square (LS) based algorithms can be performed with any sampling-rate of feedback samples. The principle, implementation and practical concerns of the undersampling DPD which uses lower sampling-rate ADC are then introduced. Finally, the observation bandwidth of DPD systems can be extended by the proposed multi-rate track-and-hold circuits with the associated algorithm. By addressing several parameters of ADC and corresponding DPD algorithm, multi-GHz observation bandwidth using only a 61.44MHz ADC is achieved, and demonstrated the satisfactory linearization performance of multi-band and continued wideband RF transmitter applications via extensive experimental tests

Novel Predistortion System for 4G/5G Small-Cell and Wideband Transmitters

To meet the growing demand for mobile data, various technologies are being introduced to wireless networks to increase system capacity. On one hand, large number of small-cell base stations are adopted to serve the reduced cell size; on the other hand, millimeter wave (mm-wave) systems with large antenna arrays that transmit ultra-wideband signals are expected in fifth generation (5G) networks. Power amplifiers (PAs), responsible for boosting the radio frequency (RF) signal power, are the most critical components in base station transmitters, and dominate the overall efficiency and linearity of the system. The design challenges to balance the contradictory requirements of efficiency and linearity of the PAs are usually addressed by linearization techniques, particularly the digital predistortion (DPD) system. However, existing DPD solutions face increasing difficulties keeping up with new developments in base station technologies. When considering sub-6 GHz small-cell base station transmitters, analog and RF predistortion techniques have recently received renewed attention due to their inherent low power nature. Their achievable linearization capacity is significantly limited, however, largely by their implementation complexity in realizing the needed predistortion models in analog circuitry. On the other hand, despite significant developments in DPD models for wideband signals, the implementations of such DPD models in practical hardware have received relatively little attention. Yet the conventional implementation of a DPD engine is limited by the maximum clock frequency of the digital circuitry employed and cannot be scaled to satisfy the growing bandwidth of transmitted signals for 5G networks. Furthermore, both analog and digital solutions require a transmitter-observation-receiver (TOR) to capture the PA outputs, necessitates the use of analog-to-digital converters (ADCs) whose complexity and power consumption increase with signal bandwidth. Such trend is not scalable for future base stations, and new innovations in feedback and training methods are required. This thesis presents a number of contributions to address the above identified challenges. To reduce the power overhead of the linearization system, a digitally-assisted analog-RF predistortion (DA-ARFPD) system that uses a novel predistortion model is introduced. The proposed finite-impulse-response assisted envelope memory polynomial (FIR-EMP) model allows for a reduction of hardware implementation complexity while maintaining good linearization capacity and low power overhead. A two-step small-signal-assisted parameter identification (SSAPI) algorithm is devised to estimate the parameters of the two main blocks of the FIR-EMP model, such that the training can be completed efficiently. A DA-ARFPD test bench has been built, which incorporates major RF components, to assess the validity of the proposed FIR-EMP scheme and the SSAPI algorithm. Measurement results show that the proposed FIR-EMP model with SSAPI algorithm can successfully linearize multiple PAs driven with various wideband and carrier-aggregated signals of up to 80~MHz modulation bandwidths for sub-6 GHz systems. Next, a hardware-efficient real-time DPD system with scalable linearization bandwidth for ultra-wideband 5G mm-wave transmitters is proposed. It uses a novel parallel-processing DPD engine architecture to process multiple samples per clock cycle, overcomes the linearization bandwidth limit imposed by the maximum clock rate of digital circuits used in conventional DPD implementation. Potentially unlimited linearization bandwidth could be achieved by using the proposed system with current digital circuit technologies. The linearization performance and bandwidth scalability of the proposed system is demonstrated experimentally using a silicon-based Doherty (DPA) with 400 MHz wideband signal operating at 28 GHz, and over-the-air measurements using a 64-element beamforming array with 800 MHz wideband signal, also at 28 GHz. The proposed DPD system achieves over 2.4 GHz linearization bandwidth using only a 300 MHz core clock for the digital circuits. Finally, to reduce the power consumption and cost of the TOR, a new approach to train the predistorter using under-sampled feedback signal is presented. Using aliased samples of the PA's output captured at either baseband or intermedia frequency (IF), the proposed algorithm is able to compute the coefficients of the predistortion engine to linearize the PA using a direct learning architecture. Experimentally, both the baseband and IF schemes achieve linearization performance comparable to a full-rate system. Implemented together with a parallel-processing based DPD engine on a field-programmable gate array (FPGA) based system-on-chip (SOC), the proposed feedback and training solution achieves over 2.4~GHz linearization bandwidth using an ADC operating at a clock rate of 200 MHz. Its performance is demonstrated experimentally by linearizing a silicon DPA with 200 MHz and 400 MHz signals in conductive measurements, and a 64-element beamforming array with 400 MHz and 800 MHz signals in over-the-air testing

Digital predistortion of RF amplifiers using baseband injection for mobile broadband communications

Radio frequency (RF) power amplifiers (PAs) represent the most challenging design parts of wireless transmitters. In order to be more energy efficient, PAs should operate in nonlinear region where they produce distortion that significantly degrades the quality of signal at transmitter’s output. With the aim of reducing this distortion and improve signal quality, digital predistortion (DPD) techniques are widely used. This work focuses on improving the performances of DPDs in modern, next-generation wireless transmitters. A new adaptive DPD based on an iterative injection approach is developed and experimentally verified using a 4G signal. The signal performances at transmitter output are notably improved, while the proposed DPD does not require large digital signal processing memory resources and computational complexity. Moreover, the injection-based DPD theory is extended to be applicable in concurrent dual-band wireless transmitters. A cross-modulation problem specific to concurrent dual-band transmitters is investigated in detail and novel DPD based on simultaneous injection of intermodulation and cross-modulation distortion products is proposed. In order to mitigate distortion compensation limit phenomena and memory effects in highly nonlinear RF PAs, this DPD is further extended and complete generalised DPD system for concurrent dual-band transmitters is developed. It is clearly proved in experiments that the proposed predistorter remarkably improves the in-band and out-of-band performances of both signals. Furthermore, it does not depend on frequency separation between frequency bands and has significantly lower complexity in comparison with previously reported concurrent dual-band DPDs

Receptores de rádio-frequência melhorados e disruptivos

This Ph.D. mainly addresses the reception part of a radio front end, focusing on Radio Frequency (RF) sampling architectures. These are considered to be the most promising future candidates to get better performance in terms of bandwidth and agility, following the well-known Software-Defined Radio (SDR) concept. The study considers the usage of an RF receiver in a standalone operation, i.e., used for receiving unknown data at the antenna, and when used as observation path for Power Amplifier (PA) linearization via Digital Predistortion (DPD), since nowadays this represents a mandatory technique to increase overall system’s performance. Firstly, commercial available RF Analog-Digital-Converters (ADCs) are studied and characterized to understand their limitations when used in DPD scenarios. A method for characterization and digital post-compensation to improve performance is proposed and evaluated. Secondly, an innovative FPGA-based RF single-bit pulsed converter based on Pulse Width Modulation (PWM) is addressed targeting frequency agility, high analog input bandwidth, and system integration, taking profit of an FPGA-based implementation. The latter was optimized based on PWM theoretical behavior maximizing Signal-to-Noise-Ratio (SNR) and bandwidth. The optimized receiver, was afterwards evaluated in a 5G C-RAN architecture and as a feedback loop for DPD. Finally, a brief study regarding DPD feedback loops in the scope of multiantenna transmitters is presented. This Ph.D. contributes with several advances to the state-of-the-art of SDR receiver, and to the so-called SDR DPD concept.Este doutoramento endereça principalmente a componente de receção de um transcetor de rádio-frequência (RF), focando-se em arquiteturas de receção de amostragem em RF. Estas são assim consideradas como sendo as mais promissoras para o futuro, em termos de desempenho, largura de banda e agilidade, de acordo com o conhecido conceito de Rádios Definidos por Software (SDR). O estudo considera o uso dos recetores de RF em modo standalone, i.e., recebendo dados desconhecidos provenientes da antena, e também quando usados como caminho de observação para aplicação de linearização de amplificadores de potência (PAs) via pré-distorção digital (DPD), pois atualmente esta é uma técnica fundamental para aumentar o desempenho geral do sistema. Em primeiro lugar, os conversores analógico-digital de RF são estudados e caracterizados para perceber as suas limitações quando usados em cenários de DPD. Um método de caracterização e pós compensação digital é proposto para obter melhorias de desempenho. Em segundo lugar, um novo recetor pulsado de um bit baseado em Modulação de Largura de Pulso (PWM) e implementado em Agregado de Células Lógicas Programáveis (FPGA) é endereçado, visando agilidade em frequência, largura de banda analógica e integração de sistema, tirando proveito da implementação em FPGA. Este recetor foi otimizado com base no modelo comportamental teórico da modulação PWM, maximizando a relação sinalruído (SNR) e a largura de banda. O recetor otimizado foi posteriormente avaliado num cenário 5G de uma arquitetura C-RAN e também num cenário em que serve de caminho de observação para DPD. Finalmente, um breve estudo relativo a caminhos de observação de DPD no contexto de transmissores multi-antena é também apresentado. Este doutoramento contribui com vários avanços no estado da arte de recetores SDR e no conceito de SDR DPD.Programa Doutoral em Engenharia Eletrotécnic

Augmented-LSTM and 1D-CNN-LSTM based DPD models for linearization of wideband power amplifiers

Abstract. Artificial Neural Networks (ANNs) have gained popularity in modeling the nonlinear behavior of wideband power amplifiers. Recently, modern researchers have used two types of neural network architectures, Long Short-Term Memory (LSTM) and Convolutional Neural Network (CNN), to model power amplifier behavior and compensate for power amplifier distortion. Each architecture has its own advantages and limitations. In light of these, this study proposes two digital pre-distortion (DPD) models based on LSTM and CNN. The first proposed model is an augmented LSTM model, which effectively reduces distortion in wideband power amplifiers. The measurement results demonstrate that the proposed augmented LSTM model provides better linearization performance than existing state-of-the-art DPDs designed using ANNs. The second proposed model is a 1D-CNN-LSTM model that simplifies the augmented LSTM model by integrating a CNN layer before the LSTM layer. This integration reduces the number of input features to the LSTM layer, resulting in a low-complexity linearization for wideband PAs. The measurement results show that the 1D-CNN-LSTM model provides comparable results to the augmented LSTM model. In summary, this study proposes two novel DPD models based on LSTM and CNN, which effectively reduce distortion and provide low-complexity linearization for wideband PAs. The measurement results demonstrate that both models offer comparable performance to existing state-of-the-art DPDs designed using ANNs

Design and implementation of adaptive baseband predistorter for OFDM nonlinear transmitter. Simulation and measurement of OFDM transmitter in presence of RF high power amplifier nonlinear distortion and the development of adaptive digital predistorters based on Hammerstein approach.

The objective of this research work is to investigate, design and measurement of a digital predistortion linearizer that is able to compensate the dynamic nonlinear distortion of a High Power Amplifier (PA). The effectiveness of the proposed baseband predistorter (PD) on the performance of a WLAN OFDM transmitter utilizing a nonlinear PA with memory effect is observed and discussed. For this purpose, a 10W Class-A/B power amplifier with a gain of 22 dB, operated over the 3.5 GHz frequency band was designed and implemented. The proposed baseband PD is independent of the operating RF frequency and can be used in multiband applications. Its operation is based on the Hammerstein system, taking into account PA memory effect compensation, and demonstrates a noticeable improvement compared to memoryless predistorters. Different types of modelling procedures and linearizers were introduced and investigated, in which accurate behavioural models of Radio Frequency (RF) PAs exhibiting linear and nonlinear memory effects were presented and considered, based on the Wiener approach employing a linear parametric estimation technique. Three new linear methods of parameter estimation were investigated, with the aim of reducing the complexity of the required filtering process in linear memory compensation. Moreover, an improved wiener model is represented to include the nonlinear memory effect in the system. The validity of the PA modelling approaches and predistortion techniques for compensation of nonlinearities of a PA were verified by several tests and measurements. The approaches presented, based on the Wiener system, have the capacity to deal with the existing trade-off between accuracy and convergence speed compared to more computationally complex behavioural modelling algorithms considering memory effects, such as those based on Volterra series and Neural Networks. In addition, nonlinear and linear crosstalks introduced by the power amplifier nonlinear behaviour and antennas mutual coupling due to the compact size of a MIMO OFDM transmitter have been investigated

Analysis and design of ΣΔ Modulators for Radio Frequency Switchmode Power Amplifiers

Power amplifiers are an integral part of every basestation, macrocell, microcell and mobile phone, enabling data to be sent over the distances needed to reach the receiver’s antenna. While linear operation is needed for transmitting WCDMA and OFDM signals, linear operation of a power amplifier is characterized by low power efficiency, and contributes to unwanted power dissipation in a transmitter. Recently, a switchmode power amplifier operation was considered for reducing power losses in a RF transmitter. A linear and efficient operation of a PA can be achieved when the transmitted RF signal is ΣΔ modu- lated, and subsequently amplified by a nonlinear device. Although in theory this approach offers linearity and efficiency reaching 100%, the use of ΣΔ modulation for transmitting wideband signals causes problems in practical implementation: it requires high sampling rate by the digital hardware, which is needed for shaping large contents of a quantization noise induced by the modulator but also, the binary output from the modulator needs an RF power amplifier operating over very wide frequency band. This thesis addresses the problem of noise shaping in a ΣΔ modulator and nonlinear distortion caused by broadband operation in switchmode power amplifier driven by a ΣΔ modulated waveform. The problem of sampling rate increase in a ΣΔ modulator is solved by optimizing structure of the modulator, and subsequent processing of an input signal’s samples in parallel. Independent from the above, a novel technique for reducing quan- tization noise in a bandpass ΣΔ modulator using single bit quantizer is presented. The technique combines error pulse shaping and 3-level quantization for improving signal to noise ratio in a 2-level output. The improvement is achieved without the increase of a digital hardware’s sampling rate, which is advantageous also from the perspective of power consumption. The new method is explored in the course of analysis, and verified by simulated and experimental results. The process of RF signal conversion from the Cartesian to polar form is analyzed, and a signal modulator for a polar transmitter with a ΣΔ-digitized envelope signal is designed and implemented. The new modulator takes an advantage of bandpass digital to analog conversion for simplifying the analog part of the modulator. A deformation of the pulsed RF signal in the experimental modulator is demonstrated to have an effect primarily on amplitude of the RF signal, which is correctable with simple predistortion

Behavioral modeling techniques for power amplifier digital pre-distortion

Abstract. The dramatic increase in the capacity of telecommunication networks has increased the requirements of the devices, one example of which is the continuously widening bandwidth. Using broadband signals requires often high linearity from the transmitter — and especially from the power amplifier at the end of the transmitter chain — but at the same time, it should operate as efficiently as possible. The power amplifier is the most power consuming component in the transmitter and inherently nonlinear, so its linearization is an essential part of the overall system performance. Of the current linearization techniques, digital pre-distortion has established itself as the most common tool for providing better linearity and efficiency in a power amplifier and transmitter. In this thesis, the performance of power amplifier models used in digital pre-distortion was investigated and their differences compared to the more complex reference model used in the actual base station product. The aim of this thesis was to create a behavioral model that corresponds the physical component as accurately as the reference model. This behavioral model could be used for example to design and optimize a power amplifier and linearization algorithm without the need for the secret model for the product. This, in its turn, would result in more efficient work with third parties such as component vendors and reduce the linearization time. The performance parameters of the behavioral models were introduced at the beginning of the thesis. These were also used in later parts to analyse the measurement results. Power amplifier linearization measurements were performed under laboratory conditions on a MATLAB® test bench. From the results, it was found that the use of a simple memoryless behavioral model is not enough to describe the physical nonlinear component with sufficient accuracy. The results also showed that the complexity of the model reduces its accuracy if the model coefficients are not correctly positioned. In this thesis, we succeeded in creating a memory model that describes the reference model sufficiently accurately on several meters, taking into account also the memory effects of the power amplifier. This thesis thus provides a good basis for further development of the actual modeling tool for product projects.Tehovahvistimen käyttäytymistason mallinnustekniikat esisärötyksen tueksi. Tiivistelmä. Tietoliikenneverkkojen kapasiteetin räjähdysmäinen kasvu on lisännyt laitteiden vaatimuksia, joista yhtenä esimerkkinä on jatkuvasti suureneva kaistanleveys. Laajakaistaiset signaalit vaativat usein lähettimeltä — ja etenkin lähettimen loppupäässä olevalta tehovahvistimelta — korkeaa lineaarisuutta, mutta samalla sen on toimittava mahdollisimman tehokkaasti. Tehovahvistin on lähettimen eniten tehoa kuluttava komponentti ja luonnostaan epälineaarinen, joten sen linearisointi on oleellinen osa koko systeemin suorituskykyä. Nykyisistä linearisointitekniikoista digitaalinen esisärötys on vakiinnuttanut paikkansa yleisimpänä työkaluna paremman lineaarisuuden ja tehokkuuden saavuttamiseksi tehovahvistimessa. Tässä diplomityössä tutkittiin digitaalisessa esisärötyksessä käytettävien käyttäytymistason tehovahvistinmallien suorituskykyjä ja niiden eroja varsinaisessa tukiasematuotteessa käytettävään, monimutkaisempaan referenssimalliin verrattuna. Työn tavoitteena oli luoda käyttäytymismalli, jolla voidaan kuvata fyysistä komponenttia yhtä tarkasti kuin referenssimallilla. Mallia voitaisiin käyttää esimerkiksi uuden tehovahvistimen suunnittelussa ilman, että kaupalliseen tuotteeseen tulevaa, salaista referenssimallia on tarve käyttää. Näin voitaisiin tehostaa työskentelyä ulkopuolisten tahojen, kuten komponenttitoimittajien kanssa ja vähentää linearisointiin käytettävää aikaa. Työn alussa esiteltiin käyttäytymismallien suorituskykyparametrit, joita käytettiin mittaustulosten analysointiin. Tehovahvistimien linearisointimittaukset suoritettiin laboratorio-olosuhteissa MATLAB®-testipenkissä. Mittauksissa todettiin, että yksinkertainen, muistiton käyttäytymismalli ei riitä kuvaamaan fyysistä komponenttia riittävän tarkasti. Tuloksista pääteltiin myös, että liian kompleksinen malli heikentää sen tarkkuutta. Työssä onnistuttiin luomaan muistillinen käyttäytymismalli, joka kuvaa referenssimallia riittävän tarkasti usealla eri mittarilla tarkastellen — huomioiden osaltaan myös tehovahvistimen muistiefektejä. Tämä opinnäytetyö tarjoaa siis hyvän pohjan varsinaisen mallinnustyökalun jatkokehitykselle tuoteprojekteihin

ワイヤレス通信のための先進的な信号処理技術を用いた非線形補償法の研究

The inherit nonlinearity in analogue front-ends of transmitters and receivers have had primary impact on the overall performance of the wireless communication systems, as it gives arise of substantial distortion when transmitting and processing signals with such circuits. Therefore, the nonlinear compensation (linearization) techniques become essential to suppress the distortion to an acceptable extent in order to ensure sufficient low bit error rate. Furthermore, the increasing demands on higher data rate and ubiquitous interoperability between various multi-coverage protocols are two of the most important features of the contemporary communication system. The former demand pushes the communication system to use wider bandwidth and the latter one brings up severe coexistence problems. Having fully considered the problems raised above, the work in this Ph.D. thesis carries out extensive researches on the nonlinear compensations utilizing advanced digital signal processing techniques. The motivation behind this is to push more processing tasks to the digital domain, as it can potentially cut down the bill of materials (BOM) costs paid for the off-chip devices and reduce practical implementation difficulties. The work here is carried out using three approaches: numerical analysis & computer simulations; experimental tests using commercial instruments; actual implementation with FPGA. The primary contributions for this thesis are summarized as the following three points: 1) An adaptive digital predistortion (DPD) with fast convergence rate and low complexity for multi-carrier GSM system is presented. Albeit a legacy system, the GSM, however, has a very strict requirement on the out-of-band emission, thus it represents a much more difficult hurdle for DPD application. It is successfully implemented in an FPGA without using any other auxiliary processor. A simplified multiplier-free NLMS algorithm, especially suitable for FPGA implementation, for fast adapting the LUT is proposed. Many design methodologies and practical implementation issues are discussed in details. Experimental results have shown that the DPD performed robustly when it is involved in the multichannel transmitter. 2) The next generation system (5G) will unquestionably use wider bandwidth to support higher throughput, which poses stringent needs for using high-speed data converters. Herein the analog-to-digital converter (ADC) tends to be the most expensive single device in the whole transmitter/receiver systems. Therefore, conventional DPD utilizing high-speed ADC becomes unaffordable, especially for small base stations (micro, pico and femto). A digital predistortion technique utilizing spectral extrapolation is proposed in this thesis, wherein with band-limited feedback signal, the requirement on ADC speed can be significantly released. Experimental results have validated the feasibility of the proposed technique for coping with band-limited feedback signal. It has been shown that adequate linearization performance can be achieved even if the acquisition bandwidth is less than the original signal bandwidth. The experimental results obtained by using LTE-Advanced signal of 320 MHz bandwidth are quite satisfactory, and to the authors’ knowledge, this is the first high-performance wideband DPD ever been reported. 3) To address the predicament that mobile operators do not have enough contiguous usable bandwidth, carrier aggregation (CA) technique is developed and imported into 4G LTE-Advanced. This pushes the utilization of concurrent dual-band transmitter/receiver, which reduces the hardware expense by using a single front-end. Compensation techniques for the respective concurrent dual-band transmitter and receiver front-ends are proposed to combat the inter-band modulation distortion, and simultaneously reduce the distortion for the both lower-side band and upper-side band signals.電気通信大学201