Designing HMO, an Integrated Hardware Microcode Optimizer

This Paper Discusses an Algorithm for Optimizing the Density and Parallelism of Micro coded Routines in Micro programmable Machines. Besides the Algorithm itself, the Algorithm\u27s Uses, Design Integration Problems, Architectural Requirements, and Adaptability to Conventional Machine Characteristics Are Also Discussed and Analyzed. Even Though the Paper Proposes a Hardware Implementation of the Algorithm, the Algorithm is Viewed as an Integral Part of the Entire Microcode Generation and Usage Process, from Initial High-Level Input into a Software Microcode Compiler Down to Machine-Level Execution of the Resultant Microcode on the Host Machine. It is Believed that, by Removing Much of the Traditionally Time-Consuming and Machine-Dependent Microcode Optimization from the Software Portion of This Process, the Algorithm Can Improve the overall Process

Designing a high level microprogramming language

The purpose of this research is to design a high level language (HLL) suitable for microprogramming. A top down design technique has been adopted which makes the language design process simple and accurate. The primitive operations of a high level language for producing emulators is shown to include special purpose features specific to virtual machine implementations. A hierarchy of data types, short reliable language constructs, and control structures that minimize emulator complexity are suggested by a goal-directed, structural design methodology. In addition, structural clues generated by the language compiler assist in producing portable yet efficient horizontal microcode for partially encoded host architectures. Furthermore, software tools in the form of a simulator-compiler combination are presented which provide features for design, development, test and eventual certification of microprograms

Advancing HAL to an operational status

The development of the HAL language and the compiler implementation of the mathematical subset of the language have been completed. On-site support, training, and maintenance of this compiler were enlarged to broaden the implementation of HAL to include all features of the language specification for NASA manned space usage. A summary of activities associated with the HAL compiler for the UNIVAC 1108 is given

Towards a design of HMO, an integrated hardware microcode optimizer

This paper discusses an algorithm for optimizing the density and parallelism of microcoded routines in micro-programmable machines. Besides presenting the algorithm itself, this research also analyzes the algorithm\u27s uses, design integration problems, architectural requirements, and adaptability to conventional machine characteristics. Even though the paper proposes a hardware implementation of the algorithm, the algorithm is viewed as an integral part of the entire microcode generation and usage process, from initial high-level input into a software microcode compiler down to machine-level execution of the resultant microcode on the host machine. It is believed that, by removing much of the traditionally time-consuming and machine-dependent microcode optimization from the software portion of this process, the algorithm can improve the overall process --Abstract, page ii

Advanced architecture for universal machine control

Computer control of machines is now commonplace in industrial, commercial and domestic situations. Digitally controlled equipment is available from many sources and can be configured in various ways to produce software controlled industrial machines. However, despite major technological developments in real-time control there is still a pressing need for a methodology to facilitate its widespread utilization. The variety of equipment available and range of manufacturers involved has resulted in the emergence of a great many techniques and standards relating to communication, information exchange and programming. However, where standards exist they are often de facto and non-conformity is common. The performance capabilities of computer controlled machines should reflect the state-of-the-art with respect to the enabling technology. Progress both in technical and commercial terms can be rapid, with frequent changes in the leading suppliers. No single supplier is likely to have the expertise or resources to develop and maintain a leading position as the source of all the items needed to create integrated systems. A system builder wishing to optimize his design must therefore use proprietary building blocks from a number of different sources. However, this means that large amounts of time and effort must be allocated to the development of custom software to integrate different manufacturer's equipment. The alternative is to limit the choice to known items from a restricted range of suppliers, but the associated risks are well known. At best, the system builder is likely to be cut off from the progress of the technology and at worst he may be unable to obtain equipment support and supply

Reducing a complex instruction set computer.

Tse Tin-wah.Thesis (M.Ph.)--Chinese University of Hong Kong, 1988.Bibliography: leaves [73]-[78

A machine-independent microprogram development system

The aims of this project are twofold. They are firstly, to implement a microprogram development system that allows the programmer to write microcode for any microprogrammable machine, and secondly, to build a microprogrammable machine, incorporating the user friendliness of a simulator, while still providing the 'hands on' experience obtained actual hardware. Microprogram development involves a two stage process. The first step is to describe the target machine, using format descriptions and mnemonic-based template definitions. The second stage involves using the defined mnemonics to write the microcodes for the target machine. This includes an assembly phase to translate the mnemonics into the binary microinstructions. Three main components constitute the microprogrammable machine. The Arithmetic and Logic Unit (ALU) is built using chips from Advanced Micro Devices' Am29ØØ bit-slice family, the action of the Microprogram Control Unit (MCU) is simulated by software running on an IBM Personal Computer, and a section of the IBM PC's main memory acts as the Control Store (CS) for the system. The ALU is built on a prototyping card that plugs into one of the slots on the IBM PC's mother board. A hardware simulator program, that produces the effect of the ALU, has also been developed. A small assembly language has been developed using the system, to test the various functions of the system. A mini-assembler has also been written to facilitate assembly of the above language. A group of honours students at Rhodes University tested the microprogram development system. Their ideas and suggestions have been tabulated in this report and some of them have been used to enhance the system's performance. The concept of allowing 'inline' microinstructions in the macroprogram is also investigated in this report and a method of implementing this is shown

Digital avionics design and reliability analyzer

The description and specifications for a digital avionics design and reliability analyzer are given. Its basic function is to provide for the simulation and emulation of the various fault-tolerant digital avionic computer designs that are developed. It has been established that hardware emulation at the gate-level will be utilized. The primary benefit of emulation to reliability analysis is the fact that it provides the capability to model a system at a very detailed level. Emulation allows the direct insertion of faults into the system, rather than waiting for actual hardware failures to occur. This allows for controlled and accelerated testing of system reaction to hardware failures. There is a trade study which leads to the decision to specify a two-machine system, including an emulation computer connected to a general-purpose computer. There is also an evaluation of potential computers to serve as the emulation computer