Systems And Methods For Visualization Of Exception Handling Constructs

Disclosed are various embodiments for visualization of exception-handling constructs. In one embodiment, among others, a system includes at least one computing device; a program maintained in a memory accessible to the at least one computing device; and logic executable in the at least one computing device configured to analyze the program to determine exception-handling information; generate a graphical user interface based upon the exception-handling information; and provide the graphical user interface for display on a display device.Georgia Tech Research Corporatio

An investigation into the control of automated venetian blinds

SIGLEAvailable from British Library Document Supply Centre- DSC:DXN058279 / BLDSC - British Library Document Supply CentreGBUnited Kingdo

Nuevas técnicas de inyección de fallos en sistemas embebidos mediante el uso de modelos virtuales descritos en el nivel de transacción

Mejor software y más rápido. Este es el desafío que se deriva de la necesidad de construir sistemas cada vez más inteligentes. En cualquier diseño embebido actual, el software es un componente fundamental que dota al sistema de una alta capacidad de configuración, gran número de funcionalidades y elasticidad en el comportamiento del sistema en situaciones excepcionales. Si además el desarrollo del conjunto hardware/software integrado en un System on Chip (SoC), forma parte de un sistema de control crítico donde se deben tener en cuenta requisitos de tolerancia a fallos, la verificación exhaustiva de los mismos consume un porcentaje cada vez más importante de los recursos totales dedicados al desarrollo y puesta en funcionamiento del sistema. En este contexto, el uso de metodologías clásicas de codiseño y coverificación es completamente ineficiente, siendo necesario el uso de nuevas tecnologías y herramientas para el desarrollo y verificación tempranos del software embebido. Entre ellas se puede incluir la propuesta en este trabajo de tesis, la cual aborda el problema mediante el uso de modelos ejecutables del hardware definidos en el nivel de transacción. Debido a los estrictos requisitos de robustez que imperan en el desarrollo de software espacial, es necesario llevar a cabo tareas de verificación en etapas muy tempranas del desarrollo para asegurar que los mecanismos de tolerancia a fallos, avanzados en la especificación del sistema, funcionan adecuadamente. De forma general, es deseable que estas tareas se realicen en paralelo con el desarrollo hardware, anticipando problemas o errores existentes en la especificación del sistema. Además, la verificación completa de los mecanismos de excepción implementados en el software, puede ser imposible de realizar en hardware real ya que los escenarios de fallo deben ser artificial y sistemáticamente generados mediante técnicas de inyección de fallos que permitan realizar campañas de inyección controlables, observables y reproducibles. En esta tesis se describe la investigación, desarrollo y uso de una plataforma virtual denominada "Leon2ViP", con capacidad de inyección de fallos y basada en interfaces SystemC/TLM2 para el desarrollo temprano y verificación de software embebido en el marco del proyecto Solar Orbiter. De esta forma ha sido posible ejecutar y probar exactamente el mismo código binario a ejecutar en el hardware real, pero en un entorno más controlable y determinista. Ello permite la realización de campañas de inyección de fallos muy focalizadas que no serían posible de otra manera. El uso de "\Leon2ViP" ha significado una mejora significante, en términos de coste y tiempo, en el desarrollo y verificación del software de arranque de la unidad de control del instrumento (ICU) del detector de partículas energéticas (EPD) embarcado en Solar Orbiter

Product traceability in the pharmaceutical supply chain : an analysis of the auto-ID approach

Thesis (M. Eng. in Logistics)--Massachusetts Institute of Technology, Engineering Systems Division, 2003.Includes bibliographical references (p. 70-73).This thesis analyzes how the Auto-ID technology and information infrastructure will change the management and distribution of pharmaceutical products within the health care industry by enabling item level product traceability functionality. The complexity of the health care industry is steadily growing, due to the concurrent increase in medical knowledge, biomedical technologies, the number of medications and the age of the population. The key to ensuring the quality, integrity and availability of health care goods is the ability to track and trace individual items throughout their complete life-cycle from manufacturing to disposal. Product traceability within the Supply Chain is becoming increasingly important for pharmaceutical manufacturers because the increasing number of medications distributed worldwide has led to the proliferation of counterfeit drugs, product diversions, re-importations and grey markets. Ultimately, the increasing complexity of the pharmaceutical distribution could affect patient safety. The potential of the Auto-ID technology and information infrastructure to synchronize the information and material flow is illustrated using a case study methodology.by Attilio Bellman.M.Eng.in Logistic

Smart vision in system-on-chip applications

In the last decade the ability to design and manufacture integrated circuits with higher transistor densities has led to the integration of complete systems on a single silicon die. These are commonly referred to as System-on-Chip (SoC). As SoCs processes can incorporate multiple technologies it is now feasible to produce single chip camera systems with embedded image processing, known as Imager-on-Chips (IoC). The development of IoCs is complicated due to the mixture of digital and analog components and the high cost of prototyping these designs using silicon processes. There are currently no re-usable prototyping platforms that specifically address the needs of IoC development. This thesis details a new prototyping platform specifically for use in the development of low-cost mass-market IoC applications. FPGA technology was utilised to implement a frame-based processing architecture suitable for supporting a range of real-time imaging and machine vision applications. To demonstrate the effectiveness of the prototyping platform, an example object counting and highlighting application was developed and functionally verified in real-time. A high-level IoC cost model was formulated to calculate the cost of manufacturing prototyped applications as a single IoC. This highlighted the requirement for careful analysis of optical issues, embedded imager array size and the silicon process used to ensure the desired IoC unit cost was achieved. A modified version of the FPGA architecture, which would result in improving the DSP performance, is also proposed

Regenerable biocide delivery unit, volume 1

The Microbial Check Valve (MCV), which is currently used aboard the Shuttle Orbiter for disinfection of the potable water supply, is an expendable flow-through canister containing iodinated ion exchange resin. Means for extension of MCV life are desirable to avoid resupply penalties. The Phase 1 Regenerable Biocide Delivery Unit program demonstrated the feasibility of regenerating an MCV in situ, using a strong aqueous elemental iodine solution resulting from diversion of the MCV influent to a packed bed containing iodine crystals. In small column tests, eight manual regenerations of an MCV resin were accomplished. The term Regenerative Microbial Check Valve (RMCV) was adopted describing this new technology. The Phase 2 program resulted in the development of a full scale and fully autonomous prototype RMCV, capable of maintaining residual I(sub 2) levels between 2.0 - 4.0 mg/L for prolonged periods. During six months of testing at the Space Station baseline flow rate of 120 cm(sup 3)/min, the prototype RMCV underwent nine regenerations. RMCV life cycle tests, using a variety of influent streams, were conducted over an eighteen month period to determine the useful lives of MCV's incorporating this new technology and to determine ultimate failure mechanisms. MCV life extensions of 130 fold were demonstrated, limited only by the Phase 2 performance period. Based upon this work, it is certain that RMCV units can be developed to provide unattended biocide addition for the thirty year life of Space Station Freedom, or for other longer duration applications such as a Lunar Base or Mars mission. RMCV technology was also demonstrated capable of delivering, on demand, a concentrated aqueous I(sub 2) solution for potential use as a disinfectant during transient episodes of microbial surface contamination, for the control of biofilm formation, or as a preventative measure in systems which are particularly susceptible to the growth of microorganisms

Numerical and Compact Modeling of Embedded Flash Memory Devices Targeted for IC Design

In a semiconductor market dominated by portable consumer applications, embedded flash memory technology has experienced a rapid diffusion. It is now considered the preferred solid-state memory solution for its non-volatile characteristics, high read and write speeds and scalability properties. As technology scales down in the nanometer range, new accurate physical tools should be made available to circuit designers, to support the development and optimization of high-voltage circuit blocks. A surface potential-based model for the flash memory cell has been developed with the purpose of providing a comprehensive physical understanding of the device operation, suitable for performance optimization in memory circuit design. An accurate validation methodology also takes into account charge balance effects on the isolated floating gate node and parasitic couplings inside and between the memory cells. The compact model supports DC, AC and transient analyses, including program/erase bias scalability, temperature effects, process corners and statistical variations. The results have been compared to Technology Computer-Aided Design (TCAD) simulations demonstrating that short channel effects, overlap capacitances and velocity saturation dominate over the intrinsic behaviour of the cell in ultrascaled devices. The approach includes drain disturb and memory endurance degradation models due to oxide aging. These effects are becoming dominant in ultrascaled devices. The model has been implemented using the Verilog-A language for portability into common circuit simulators. Validation has been performed on measurement results of test structures integrated in a 65nm derivative NOR CMOS technology. The compact model development has been based on a rigorous modeling approach combining conventional TCAD simulation tools with physically-based analyses. A new TCAD tool has been proposed for the investigation of advanced quantum effects, band structure models, quantum tunneling and multiphonon-assisted charge trapping effects in dielectrics. The effects of charge trapping in oxide layers and Si/SiO2 interfaces have been studied, specifically focusing on flash technology, where high voltage biases represent a major issue for dielectric degradation. A multiphonon-assisted model has been coupled with a Poisson-Schrödinger quantum solver. A novel impedance calculation method has been applied to the analysis of DC and AC MOS characteristics. This approach permits the physical modeling of trap filling, frequency response and device electrostatics. Transient effects of trap filling and trap-assisted tunneling through the gate have also been investigated. The adoption of such a multilevel approach permits to apply the methodology to flash memory cells. This enabled the investigation of the role of defects on electrostatics and program/erase efficiency reduction. The flash compact model has been applied in a process development and IC memory design perspective. Technology development requires a profound understanding of trade-offs in flash devices, which affect DC, transient and long-term performances. The design, integration and characterization of a 40 KB memory sector for smart card applications has been performed to demonstrate the capabilities of the compact model

Future manned systems advanced avionics study

COTS+ was defined in this study as commercial off-the-shelf (COTS) products, ruggedized and militarized components, and COTS technology. This study cites the benefits of integrating COTS+ in space, postulates a COTS+ integration methodology, and develops requirements and an architecture to achieve integration. Developmental needs and concerns were identified throughout the study; these needs, concerns, and recommendations relative to their abatement are subsequently presented for further action and study. The COTS+ concept appears workable in part or in totality. No COTS+ technology gaps were identified; however, radiation tolerance was cited as a concern, and the deferred maintenance issue resurfaced. Further study is recommended to explore COTS+ cost-effectiveness, maintenance philosophy, needs, concerns, and utility metrics. The generation of a development plan to further investigate and integrate COTS+ technology is recommended. A COTS+ transitional integration program is recommended. Sponsoring and establishing technology maturation programs and COTS+ engineering and standards committees are deemed necessary and are recommended for furthering COTS+ integration in space

Developing neurostimulation techniques to investigate antidepressant and mood modulating behaviors / by Rajas Prakash Kale

 My PhD consisted of a multidisciplinary approach towards primary research in the field of translational neuroscience. Incorporation of preclinical research, behavioral neuroscience, translational psychiatry, neural engineering, and biomedical device development techniques drives my continuing passion towards helping patients through innovation