Preemptive scheduling on uniform parallel machines with controllable job processing times

In this paper, we provide a unified approach to solving preemptive scheduling problems with uniform parallel machines and controllable processing times. We demonstrate that a single criterion problem of minimizing total compression cost subject to the constraint that all due dates should be met can be formulated in terms of maximizing a linear function over a generalized polymatroid. This justifies applicability of the greedy approach and allows us to develop fast algorithms for solving the problem with arbitrary release and due dates as well as its special case with zero release dates and a common due date. For the bicriteria counterpart of the latter problem we develop an efficient algorithm that constructs the trade-off curve for minimizing the compression cost and the makespan

MSB-First Interval-Bounded Variable-Precision RealTime Arithmetic Unit

This paper presents a paradigm of real-time processing on the lowest level of computing systems: the arithmetic unit. The arithmetic unit based on this principle containing addition, subtraction, multiplication and division operations is  described.  The  development  of  the  computation  model  is  based  on  the  Soft Computing and the Imprecise Computation paradigms, combined with the MSBFirst  and  the  Interval  Arithmetic  techniques.  Those  paradigms  and  techniques give  the  arithmetic  unit  design  the  ability  to  compute  with  precisions  as  a function  of time available or accuracy needed. The predictability of processing time and result's accuracy are obtained by means of processing granularity of k bits and by  using look-up tables. We present an evaluation of  the operation in time  delay  and  computation  accuracy  that  shows  significant  performance improvement over conventional arithmetic unit architecture, that is,  the ability to produce  intermediate-result  during  execution  time,  to  give  certainty  in computation  accuracy  even  before  the  process  finish  time  by  providing  two intermediate-results,  which  act  as  the  lower  and  upper  bound  of  the  real  and complete computation result, and finally, gain high computation accuracy from the early time of the execution process

PERTS: A Prototyping Environment for Real-Time Systems

PERTS is a prototyping environment for real-time systems. It is being built incrementally and will contain basic building blocks of operating systems for time-critical applications, tools, and performance models for the analysis, evaluation and measurement of real-time systems and a simulation/emulation environment. It is designed to support the use and evaluation of new design approaches, experimentations with alternative system building blocks, and the analysis and performance profiling of prototype real-time systems

MARACAS: a real-time multicore VCPU scheduling framework

This paper describes a multicore scheduling and load-balancing framework called MARACAS, to address shared cache and memory bus contention. It builds upon prior work centered around the concept of virtual CPU (VCPU) scheduling. Threads are associated with VCPUs that have periodically replenished time budgets. VCPUs are guaranteed to receive their periodic budgets even if they are migrated between cores. A load balancing algorithm ensures VCPUs are mapped to cores to fairly distribute surplus CPU cycles, after ensuring VCPU timing guarantees. MARACAS uses surplus cycles to throttle the execution of threads running on specific cores when memory contention exceeds a certain threshold. This enables threads on other cores to make better progress without interference from co-runners. Our scheduling framework features a novel memory-aware scheduling approach that uses performance counters to derive an average memory request latency. We show that latency-based memory throttling is more effective than rate-based memory access control in reducing bus contention. MARACAS also supports cache-aware scheduling and migration using page recoloring to improve performance isolation amongst VCPUs. Experiments show how MARACAS reduces multicore resource contention, leading to improved task progress.http://www.cs.bu.edu/fac/richwest/papers/rtss_2016.pdfAccepted manuscrip

Pinwheel Scheduling for Fault-tolerant Broadcast Disks in Real-time Database Systems

The design of programs for broadcast disks which incorporate real-time and fault-tolerance requirements is considered. A generalized model for real-time fault-tolerant broadcast disks is defined. It is shown that designing programs for broadcast disks specified in this model is closely related to the scheduling of pinwheel task systems. Some new results in pinwheel scheduling theory are derived, which facilitate the efficient generation of real-time fault-tolerant broadcast disk programs.National Science Foundation (CCR-9308344, CCR-9596282

Imprecise Computation Model, Synchronous Periodic Real-time Task Sets and Total Weighted Error

This paper proposes two scheduling approaches, one-level and two-level scheduling, for synchronous periodic real-time task sets based on the Imprecise Computation Model. The imperative of real-time systems is a reaction on an event within a limited amount of time. Sometimes the available time and resources are not enough for the computations to complete within the deadlines, but still enough to produce approximate results. The Imprecise Computation Model is motivated by this idea, which gives the flexibility to trade off precision for timeliness. In this model a task is logically decomposed into a mandatory and optional subtask. Only the mandatory subtask is required to complete by its deadline, while the optional subtask may be left unfinished. Usually, different scheduling policies are used for the scheduling of mandatory and optional subtasks. For both proposed approaches the earliest deadline first and rate monotonic scheduling algorithms are used for the scheduling of mandatory subtasks, whereas the optional subtasks are scheduled in a way that the total weighted error is minimized. The basic idea of one-level scheduling is to extend the mandatory execution times, while in two-level scheduling the mandatory and optional subtasks are separately scheduled. The single preemptive processor model is assumed

Scheduling Techniques for Operating Systems for Medical and IoT Devices: A Review

Software and Hardware synthesis are the major subtasks in the implementation of hardware/software systems. Increasing trend is to build SoCs/NoC/Embedded System for Implantable Medical Devices (IMD) and Internet of Things (IoT) devices, which includes multiple Microprocessors and Signal Processors, allowing designing complex hardware and software systems, yet flexible with respect to the delivered performance and executed application. An important technique, which affect the macroscopic system implementation characteristics is the scheduling of hardware operations, program instructions and software processes. This paper presents a survey of the various scheduling strategies in process scheduling. Process Scheduling has to take into account the real-time constraints. Processes are characterized by their timing constraints, periodicity, precedence and data dependency, pre-emptivity, priority etc. The affect of these characteristics on scheduling decisions has been described in this paper

Genetic Algorithms in Real-Time Imprecise Computing

This article describes the use of genetic algorithms in real-time systems that employ the imprecise computation paradigm. In real-time systems, the focus is on ensuring that a set of tasks each complete within their deadlines. Faults may occur in the computation or the environment that can cause missed deadlines. That is why the idea of using partial results, when exact ones cannot be produced within the deadline, has been introduced. This idea has been formalized using the concepts of anytime algorithms and imprecise computation and specific techniques have been developed for designing programs which can produce partial results and for developing systems that can support imprecise computation techniques. Genetic algorithms are methods that can be, without any adaptation, used in an imprecise computation system. They produce a solution that bears a certain measure of reliability. During the process of their execution, this solution is constant ly improving. They can be used as a part of a real-time system, especially for optimizing tasks where the classical algorithms are not applicable or its computational time proves to be too expensive

Stability properties of adaptive real-time feedback scheduling: A statistical approach

This paper focuses on the statistical analysis of an adaptive real-time feedback scheduling technique based on imprecise computation. We consider two-version tasks made of a mandatory and an optional part to be scheduled according to a feedback control rate-monotonic algorithm. A Proportional-Integral-Derivative (PID) control action provides the feedback strategy for deciding about the execution or rejection of the optional sub-tasks. By modelling the task execution times as random variables, we compute the probability density of the CPU utilization and derive conditions on PID parameters guaranteeing the stability of the overall system around a desired level of CPU utilization. This allows us to highlight the tasks statistics and the scheduling parameters that affect critically stability. The analysis is developed by first exploiting a number of simplifying assumptions that are progressively removed. The main results are also demonstrated through monte-carlo simulations of the scheduling algorithm.Izmir Institute of Technology and Institute Ae´ronautique et Spatia