Constraint-driven RF test stimulus generation and built-in test

With the explosive growth in wireless applications, the last decade witnessed an ever-increasing test challenge for radio frequency (RF) circuits. While the design community has pushed the envelope far into the future, by expanding CMOS process to be used with high-frequency wireless devices, test methodology has not advanced at the same pace. Consequently, testing such devices has become a major bottleneck in high-volume production, further driven by the growing need for tighter quality control. RF devices undergo testing during the prototype phase and during high-volume manufacturing (HVM). The benchtop test equipment used throughout prototyping is very precise yet specialized for a subset of functionalities. HVM calls for a different kind of test paradigm that emphasizes throughput and sufficiency, during which the projected performance parameters are measured one by one for each device by automated test equipment (ATE) and compared against defined limits called specifications. The set of tests required for each product differs greatly in terms of the equipment required and the time taken to test individual devices. Together with signal integrity, precision, and repeatability concerns, the initial cost of RF ATE is prohibitively high. As more functionality and protocols are integrated into a single RF device, the required number of specifications to be tested also increases, adding to the overall cost of testing, both in terms of the initial and recurring operating costs. In addition to the cost problem, RF testing proposes another challenge when these components are integrated into package-level system solutions. In systems-on-packages (SOP), the test problems resulting from signal integrity, input/output bandwidth (IO), and limited controllability and observability have initiated a paradigm shift in high-speed analog testing, favoring alternative approaches such as built-in tests (BIT) where the test functionality is brought into the package. This scheme can make use of a low-cost external tester connected through a low-bandwidth link in order to perform demanding response evaluations, as well as make use of the analog-to-digital converters and the digital signal processors available in the package to facilitate testing. Although research on analog built-in test has demonstrated hardware solutions for single specifications, the paradigm shift calls for a rather general approach in which a single methodology can be applied across different devices, and multiple specifications can be verified through a single test hardware unit, minimizing the area overhead. Specification-based alternate test methodology provides a suitable and flexible platform for handling the challenges addressed above. In this thesis, a framework that integrates ATE and system constraints into test stimulus generation and test response extraction is presented for the efficient production testing of high-performance RF devices using specification-based alternate tests. The main components of the presented framework are as follows: Constraint-driven RF alternate test stimulus generation: An automated test stimulus generation algorithm for RF devices that are evaluated by a specification-based alternate test solution is developed. The high-level models of the test signal path define constraints in the search space of the optimized test stimulus. These models are generated in enough detail such that they inherently define limitations of the low-cost ATE and the I/O restrictions of the device under test (DUT), yet they are simple enough that the non-linear optimization problem can be solved empirically in a reasonable amount of time. Feature extractors for BIT: A methodology for the built-in testing of RF devices integrated into SOPs is developed using additional hardware components. These hardware components correlate the high-bandwidth test response to low bandwidth signatures while extracting the test-critical features of the DUT. Supervised learning is used to map these extracted features, which otherwise are too complicated to decipher by plain mathematical analysis, into the specifications under test. Defect-based alternate testing of RF circuits: A methodology for the efficient testing of RF devices with low-cost defect-based alternate tests is developed. The signature of the DUT is probabilistically compared with a class of defect-free device signatures to explore possible corners under acceptable levels of process parameter variations. Such a defect filter applies discrimination rules generated by a supervised classifier and eliminates the need for a library of possible catastrophic defects.Ph.D.Committee Chair: Chatterjee, Abhijit; Committee Member: Durgin, Greg; Committee Member: Keezer, David; Committee Member: Milor, Linda; Committee Member: Sitaraman, Sures

Development of Robust Analog and Mixed-Signal Circuits in the Presence of Process- Voltage-Temperature Variations

Continued improvements of transceiver systems-on-a-chip play a key role in the advancement of mobile telecommunication products as well as wireless systems in biomedical and remote sensing applications. This dissertation addresses the problems of escalating CMOS process variability and system complexity that diminish the reliability and testability of integrated systems, especially relating to the analog and mixed-signal blocks. The proposed design techniques and circuit-level attributes are aligned with current built-in testing and self-calibration trends for integrated transceivers. In this work, the main focus is on enhancing the performances of analog and mixed-signal blocks with digitally adjustable elements as well as with automatic analog tuning circuits, which are experimentally applied to conventional blocks in the receiver path in order to demonstrate the concepts. The use of digitally controllable elements to compensate for variations is exemplified with two circuits. First, a distortion cancellation method for baseband operational transconductance amplifiers is proposed that enables a third-order intermodulation (IM3) improvement of up to 22dB. Fabricated in a 0.13µm CMOS process with 1.2V supply, a transconductance-capacitor lowpass filter with the linearized amplifiers has a measured IM3 below -70dB (with 0.2V peak-to-peak input signal) and 54.5dB dynamic range over its 195MHz bandwidth. The second circuit is a 3-bit two-step quantizer with adjustable reference levels, which was designed and fabricated in 0.18µm CMOS technology as part of a continuous-time SigmaDelta analog-to-digital converter system. With 5mV resolution at a 400MHz sampling frequency, the quantizer's static power dissipation is 24mW and its die area is 0.4mm^2. An alternative to electrical power detectors is introduced by outlining a strategy for built-in testing of analog circuits with on-chip temperature sensors. Comparisons of an amplifier's measurement results at 1GHz with the measured DC voltage output of an on-chip temperature sensor show that the amplifier's power dissipation can be monitored and its 1-dB compression point can be estimated with less than 1dB error. The sensor has a tunable sensitivity up to 200mV/mW, a power detection range measured up to 16mW, and it occupies a die area of 0.012mm^2 in standard 0.18µm CMOS technology. Finally, an analog calibration technique is discussed to lessen the mismatch between transistors in the differential high-frequency signal path of analog CMOS circuits. The proposed methodology involves auxiliary transistors that sense the existing mismatch as part of a feedback loop for error minimization. It was assessed by performing statistical Monte Carlo simulations of a differential amplifier and a double-balanced mixer designed in CMOS technologies

Τεχνικές ελέγχου ορθής λειτουργίας και διόρθωσης επιδόσεων τηλεπικοινωνιακών ολοκληρωμένων κυκλωμάτων υψηλών συχνοτήτων

Στη διατριβή αυτή παρουσιάζονται τεχνικές ελέγχου ορθής λειτουργίας και διόρθωσης επιδόσεων κατάλληλες για αναλογικά ολοκληρωμένα κυκλώματα RF. Ειδικότερα, προτείνεται η ενοποίηση των διαδικασιών ελέγχου ορθής λειτουργίας και διόρθωσης των επιδόσεων ενός κυκλώματος με την αξιοποίηση ενός συνόλου βέλτιστα επιλεγμένων παρατηρήσιμων μεγεθών. Η επεξεργασία των μεγεθών αυτών καθιστά δυνατή, αφενός, την ανίχνευση ελαττωμάτων και, αφετέρου, την πρόγνωση των επιδόσεων του κυκλώματος η οποία επιτρέπει την εξέταση της συμμόρφωσής του προς τις προδιαγραφές, καθώς και τη διόρθωση της συμπεριφοράς του. Προκειμένου να αντιμετωπισθεί το πρόβλημα της προσβασιμότητας στα παρατηρήσιμα μεγέθη προτείνεται ενσωματωμένη τεχνική μέτρησής τους, ενώ αναπτύσσεται μέθοδος για την ελαχιστοποίηση της αβεβαιότητας που υπεισέρχεται στο ίδιο το σύστημα μέτρησης. Εφαρμόζονται, επίσης, αλγόριθμοι επιλογής με σκοπό την μείωση του αριθμού των παρατηρήσιμων μεγεθών, μέσω μιας διαδικασίας βελτιστοποίησης η οποία οδηγεί στη μείωση του κόστους ελέγχου ορθής λειτουργίας με τον περιορισμό της πολυπλοκότητας και της χρονικής διάρκειας διεξαγωγής του. Η αποδοτικότητα των προτεινόμενων τεχνικών επιβεβαιώνεται με την εφαρμογή τους σε τυπικό μίκτη RF τεχνολογίας 0.18μm CMOS, από τον οποίο λαμβάνονται αποτελέσματα προσομοιώσεων που αξιολογούνται και συγκρίνονται με αντίστοιχες συμβατικές τεχνικές.Testing and performance calibration techniques suitable for integrated RF circuits are presented in this dissertation. Specifically, a common approach is proposed for the testing and calibration procedures, that exploits a set of optimally selected observables. The processing of these observables enables defect detection, and also the prediction of the circuit’s performance which allows the examination of compliance with the specifications and performance calibration, as well. In order to address the problem of accessibility to test observables, a built-in technique is proposed, while a method to minimize the uncertainty introduced in the measurement system itself is also described. The application of selection algorithms is explored, aiming to reduce the number of test observables through an optimization procedure that leads to test cost savings due to the reduction of the test conduction complexity and time. The efficiency of the proposed techniques is validated by their application to a typical RF mixer designed in a 0.18um CMOS technology. Simulation results are obtained and assessed, while comparison with similar conventional techniques is also provided

Space programs summary no. 37-60, volume 2, for the period 1 September to 31 October 1969. The deep space network

Telemetry and ground support equipment design and developments for Deep Space Networ

Aeronautical Engineering: A continuing bibliography with indexes, supplement 153, October 1982

This bibliography lists 535 reports, articles and other documents introduced into the NASA Scientific and Technical Information System in September 1982

Sensors Workshop summary report

A review of the efforts of three workshops is presented. The presentation describes those technological developments that would contribute most to sensor subsystem optimization and improvement of NASA's data acquisition capabilities, and summarizes the recommendations of the sensor technology panels from the most recent workshops

Application of advanced technology to space automation

Automated operations in space provide the key to optimized mission design and data acquisition at minimum cost for the future. The results of this study strongly accentuate this statement and should provide further incentive for immediate development of specific automtion technology as defined herein. Essential automation technology requirements were identified for future programs. The study was undertaken to address the future role of automation in the space program, the potential benefits to be derived, and the technology efforts that should be directed toward obtaining these benefits

Precision geodesy and astrometry via very-long-baseline interferometry.

Massachusetts Institute of Technology. Dept. of Electrical Engineering. Thesis. 1974. Ph.D.MICROFICHE COPY ALSO AVAILABLE IN BARKER ENGINEERING LIBRARY.Vita.Includes bibliographical references.Ph.D

Adjustable RF mixers alternate test efficiency optimization by the reduction of test observables

A method for the optimization of the efficiency of alternate tests for adjustable RF mixers is presented in this paper. Alternate tests provide a cost- and time-effective substitute for their conventional specification-based counterparts by attempting to predict rather than directly measuring a circuit's performance from its response to suitable test stimuli. In order to provide post-manufacture yield recovery through calibration, integrated RF circuits - especially nanometric circuits - are often designed to present some form of adjustability. Such a property offers a set of discrete states of operation, from which a performance-compliant state is selected by calibration. In general, an alternate test can be conducted for each discrete state of operation, thus providing a large set of test observables from which regression models can be constructed to predict performance in all available states. However, test time and cost concerns impose that the derivation of the predictive models should be performed through an optimization procedure that aims to select a subset of the test observables that minimizes a certain cost criterion. In this paper, alternate tests for adjustable RF mixers are considered where the test response consists of dc voltage levels that appear at certain circuit nodes while the mixer operates in homodyne mode. Selection algorithms are applied to determine the optimum observables from the test response. Simulations on a typical RF mixer, designed in an 0.18μ CMOS technology, have shown significant improvement in the corresponding alternate test efficiency. © 1982-2012 IEEE

Photodetectors

In this book some recent advances in development of photodetectors and photodetection systems for specific applications are included. In the first section of the book nine different types of photodetectors and their characteristics are presented. Next, some theoretical aspects and simulations are discussed. The last eight chapters are devoted to the development of photodetection systems for imaging, particle size analysis, transfers of time, measurement of vibrations, magnetic field, polarization of light, and particle energy. The book is addressed to students, engineers, and researchers working in the field of photonics and advanced technologies