34 research outputs found
Dirty RF Signal Processing for Mitigation of Receiver Front-end Non-linearity
ï»żModerne drahtlose Kommunikationssysteme stellen hohe und teilweise
gegensÀtzliche Anforderungen an die Hardware der Funkmodule, wie z.B.
niedriger Energieverbrauch, groĂe Bandbreite und hohe LinearitĂ€t. Die
GewÀhrleistung einer ausreichenden LinearitÀt ist, neben anderen analogen
Parametern, eine Herausforderung im praktischen Design der Funkmodule. Der
Fokus der Dissertation liegt auf breitbandigen HF-Frontends fĂŒr
Software-konfigurierbare Funkmodule, die seit einigen Jahren kommerziell
verfĂŒgbar sind. Die praktischen Herausforderungen und Grenzen solcher
flexiblen Funkmodule offenbaren sich vor allem im realen Experiment. Eines
der Hauptprobleme ist die Sicherstellung einer ausreichenden analogen
Performanz ĂŒber einen weiten Frequenzbereich. Aus einer Vielzahl an
analogen Störeffekten behandelt die Arbeit die Analyse und Minderung von
NichtlinearitÀten in EmpfÀngern mit direkt-umsetzender Architektur. Im
Vordergrund stehen dabei Signalverarbeitungsstrategien zur Minderung
nichtlinear verursachter Interferenz - ein Algorithmus, der besser unter
"Dirty RF"-Techniken bekannt ist. Ein digitales Verfahren nach der
VorwÀrtskopplung wird durch intensive Simulationen, Messungen und
Implementierung in realer Hardware verifiziert. Um die LĂŒcken zwischen
Theorie und praktischer Anwendbarkeit zu schlieĂen und das Verfahren in
reale Funkmodule zu integrieren, werden verschiedene Untersuchungen
durchgefĂŒhrt. Hierzu wird ein erweitertes Verhaltensmodell entwickelt, das
die Struktur direkt-umsetzender EmpfÀnger am besten nachbildet und damit
alle Verzerrungen im HF- und Basisband erfasst. DarĂŒber hinaus wird die
LeistungsfÀhigkeit des Algorithmus unter realen Funkkanal-Bedingungen
untersucht. ZusÀtzlich folgt die Vorstellung einer ressourceneffizienten
Echtzeit-Implementierung des Verfahrens auf einem FPGA. AbschlieĂend
diskutiert die Arbeit verschiedene Anwendungsfelder, darunter spektrales
Sensing, robuster GSM-Empfang und GSM-basiertes Passivradar. Es wird
gezeigt, dass nichtlineare Verzerrungen erfolgreich in der digitalen
DomÀne gemindert werden können, wodurch die Bitfehlerrate gestörter
modulierter Signale sinkt und der Anteil nichtlinear verursachter
Interferenz minimiert wird. SchlieĂlich kann durch das Verfahren die
effektive LinearitÀt des HF-Frontends stark erhöht werden. Damit wird der
zuverlÀssige Betrieb eines einfachen Funkmoduls unter dem Einfluss der
EmpfÀngernichtlinearitÀt möglich. Aufgrund des flexiblen Designs ist der
Algorithmus fĂŒr breitbandige EmpfĂ€nger universal einsetzbar und ist nicht
auf Software-konfigurierbare Funkmodule beschrÀnkt.Today's wireless communication systems place high requirements on the
radio's hardware that are largely mutually exclusive, such as low power
consumption, wide bandwidth, and high linearity. Achieving a sufficient
linearity, among other analogue characteristics, is a challenging issue in
practical transceiver design. The focus of this thesis is on wideband
receiver RF front-ends for software defined radio technology, which became
commercially available in the recent years. Practical challenges and
limitations are being revealed in real-world experiments with these radios.
One of the main problems is to ensure a sufficient RF performance of the
front-end over a wide bandwidth. The thesis covers the analysis and
mitigation of receiver non-linearity of typical direct-conversion receiver
architectures, among other RF impairments. The main focus is on DSP-based
algorithms for mitigating non-linearly induced interference, an approach
also known as "Dirty RF" signal processing techniques. The conceived
digital feedforward mitigation algorithm is verified through extensive
simulations, RF measurements, and implementation in real hardware. Various
studies are carried out that bridge the gap between theory and practical
applicability of this approach, especially with the aim of integrating that
technique into real devices. To this end, an advanced baseband behavioural
model is developed that matches to direct-conversion receiver architectures
as close as possible, and thus considers all generated distortions at RF
and baseband. In addition, the algorithm's performance is verified under
challenging fading conditions. Moreover, the thesis presents a
resource-efficient real-time implementation of the proposed solution on an
FPGA. Finally, different use cases are covered in the thesis that includes
spectrum monitoring or sensing, GSM downlink reception, and GSM-based
passive radar. It is shown that non-linear distortions can be successfully
mitigated at system level in the digital domain, thereby decreasing the bit
error rate of distorted modulated signals and reducing the amount of
non-linearly induced interference. Finally, the effective linearity of the
front-end is increased substantially. Thus, the proper operation of a
low-cost radio under presence of receiver non-linearity is possible. Due to
the flexible design, the algorithm is generally applicable for wideband
receivers and is not restricted to software defined radios
Linear Operation of Switch-Mode Outphasing Power Amplifiers
Radio transceivers are playing an increasingly important role in modern society. The
âconnectedâ lifestyle has been enabled by modern wireless communications. The demand
that has been placed on current wireless and cellular infrastructure requires increased spectral
efficiency however this has come at the cost of power efficiency. This work investigates
methods of improving wireless transceiver efficiency by enabling more efficient power
amplifier architectures, specifically examining the role of switch-mode power amplifiers in
macro cell scenarios. Our research focuses on the mechanisms within outphasing power
amplifiers which prevent linear amplification. From the analysis it was clear that high power
non-linear effects are correctable with currently available techniques however non-linear effects
around the zero crossing point are not. As a result signal processing techniques for suppressing
and avoiding non-linear operation in low power regions are explored. A novel method of digital
pre-distortion is presented, and conventional techniques for linearisation are adapted for the
particular needs of the outphasing power amplifier. More unconventional signal processing
techniques are presented to aid linearisation of the outphasing power amplifier, both zero
crossing and bandwidth expansion reduction methods are designed to avoid operation in nonlinear
regions of the amplifiers. In combination with digital pre-distortion the techniques
will improve linearisation efforts on outphasing systems with dynamic range and bandwidth
constraints respectively.
Our collaboration with NXP provided access to a digital outphasing power amplifier,
enabling empirical analysis of non-linear behaviour and comparative analysis of behavioural
modelling and linearisation efforts. The collaboration resulted in a bench mark for linear
wideband operation of a digital outphasing power amplifier. The complimentary linearisation
techniques, bandwidth expansion reduction and zero crossing reduction have been evaluated in
both simulated and practical outphasing test benches. Initial results are promising and indicate
that the benefits they provide are not limited to the outphasing amplifier architecture alone.
Overall this thesis presents innovative analysis of the distortion mechanisms of the
outphasing power amplifier, highlighting the sensitivity of the system to environmental effects.
Practical and novel linearisation techniques are presented, with a focus on enabling wide band
operation for modern communications standards
An Optoelectronic Stimulator for Retinal Prosthesis
Retinal prostheses require the presence of viable population of cells in the inner retina. Evaluations
of retina with Age-Related Macular Degeneration (AMD) and Retinitis Pigmentosa (RP)
have shown a large number of cells remain in the inner retina compared with the outer retina.
Therefore, vision loss caused by AMD and RP is potentially treatable with retinal prostheses.
Photostimulation based retinal prostheses have shown many advantages compared with retinal
implants. In contrary to electrode based stimulation, light does not require mechanical contact.
Therefore, the system can be completely external and not does have the power and degradation
problems of implanted devices. In addition, the stimulating point is
flexible and does not require
a prior decision on the stimulation location. Furthermore, a beam of light can be projected on
tissue with both temporal and spatial precision. This thesis aims at fi nding a feasible solution
to such a system.
Firstly, a prototype of an optoelectronic stimulator was proposed and implemented by using the
Xilinx Virtex-4 FPGA evaluation board. The platform was used to demonstrate the possibility
of photostimulation of the photosensitized neurons. Meanwhile, with the aim of developing
a portable retinal prosthesis, a system on chip (SoC) architecture was proposed and a wide
tuning range sinusoidal voltage-controlled oscillator (VCO) which is the pivotal component of
the system was designed. The VCO is based on a new designed Complementary Metal Oxide
Semiconductor (CMOS) Operational Transconductance Ampli er (OTA) which achieves a good
linearity over a wide tuning range. Both the OTA and the VCO were fabricated in the AMS
0.35 ”m CMOS process. Finally a 9X9 CMOS image sensor with spiking pixels was designed.
Each pixel acts as an independent oscillator whose frequency is controlled by the incident light
intensity. The sensor was fabricated in the AMS 0.35 ”m CMOS Opto Process. Experimental
validation and measured results are provided
Feedback methods for inductorless bandwidth extension and linearisation of post-amplifiers in optical receiver frontends
Optical communication is increasingly important in today's telecommunications. It is not only a key component in long-haul infrastructure, but is also being brought into new applications within the datacentre, at the circuit board and integrated circuit level, and in next generation mobile networks. This thesis proposes feedback tuning approaches in order to address two challenges within optical receiver analog frontend circuits: a) the dynamic response of a prior bandwidth extension technique; and b) linearity optimisation.
To address dynamic response, we begin with an inductorless method of bandwidth extension using positive feedback loops. In a multi-stage post-amplifier with local positive feedback loops, we propose an approach which tunes each positive feedback gain separately, and demonstrate that this achieves better dynamic response and eye opening than the prior equal-feedback-gain approach. We additionally propose root-locus analysis as a means of characterising dynamic response, and suggest some design guidelines based on this analysis.
To address linearity optimisation, we propose the use of an interleaving negative-feedback post-amplifier topology, previously proposed only for bandwidth extension. We investigate the relationship between the feedback gains and linearity and develop a design approach for linearity optimisation. We then designed and fabricated two 70 dB 6 GHz optical receiver circuits, making use of two different post-amplifiers, in order to compare different design approaches. We achieved a linearity of 0.08 dBVrms OIP3 (quasi-static) and a THD of 0.195\% at 1 GHz
Biomimetic cochlea filters : from modelling, design to analogue VLSI implementation
This thesis presents a novel biomimetic cochlea filter which closely resembles the biological
cochlea behaviour. The filter is highly feasible for analogue very-large-scale integration
(VLSI) circuits, which leads to a micro-watt-power and millimetre-sized hardware implementation.
By virtue of such features, the presented filter contributes to a solid foundation for future
biologically-inspired audio signal processors.
Unlike existing works, the presented filter is developed by taking direct inspirations from the
physiologically measured results of the biological cochlea. Since the biological cochlea has
prominently different characteristics of frequency response from low to high frequencies, the
biomimetic cochlea filter is built by cascading three sub-filters accordingly: a 2nd-order bandpass
filter for the constant gentle low-frequency response, a 2nd-order tunable low-pass filter
for the variable and selective centre frequency response and a 5th-order elliptic filter for the
ultra-steep roll-off at stop-band. As a proof of concept, a biomimetic cochlea filter bank is built
to process audio signals, which demonstrates the highly discriminative spectral decomposition
and high-resolution time-frequency analysis capabilities similar to the biological cochlea.
The filter has simple representation in the Laplace domain which leads to a convenient analogue
circuit realisation. A floating-active-inductor circuit cell is developed to build the corresponding
RLC ladder for each of the three sub-filters. The circuits are designed based on complementary
metal-oxide-semiconductor (CMOS) transistors for VLSI implementation. Non-ideal factors
of CMOS transistors including parasitics, noise and mismatches are extensively analysed and
consciously considered in the circuit design. An analogue VLSI chip is successfully fabricated
using 0.35Ό m CMOS process. The chip measurements demonstrate that the centre frequency
response of the filter has about 20 dB wide gain tuning range and a high quality factor reaching
maximally over 19. The filter has a 20 dB/decade constant gentle low-frequency tail and an
over 300 dB/decade sharp stop-band roll-off slope. The measured results agree with the filter
model expectations and are comparable with the biological cochlea characteristics. Each filter
channel consumes as low as 59.5 ~90Ό Wpower and occupies only 0.9 mm2 area. Besides, the
biomimetic cochlea filter chip is characterised from a wide range of angles and the experimental
results cover not only the auditory filter specifications but also the integrated circuit design
considerations.
Furthermore, following the progressive development of the acoustic resonator based on microelectro-
mechanical systems (MEMS) technology, a MEMS-CMOS implementation of the proposed
filter becomes possible in the future. A key challenge for such implementation is the
low sensing capacitance of the MEMS resonator which suffers significantly from sensitivity
degradation due to the parasitic capacitance. A novel MEMS capacitive interface circuit chip
is additionally developed to solve this issue. As shown in the chip results, the interface circuit
is able to cancel the parasitic capacitance and increase the sensitivity of capacitive sensors by
35 dB without consuming any extra power. Besides, the chopper-stabilisation technique is employed
which effectively reduces the circuit flicker noise and offsets. Due to these features, the
interface circuit chip is capable of converting a 7.5 fF capacitance change of a 1-Volt-biased
0.5 pF capacitive sensor pair into a 0.745 V signal-conditioned output while consuming only
165.2Ό W power
DESIGN OF A GAAS DISTRIBUTED AMPLIFIER WITH LC TRAPS BASED BROADBAND LINEARIZATION
Increasing the linearity of power amplifiers has been an important area of research because its signal integrity influences the performance of the entire transreceiver system and there are strict regulatory requirements on them. Due to the nonlinear behaviour of power amplifiers, third order intermodulation products are generated close to the desired signals and cannot be removed by filters. Increasing linearity will help bring these distortion products closer to the noise floor. However, it is not an easy task to increase linearity without trading off output power. To maintain the same level of output power generated but with higher linearity, many techniques, each with its own pros and cons, have been implemented to linearize an amplifier. Techniques involving feedback are seriously limited in terms of modulation bandwidth whereas methods such as predistortion and feedforward are very difficult to implement. This project seeks to use a simple method of placing terminations directly to the distributed amplifier (DA), making it a device level linearization technique and can be used in addition to the other system level techniques mentioned earlier. To increase linearity over a broad bandwidth of 0.5 to 3.0 GHz, this work proposes using low impedance terminations (LC traps) at the envelope frequency to the input and output of several distributed amplifiers. This research is novel since this is the first time broadband improvement in linearity has been demonstrated using the LC trap method. Two design iterations were completed (first design iteration has four variants to test the output trap while the second design iteration has three variants to test the input trap). The low impedance terminations are implemented using inductor-capacitor networks that are external to the monolithic microwave integrated circuit (MMIC). Design and layout of the DAs were carried out using Agilentâs Advanced Design System (ADS). Results show that placing the traps at the output of the DA does not truly affect the linearity of the device at lower frequencies but provide an improvement of 1.6 dB and 3.4 dB to the third-order output intercept point (OIP3) at 2.5 GHz and 3.0 GHz, respectively. With traps at the input, measurement results at -5 dBm input power,
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1.375 V base bias (61 mA total collector current) and 10 MHz two tone spacing show a broadband improvement throughout the band (0.5 GHz to 3.0 GHz) of 3.3 dB to 7.4 dB in OIP3. Furthermore, the OIP3 is increased to 19.2 dB above P1dB. Results show that the improvement in OIP3 comes without lowering gain, return loss or P1dB and without causing any stability problems
CMOS Hyperbolic Sine ELIN filters for low/audio frequency biomedical applications
Hyperbolic-Sine (Sinh) filters form a subclass of Externally-Linear-Internally-Non-
Linear (ELIN) systems. They can handle large-signals in a low power environment under half
the capacitor area required by the more popular ELIN Log-domain filters. Their inherent
class-AB nature stems from the odd property of the sinh function at the heart of their
companding operation. Despite this early realisation, the Sinh filtering paradigm has not
attracted the interest it deserves to date probably due to its mathematical and circuit-level
complexity.
This Thesis presents an overview of the CMOS weak inversion Sinh filtering
paradigm and explains how biomedical systems of low- to audio-frequency range could
benefit from it. Its dual scope is to: consolidate the theory behind the synthesis and design of
high order Sinh continuousâtime filters and more importantly to confirm their micro-power
consumption and 100+ dB of DR through measured results presented for the first time.
Novel high order Sinh topologies are designed by means of a systematic
mathematical framework introduced. They employ a recently proposed CMOS Sinh
integrator comprising only p-type devices in its translinear loops. The performance of the
high order topologies is evaluated both solely and in comparison with their Log domain
counterparts. A 5th order Sinh Chebyshev low pass filter is compared head-to-head with a
corresponding and also novel Log domain class-AB topology, confirming that Sinh filters
constitute a solution of equally high DR (100+ dB) with half the capacitor area at the expense
of higher complexity and power consumption. The theoretical findings are validated by
means of measured results from an 8th order notch filter for 50/60Hz noise fabricated in a
0.35ÎŒm CMOS technology. Measured results confirm a DR of 102dB, a moderate SNR of
~60dB and 74ÎŒW power consumption from 2V power supply