Operand Value Based Modeling and Estimation of Dynamic Energy Consumption of Soft Processors in FPGA

This thesis presents a novel method for estimating the dynamic energy consumption of soft processors in FPGA, using an operand-value-based model. The processor energy model is created at the instruction-level, which enables fast, early and accurate energy estimation. The modeling heuristic is based on the observation that the energy required to execute instructions on an FPGA implementation of a soft processor has a strong dependence on the operand values. Our energy model contains three components: the instruction base energy, the maximum variation in the instruction energy due to input data, and the impact of one’s density of the operand values during software execution. The one’s density refers to the number of operand bits that are set to one. We use post-place and route processor simulations as a reference to evaluate the accuracy of our model, and that of other existing instruction-level energy models, for several benchmarks. We demonstrate that our model has only 4.7% average error and 12% worst case error compared to the reference, and is more than twice as accurate as existing instruction-level models. Key Words: Energy modeling, Soft processors, system-level design, Power estimation