1,404 research outputs found

    Study of spacecraft transponder power amplifier Final report

    Get PDF
    Communications satellite wideband transponder feasibility study with direct RF to RF CONVERSION and TWT in re-entrant mod

    Microwave vs optical crosslink study

    Get PDF
    The intersatellite links (ISL's) at geostationary orbit is currently a missing link in commercial satellite services. Prior studies have found that potential application of ISL's to domestic, regional, and global satellites will provide more cost-effective services than the non-ISL's systems (i.e., multiple-hop systems). In addition, ISL's can improve and expand the existing satellite services in several aspects. For example, ISL's can conserve the scarce spectrum allocated for fixed satellite services (FSS) by avoiding multiple hopping of the relay stations. ISL's can also conserve prime orbit slot by effectively expanding the geostationary arc. As a result of the coverage extension by using ISL's more users will have direct access to the satellite network, thus providing reduced signal propagation delay and improved signal quality. Given the potential benefits of ISL's system, it is of interest to determine the appropriate implementations for some potential ISL architectures. Summary of the selected ISL network architecture as supplied by NASA are listed. The projected high data rate requirements (greater than 400 Mbps) suggest that high frequency RF or optical implementations are natural approaches. Both RF and optical systems have their own merits and weaknesses which make the choice between them dependent on the specific application. Due to its relatively mature technology base, the implementation risk associated with RF (at least 32 GHz) is lower than that of the optical ISL's. However, the relatively large antenna size required by RF ISL's payload may cause real-estate problems on the host spacecraft. In addition, because of the frequency sharing (for duplex multiple channels communications) within the limited bandwidth allocated, RF ISL's are more susceptible to inter-system and inter-channel interferences. On the other hand, optical ISL's can offer interference-free transmission and compact sized payload. However, the extremely narrow beam widths (on the order of 10 micro-rad) associated with optical ISL's impose very stringent pointing, acquisition, and tracking requirements on the system. Even if the RF and optical systems are considered separately, questions still remain as to selection of RF frequency, direct versus coherent optical detection, etc. in implementing an ISL for a particular network architecture. These and other issues are studied

    Adaptive multibeam phased array design for a Spacelab experiment

    Get PDF
    The parametric tradeoff analyses and design for an Adaptive Multibeam Phased Array (AMPA) for a Spacelab experiment are described. This AMPA Experiment System was designed with particular emphasis to maximize channel capacity and minimize implementation and cost impacts for future austere maritime and aeronautical users, operating with a low gain hemispherical coverage antenna element, low effective radiated power, and low antenna gain-to-system noise temperature ratio

    Project apollo. ship-shore communications using radio satellite relay

    Get PDF
    Requirements for antennas, radio and terminal equipment aboard Apollo communication and tracking ships to communicate with land stations by satellite rela

    High-performance long NoC link using delay-insensitive current-mode signaling

    Get PDF
    High-performance long-range NoC link enables efficient implementation of network-on-chip topologies which inherently require high-performance long-distance point-to-point communication such as torus and fat-tree structures. In addition, the performance of other topologies, such as mesh, can be improved by using high-performance link between few selected remote nodes.We presented novel implementation of high-performance long-range NoC link based onmultilevel current-mode signaling and delayinsensitive two-phase 1-of-4 encoding. Current-mode signaling reduces the communication latency of long wires significantlycompared to voltage-mode signaling, making it possible to achieve high throughput without pipelining and/or using repeaters. The performance of the proposed multilevel current-mode interconnect is analyzed and compared with two reference voltage mode interconnects. These two reference interconnects are designed using two-phase 1-of-4 encoded voltage-mode signaling, one with pipeline stages and the other using optimal repeater insertion. The proposed multilevel current-mode interconnect achieves higher throughput and lower latency than the two reference interconnects. Its throughput at 8mm wire length is 1.222GWord/swhich is 1.58 and 1.89 times higher than the pipelined and optimal repeater insertion interconnects, respectively. Furthermore, its power consumption is less than the optimal repeater insertion voltage-mode interconnect, at 10mm wire length its power consumption is 0.75mW while the reference repeater insertion interconnect is 1.066 mW. The effect of crosstalk is analyzed using four-bit parallel data transfer with the best-case and worst-case switching patterns and a transmission line model which has both capacitive coupling and inductive coupling.</p

    Application of advanced on-board processing concepts to future satellite communications systems

    Get PDF
    An initial definition of on-board processing requirements for an advanced satellite communications system to service domestic markets in the 1990's is presented. An exemplar system architecture with both RF on-board switching and demodulation/remodulation baseband processing was used to identify important issues related to system implementation, cost, and technology development

    Design and modelling of variability tolerant on-chip communication structures for future high performance system on chip designs

    Get PDF
    The incessant technology scaling has enabled the integration of functionally complex System-on-Chip (SoC) designs with a large number of heterogeneous systems on a single chip. The processing elements on these chips are integrated through on-chip communication structures which provide the infrastructure necessary for the exchange of data and control signals, while meeting the strenuous physical and design constraints. The use of vast amounts of on chip communications will be central to future designs where variability is an inherent characteristic. For this reason, in this thesis we investigate the performance and variability tolerance of typical on-chip communication structures. Understanding of the relationship between variability and communication is paramount for the designers; i.e. to devise new methods and techniques for designing performance and power efficient communication circuits in the forefront of challenges presented by deep sub-micron (DSM) technologies. The initial part of this work investigates the impact of device variability due to Random Dopant Fluctuations (RDF) on the timing characteristics of basic communication elements. The characterization data so obtained can be used to estimate the performance and failure probability of simple links through the methodology proposed in this work. For the Statistical Static Timing Analysis (SSTA) of larger circuits, a method for accurate estimation of the probability density functions of different circuit parameters is proposed. Moreover, its significance on pipelined circuits is highlighted. Power and area are one of the most important design metrics for any integrated circuit (IC) design. This thesis emphasises the consideration of communication reliability while optimizing for power and area. A methodology has been proposed for the simultaneous optimization of performance, area, power and delay variability for a repeater inserted interconnect. Similarly for multi-bit parallel links, bandwidth driven optimizations have also been performed. Power and area efficient semi-serial links, less vulnerable to delay variations than the corresponding fully parallel links are introduced. Furthermore, due to technology scaling, the coupling noise between the link lines has become an important issue. With ever decreasing supply voltages, and the corresponding reduction in noise margins, severe challenges are introduced for performing timing verification in the presence of variability. For this reason an accurate model for crosstalk noise in an interconnection as a function of time and skew is introduced in this work. This model can be used for the identification of skew condition that gives maximum delay noise, and also for efficient design verification

    Deliverable D4.1: VLC modulation schemes

    Get PDF
    This report presents the analysis of different modulation schemes D4.1 for VLC systems of the VIDAS project. Considering the final prototype design and application, the deliverable D4.1 was projected. The detail analysis of various modulation schemes are carried out and a robust technique based on direct sequence spread spectrum (DSSS) is followed. DSSS technique though necessitates use of high bandwidth while minimizing the effect of noise. Since the final application does not require very high dat a rate of transmission but robustness against the noise (external lights) becomes necessary. The analysis is followed by model development using Matlab/Simulink. The performance of both of these systems are compared and evaluated. Some of the simulation results are presented
    • …
    corecore