Low Complexity Decoding for Higher Order Punctured Trellis-Coded Modulation Over Intersymbol Interference Channels

Trellis-coded modulation (TCM) is a power and bandwidth efficient digital transmission scheme which offers very low structural delay of the data stream. Classical TCM uses a signal constellation of twice the cardinality compared to an uncoded transmission with one bit of redundancy per PAM symbol, i.e., application of codes with rates $\frac{n-1}{n}$ when $2^{n}$ denotes the cardinality of the signal constellation. Recently published work allows rate adjustment for TCM by means of puncturing the convolutional code (CC) on which a TCM scheme is based on. In this paper it is shown how punctured TCM-signals transmitted over intersymbol interference (ISI) channels can favorably be decoded. Significant complexity reductions at only minor performance loss can be achieved by means of reduced state sequence estimation.Comment: 4 pages, 5 figures, 3 algorithms, accepted and published at 6th International Symposium on Communications, Control, and Signal Processing (ISCCSP 2014

On decoding of multi-level MPSK modulation codes

The decoding problem of multi-level block modulation codes is investigated. The hardware design of soft-decision Viterbi decoder for some short length 8-PSK block modulation codes is presented. An effective way to reduce the hardware complexity of the decoder by reducing the branch metric and path metric, using a non-uniform floating-point to integer mapping scheme, is proposed and discussed. The simulation results of the design are presented. The multi-stage decoding (MSD) of multi-level modulation codes is also investigated. The cases of soft-decision and hard-decision MSD are considered and their performance are evaluated for several codes of different lengths and different minimum squared Euclidean distances. It is shown that the soft-decision MSD reduces the decoding complexity drastically and it is suboptimum. The hard-decision MSD further simplifies the decoding while still maintaining a reasonable coding gain over the uncoded system, if the component codes are chosen properly. Finally, some basic 3-level 8-PSK modulation codes using BCH codes as component codes are constructed and their coding gains are found for hard decision multistage decoding

The application of ANFIS prediction models for thermal error compensation on CNC machine tools

Thermal errors can have significant effects on CNC machine tool accuracy. The errors come from thermal deformations of the machine elements caused by heat sources within the machine structure or from ambient temperature change. The effect of temperature can be reduced by error avoidance or numerical compensation. The performance of a thermal error compensation system essentially depends upon the accuracy and robustness of the thermal error model and its input measurements. This paper first reviews different methods of designing thermal error models, before concentrating on employing an adaptive neuro fuzzy inference system (ANFIS) to design two thermal prediction models: ANFIS by dividing the data space into rectangular sub-spaces (ANFIS-Grid model) and ANFIS by using the fuzzy c-means clustering method (ANFIS-FCM model). Grey system theory is used to obtain the influence ranking of all possible temperature sensors on the thermal response of the machine structure. All the influence weightings of the thermal sensors are clustered into groups using the fuzzy c-means (FCM) clustering method, the groups then being further reduced by correlation analysis. A study of a small CNC milling machine is used to provide training data for the proposed models and then to provide independent testing data sets. The results of the study show that the ANFIS-FCM model is superior in terms of the accuracy of its predictive ability with the benefit of fewer rules. The residual value of the proposed model is smaller than ±4 μm. This combined methodology can provide improved accuracy and robustness of a thermal error compensation system

Self-concatenated code design and its application in power-efficient cooperative communications

In this tutorial, we have focused on the design of binary self-concatenated coding schemes with the help of EXtrinsic Information Transfer (EXIT) charts and Union bound analysis. The design methodology of future iteratively decoded self-concatenated aided cooperative communication schemes is presented. In doing so, we will identify the most important milestones in the area of channel coding, concatenated coding schemes and cooperative communication systems till date and suggest future research directions

Adaptive inferential sensors based on evolving fuzzy models

A new technique to the design and use of inferential sensors in the process industry is proposed in this paper, which is based on the recently introduced concept of evolving fuzzy models (EFMs). They address the challenge that the modern process industry faces today, namely, to develop such adaptive and self-calibrating online inferential sensors that reduce the maintenance costs while keeping the high precision and interpretability/transparency. The proposed new methodology makes possible inferential sensors to recalibrate automatically, which reduces significantly the life-cycle efforts for their maintenance. This is achieved by the adaptive and flexible open-structure EFM used. The novelty of this paper lies in the following: (1) the overall concept of inferential sensors with evolving and self-developing structure from the data streams; (2) the new methodology for online automatic selection of input variables that are most relevant for the prediction; (3) the technique to detect automatically a shift in the data pattern using the age of the clusters (and fuzzy rules); (4) the online standardization technique used by the learning procedure of the evolving model; and (5) the application of this innovative approach to several real-life industrial processes from the chemical industry (evolving inferential sensors, namely, eSensors, were used for predicting the chemical properties of different products in The Dow Chemical Company, Freeport, TX). It should be noted, however, that the methodology and conclusions of this paper are valid for the broader area of chemical and process industries in general. The results demonstrate that well-interpretable and with-simple-structure inferential sensors can automatically be designed from the data stream in real time, which predict various process variables of interest. The proposed approach can be used as a basis for the development of a new generation of adaptive and evolving inferential sensors that can a- ddress the challenges of the modern advanced process industry

Low Complexity Decoding for Punctured Trellis-Coded Modulation Over Intersymbol Interference Channels

Classical trellis-coded modulation (TCM) as introduced by Ungerboeck in 1976/1983 uses a signal constellation of twice the cardinality compared to an uncoded transmission with one bit of redundancy per PAM symbol, i.e., application of codes with rates $\frac{n-1}{n}$ when $2^{n}$ denotes the cardinality of the signal constellation. The original approach therefore only comprises integer transmission rates, i.e., $R=\left\{ 2,\,3,\,4\,\ldots \right\}$, additionally, when transmitting over an intersymbol interference (ISI) channel an optimum decoding scheme would perform equalization and decoding of the channel code jointly. In this paper, we allow rate adjustment for TCM by means of puncturing the convolutional code (CC) on which a TCM scheme is based on. In this case a nontrivial mapping of the output symbols of the CC to signal points results in a time-variant trellis. We propose an efficient technique to integrate an ISI-channel into this trellis and show that the computational complexity can be significantly reduced by means of a reduced state sequence estimation (RSSE) algorithm for time-variant trellises.Comment: 4 pages, 7 pictured, accepted for 2014 International Zurich Seminar on Communication

Low Power Processor Architectures and Contemporary Techniques for Power Optimization – A Review

The technological evolution has increased the number of transistors for a given die area significantly and increased the switching speed from few MHz to GHz range. Such inversely proportional decline in size and boost in performance consequently demands shrinking of supply voltage and effective power dissipation in chips with millions of transistors. This has triggered substantial amount of research in power reduction techniques into almost every aspect of the chip and particularly the processor cores contained in the chip. This paper presents an overview of techniques for achieving the power efficiency mainly at the processor core level but also visits related domains such as buses and memories. There are various processor parameters and features such as supply voltage, clock frequency, cache and pipelining which can be optimized to reduce the power consumption of the processor. This paper discusses various ways in which these parameters can be optimized. Also, emerging power efficient processor architectures are overviewed and research activities are discussed which should help reader identify how these factors in a processor contribute to power consumption. Some of these concepts have been already established whereas others are still active research areas. © 2009 ACADEMY PUBLISHER