State of the art in chip-to-chip interconnects

This thesis presents a study of short-range links for chips mounted in the same package, on printed circuit boards or interposers. Implemented in CMOS technology between 7 and 250 nm, with links that operate at a data rate between 0,4 and 112 Gb/s/pin and with energy efficiencies from 0,3 to 67,7 pJ/bit. The links operate on channels with an attenuation lower than 50 dB. A comparison is made with graphical representations between the different articles that shows the correlation between the different essential metrics of chip-to-chip interconnects, as well as its evolution over the last 20 years.Esta tesis presenta un estudio de enlaces de corto alcance para chips montados en un mismo paquete, en placas de circuito impreso o intercaladores. Implementado en tecnología CMOS entre 7 y 250 nm, con enlaces que operan a una velocidad de datos entre 0,4 y 112 Gb/s/pin y con eficiencias energéticas de 0,3 a 67,7 pJ/bit. Los enlaces operan en canales con una atenuación inferior a 50 dB. Se realiza una comparación con representaciones gráficas entre los diferentes artículos que muestra la correlación entre las distintas métricas esenciales de las interconexiones chip a chip, así como su evolución en los últimos 20 años.Aquesta tesi presenta un estudi d'enllaços de curt abast per a xips muntats en el mateix paquet, en plaques de circuits impresos o interposers. Implementat en tecnologia CMOS entre 7 i 250 nm, amb enllaços que funcionen a una velocitat de dades entre 0,4 i 112 Gb/s/pin i amb eficiències energètiques de 0,3 a 67,7 pJ/bit. Els enllaços funcionen en canals amb una atenuació inferior a 50 dB. Es fa una comparació amb representacions gràfiques entre els diferents articles que mostra la correlació entre les diferents mètriques essencials d'interconnexions xip a xip, així com la seva evolució en els darrers 20 anys

Roadmap of optical communications

© 2016 IOP Publishing Ltd. Lightwave communications is a necessity for the information age. Optical links provide enormous bandwidth, and the optical fiber is the only medium that can meet the modern society's needs for transporting massive amounts of data over long distances. Applications range from global high-capacity networks, which constitute the backbone of the internet, to the massively parallel interconnects that provide data connectivity inside datacenters and supercomputers. Optical communications is a diverse and rapidly changing field, where experts in photonics, communications, electronics, and signal processing work side by side to meet the ever-increasing demands for higher capacity, lower cost, and lower energy consumption, while adapting the system design to novel services and technologies. Due to the interdisciplinary nature of this rich research field, Journal of Optics has invited 16 researchers, each a world-leading expert in their respective subfields, to contribute a section to this invited review article, summarizing their views on state-of-the-art and future developments in optical communications

Low Power Analog Processing for Ultra-High-Speed Receivers with RF Correlation

Ultra-high-speed data communication receivers (Rxs) conventionally require analog digital converters (ADC)s with high sampling rates which have design challenges in terms of adequate resolution and power. This leads to ultra-high-speed Rxs utilising expensive and bulky high-speed oscilloscopes which are extremely inefficient for demodulation, in terms of power and size. Designing energy-efficient mixed-signal and baseband units for ultra-high-speed Rxs requires a paradigm approach detailed in this paper that circumvents the use of power-hungry ADCs by employing low-power analog processing. The low-power analog Rx employs direct-demodulation with RF correlation using low-power comparators. The Rx is able to support multiple modulations with highest modulation of 16-QAM reported so far for direct-demodulation with RF correlation. Simulations using Matlab, Simulink R2020a® indicate sufficient symbol-error rate (SER) performance at a symbol rate of 8 GS/s for the 71 GHz Urban Micro Cell and 140 GHz indoor channels. Power analysis undertaken with current analog, hybrid and digital beamforming approaches requiring ADCs indicates considerable power savings. This novel approach can be adopted for ultra-high-speed Rxs envisaged for beyond fifth generation (B5G)/sixth generation (6G)/ terahertz (THz) communication without the power-hungry ADCs, leading to low-power integrated design solutions

Multilevel Modulation and Transmission in VCSEL-based Short-range Fiber Optic Links

As the demand for ever higher throughput short-range optical links is growing, research and industry associations have shown increased interest in multilevel modulation formats, such as the four leveled pulse amplitude modulation, referred to as 4-PAM. As on-off keying (OOK) persists to be the choice for low latency applications, for example high performance computing, datacenter operators see 4-PAM as the next format to succeed current OOK-based optical interconnects. Throughput can be increased in many ways: parallel links can be deployed, multicore fibers can be used or more efficient modulation formats with digital signal processing is an alternative. Therefore, to improve link data rates, the introduction of new modulation formats and pre-emphasis are primarily considered in this thesis. In a bandwidth-limited link, turning towards spectrally efficient formats is one of the methods to\ua0 overcome the bandwidth requirements of OOK. Such are the considerations when opting for 3-PAM or 4-PAM schemes. Both require lower bandwidth than OOK and are potential candidates in such scenarios. 4-PAM provides double spectral efficiency and double data rate at the same symbol rate as on-off keying, but, as with any technology transition, new challenges emerge, such as a higher SNR requirement, a lower tolerance to VCSEL nonlinearities and skewing of the signal in the time domain. 3-PAM could potentially be an in-between solution, as it requires 33% less bandwidth than OOK and is less sensitive to VCSEL dynamics which could impair the transmission. A study is presented where 3-PAM has outperformed both OOK and 4-PAM in the same link. Detailed investigation of legacy 25G class VCSELs has shown that devices with moderate damping are suitable for the transition to 4-PAM. The pre-emphasis of signals is a powerful tool to increase link bandwidth at the cost of modulation amplitude. This has been investigated in this thesis for on-offkeying and has shown 9% and 27% increase in bit rate for error-free operation with two pre-emphasis approaches. Similarly, pre-emphasis of a 4-PAM electrical signals has enabled 71.8 Gbps transmission back-to-back with lightweight forward error correction and 94 Gbps net data rate was achieved with the same pre-emphasis and post-processing using an offline least-mean-square equalizer

200 Gbps/lane IM/DD Technologies for Short Reach Optical Interconnects

Client-side optics are facing an ever-increasing upgrading pace, driven by upcoming 5G related services and datacenter applications. The demand for a single lane data rate is soon approaching 200 Gbps. To meet such high-speed requirement, all segments of traditional intensity modulation direct detection (IM/DD) technologies are being challenged. The characteristics of electrical and optoelectronic components and the performance of modulation, coding, and digital signal processing (DSP) techniques are being stretched to their limits. In this context, we witnessed technological breakthroughs in several aspects, including development of broadband devices, novel modulation formats and coding, and high-performance DSP algorithms for the past few years. A great momentum has been accumulated to overcome the aforementioned challenges. In this article, we focus on IM/DD transmissions, and provide an overview of recent research and development efforts on key enabling technologies for 200 Gbps per lane and beyond. Our recent demonstrations of 200 Gbps short-reach transmissions with 4-level pulse amplitude modulation (PAM) and discrete multitone signals are also presented as examples to show the system requirements in terms of device characteristics and DSP performance. Apart from digital coherent technologies and advanced direct detection systems, such as Stokes–vector and Kramers–Kronig schemes, we expect high-speed IM/DD systems will remain advantageous in terms of system cost, power consumption, and footprint for short reach applications in the short- to mid- term perspective

Next Generation Silicon Photonic Transceiver: From Device Innovation to System Analysis

Silicon photonics is recognized as a disruptive technology that has the potential to reshape many application areas, for example, data center communication, telecommunications, high-performance computing, and sensing. The key capability that silicon photonics offers is to leverage CMOS-style design, fabrication, and test infrastructure to build compact, energy-efficient, and high-performance integrated photonic systems-on- chip at low cost. As the need to squeeze more data into a given bandwidth and a given footprint increases, silicon photonics becomes more and more promising. This work develops and demonstrates novel devices, methodologies, and architectures to resolve the challenges facing the next-generation silicon photonic transceivers. The first part of this thesis focuses on the topology optimization of passive silicon photonic devices. Specifically, a novel device optimization methodology - particle swarm optimization in conjunction with 3D finite-difference time-domain (FDTD), has been proposed and proven to be an effective way to design a wide range of passive silicon photonic devices. We demonstrate a polarization rotator and a 90◦ optical hybrid for polarization-diversity and phase-diversity communications - two important schemes to increase the communication capacity by increasing the spectral efficiency. The second part of this thesis focuses on the design and characterization of the next- generation silicon photonic transceivers. We demonstrate a polarization-insensitive WDM receiver with an aggregate data rate of 160 Gb/s. This receiver adopts a novel architecture which effectively reduces the polarization-dependent loss. In addition, we demonstrate a III-V/silicon hybrid external cavity laser with a tuning range larger than 60 nm in the C-band on a silicon-on-insulator platform. A III-V semiconductor gain chip is hybridized into the silicon chip by edge-coupling to the silicon chip. The demonstrated packaging method requires only passive alignment and is thus suitable for high-volume production. We also demonstrate all silicon-photonics-based transmission of 34 Gbaud (272 Gb/s) dual-polarization 16-QAM using our integrated laser and silicon photonic coherent transceiver. The results show no additional penalty compared to commercially available narrow linewidth tunable lasers. The last part of this thesis focuses on the chip-scale optical interconnect and presents two different types of reconfigurable memory interconnects for multi-core many-memory computing systems. These reconfigurable interconnects can effectively alleviate the memory access issues, such as non-uniform memory access, and Network-on-Chip (NoC) hot-spots that plague the many-memory computing systems by dynamically directing the available memory bandwidth to the required memory interface

Development of Silicon Photonic Multi Chip Module Transceivers

The exponential growth of data generation–driven in part by the proliferation of applications such as high definition streaming, artificial intelligence, and the internet of things–presents an impending bottleneck for electrical interconnects to fulfill data center bandwidth demands. Links now require bandwidths in excess of multiple Tbps while operating on the order of picojoules per bit, in addition to constraints on areal bandwidth densities and pin I/O bandwidth densities. Optical communications built on a silicon photonic platform offers a potential solution to develop power efficient, high bandwidth, low attenuation, small footprint links, all while building off the mature CMOS ecosystem. The development of silicon photonic foundries supporting multi project wafer runs with associated process design kit components supports a path towards widespread commercial production by increasing production volume while reducing fabrication and development costs. While silicon photonics can always be improved in terms of performance and yield, one of the central challenges is the integration of the silicon photonic integrated circuits with the driving electronic integrated circuits and data generating compute nodes such as CPUs, FPGAs, and ASICs. The co-packaging of the photonics with the electronics is crucial for adoption of silicon photonics in datacenters, as improper integration negates all the potential benefits of silicon photonics. The work in this dissertation is centered around the development of silicon photonic multi chip module transceivers to aid in the deployment of silicon photonics within data centers. Section one focuses on silicon photonic integration and highlights multiple integrated transceiver prototypes. The central prototype features a photonic integrated circuit with bus waveguides with WDM microdisk modulators for the transmitter and WDM demuxes with drop ports to photodiodes for the receiver. The 2.5D integrated prototype utilizes a thinned silicon interposer and TIA electronic integrated circuits. The architecture, integration, characterization, performance, and scalability of the prototype are discussed. The development of this first prototype identified key design considerations necessary for designing multi chip module silicon photonic prototypes, which will be addressed in this section. Finally, other multi chip module silicon photonic prototypes will be overviewed. These include a 2.5D integrated transceiver with a different electronic integrated circuit TIA, a 3D integrated receiver, an active interposer network on chip, and a 2.5D integrated transceiver with custom electronic integrated circuits. Section two focuses on research that supports the development of silicon photonic transceivers. The thermal crosstalk from neighboring microdisk modulators as a function of modulator pitch is investigated. As modulators are placed at denser pitches to accommodate areal bandwidth density requirements in transceivers, this thermal crosstalk will become significant. In this section, designs and results from several iterations of custom microring modulators are reported. Custom microring modulators allow for scaling up the number of channels in microring transceivers by offering the ability to fabricate variable resonances and provide a platform for further innovation in bandwidth, free spectral range, and energy efficiency. The designs and results of higher order modulation format modulators, both microring based and Mach Zehnder based, are discussed. High order modulators offer a path towards scaling transceiver total throughput without having to increase the channel counts or component bandwidth. Together, the work in these two sections supports the development of silicon photonic transceivers to aid in the adoption of silicon photonics into data generating systems