A parallel simulated annealing algorithm for standard cell placement on a hypercube computer

A parallel version of a simulated annealing algorithm is presented which is targeted to run on a hypercube computer. A strategy for mapping the cells in a two dimensional area of a chip onto processors in an n-dimensional hypercube is proposed such that both small and large distance moves can be applied. Two types of moves are allowed: cell exchanges and cell displacements. The computation of the cost function in parallel among all the processors in the hypercube is described along with a distributed data structure that needs to be stored in the hypercube to support parallel cost evaluation. A novel tree broadcasting strategy is used extensively in the algorithm for updating cell locations in the parallel environment. Studies on the performance of the algorithm on example industrial circuits show that it is faster and gives better final placement results than the uniprocessor simulated annealing algorithms. An improved uniprocessor algorithm is proposed which is based on the improved results obtained from parallelization of the simulated annealing algorithm

A Parallel Tabu Search Algorithm for VLSI Standard-Cell Placement

VLSI standard-cell placement is an NP-hard problem to which various heuristics have been applied. in this work, tabu search placement algorithm is parallelized on a network of workstations using PVM. The objective of the alogorithm is to achieve the best possible solution in terms of interconnection length, overall area of the circuit, and critical path dela

A Parallel Tabu Search Algorithm for Optimizing Multiobjective VLSI Placement

Abstract. In this paper, we present a parallel tabu search (TS) algorithm for efficient optimization of a constrained multiobjective VLSI standard cell placement problem. The primary purpose is to accelerate TS algorithm to reach near optimal placement solutions for large circuits. The proposed technique employs a candidate list partitioning strategy based on distribution of mutually disjoint set of moves among the slave processes. The implementation is carried out on a dedicated cluster of workstations. Experimental results using ISCAS-85/89 benchmark circuits illustrating quality and speedup trends are presented. A comparison of the obtained results is made with the results of a parallel genetic algorithm (GA) implementation

A Parallel Tabu Search Algorithm for Optimizing Multiobjective VLSI Placement

Abstract. In this paper, we present a parallel tabu search (TS) algorithm for efficient optimization of a constrained multiobjective VLSI standard cell placement problem. The primary purpose is to accelerate TS algorithm to reach near optimal placement solutions for large circuits. The proposed technique employs a candidate list partitioning strategy based on distribution of mutually disjoint set of moves among the slave processes. The implementation is carried out on a dedicated cluster of workstations. Experimental results using ISCAS-85/89 benchmark circuits illustrating quality and speedup trends are presented. A comparison of the obtained results is made with the results of a parallel genetic algorithm (GA) implementation

HPTS: heterogeneous parallel tabu search for VLSI placement

Parallelizing any algorithm on a cluster of heterogeneous workstations is not easy, as each workstation requires different wall clock time to execute the same instruction set. In this work, a parallel tabu search algorithm for heterogeneous workstations is presented using PVM. Two parallelization strategies, i.e., functional decomposition and multi-search thread strategies are integrated. The proposed algorithm is tested on the VLSI standard cell placement problem, however, the same algorithm can be used on any combinatorial optimization problem. The results are compared ignoring heterogeneity and are found to be superior in terms of execution tim

HPTS: heterogeneous parallel tabu search for VLSI placement

Parallelizing any algorithm on a cluster of heterogeneous workstations is not easy, as each workstation requires different wall clock time to execute the same instruction set. In this work, a parallel tabu search algorithm for heterogeneous workstations is presented using PVM. Two parallelization strategies, i.e., functional decomposition and multi-search thread strategies are integrated. The proposed algorithm is tested on the VLSI standard cell placement problem, however, the same algorithm can be used on any combinatorial optimization problem. The results are compared ignoring heterogeneity and are found to be superior in terms of execution tim

Multiobjective VLSI Cell Placement Using Distributed Simulated Evolution Algorithm

Simulated Evolution (SimE) is a sound stochastic approximation algorithm based on the principles of adaptation. If properly engineered it is possible for SimE to reach near optimal solutions in lesser time then Simulated Annealing [1], [2]. Nevertheless, depending on the size of the problem, it may have large run-time requirements. One practical approach to speed up the execution of SimE algorithm is to parallelize it. This is all the more true for multi-objective cell placement, where the need to optimize conflicting objectives (interconnect wirelength, power dissipation, and timing performance) adds another level of difficulty [3]. In this paper a distributed parallel SimE algorithm is presented for multiobjective VLSI standard cell placement. Fuzzy logic is used to integrate the costs of these objectives. The algorithm presented is based on random distribution of rows to individual processors in order to partition the problem and distribute computationally intensive tasks, while also efficiently traversing the complex search space. A series of experiments are performed on ISCAS-85/89 benchmarks to compare speedup with serial implementation and other earlier proposals. Discussion on comparison with parallel implementations of other iterative heuristics is included

Multiobjective VLSI Cell Placement Using Distributed Simulated Evolution Algorithm

Simulated Evolution (SimE) is a sound stochastic approximation algorithm based on the principles of adaptation. If properly engineered it is possible for SimE to reach near optimal solutions in lesser time then Simulated Annealing [1], [2]. Nevertheless, depending on the size of the problem, it may have large run-time requirements. One practical approach to speed up the execution of SimE algorithm is to parallelize it. This is all the more true for multi-objective cell placement, where the need to optimize conflicting objectives (interconnect wirelength, power dissipation, and timing performance) adds another level of difficulty [3]. In this paper a distributed parallel SimE algorithm is presented for multiobjective VLSI standard cell placement. Fuzzy logic is used to integrate the costs of these objectives. The algorithm presented is based on random distribution of rows to individual processors in order to partition the problem and distribute computationally intensive tasks, while also efficiently traversing the complex search space. A series of experiments are performed on ISCAS-85/89 benchmarks to compare speedup with serial implementation and other earlier proposals. Discussion on comparison with parallel implementations of other iterative heuristics is included