864 research outputs found

    ๋จธ์‹  ๋Ÿฌ๋‹ ๊ธฐ๋ฐ˜์˜ ๋‚ธ๋“œ ํ”Œ๋ž˜์‹œ ์นฉ eFuse ๊ตฌ์„ฑ ์ƒ์„ฑ ์ž๋™ํ™” ๋ฐฉ๋ฒ•๋ก 

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    ํ•™์œ„๋…ผ๋ฌธ(์„์‚ฌ)--์„œ์šธ๋Œ€ํ•™๊ต ๋Œ€ํ•™์› :๊ณต๊ณผ๋Œ€ํ•™ ์ปดํ“จํ„ฐ๊ณตํ•™๋ถ€,2019. 8. ์œ ์Šน์ฃผ.Post fabrication process is becoming more and more important as memory technology becomes complex, in the bid to satisfy target performance and yield across diverse business domains, such as servers, PCs, automotive, mobiles, and embedded devices, etc. Electronic fuse adjustment (eFuse optimization and trimming) is a traditional method used in the post fabrication processing of memory chips. Engineers adjust eFuse to compensate for wafer inter-chip variations or guarantee the operating characteristics, such as reliability, latency, power consumption, and I/O bandwidth. These require highly skilled expert engineers and yet take significant time. This paper proposes a novel machine learning-based method of automatic eFuse configuration to meet the target NAND flash operating characteristics. The proposed techniques can maximally reduce the expert engineers workload. The techniques consist of two steps: initial eFuse generation and eFuse optimization. In the first step, we apply the variational autoencoder (VAE) method to generate an initial eFuse configuration that will probably satisfy the target characteristics. In the second step, we apply the genetic algorithm (GA), which attempts to improve the initial eFuse configuration and finally achieve the target operating characteristics. We evaluate the proposed techniques with Samsung 64-Stacked vertical NAND (VNAND) in mass production. The automatic eFuse configuration takes only two days to complete the implementation.๋ฉ”๋ชจ๋ฆฌ ๊ณต์ • ๊ธฐ์ˆ ์ด ๋ฐœ์ „ํ•˜๊ณ  ๋น„์ฆˆ๋‹ˆ์Šค ์‹œ์žฅ์ด ๋‹ค์–‘ํ•ด ์ง์— ๋”ฐ๋ผ ์›จ์ดํผ ์ˆ˜์œจ์„ ๋†’์ด๊ณ  ๋น„์ฆˆ๋‹ˆ์Šค ํŠน์„ฑ ๋ชฉํ‘œ๋ฅผ ๋งŒ์กฑํ•˜๊ธฐ ์œ„ํ•œ ํ›„ ๊ณต์ • ๊ณผ์ •์ด ๋งค์šฐ ์ค‘์š”ํ•ด ์ง€๊ณ  ์žˆ๋‹ค. ์ „๊ธฐ์  ํ“จ์ฆˆ ์กฐ์ ˆ ๋ฐฉ์‹(์ด-ํ“จ์ฆˆ ์ตœ์ ํ™” ๋ฐ ํŠธ๋ฆผ)์€ ๋ฉ”๋ชจ๋ฆฌ ์นฉ ํ›„ ๊ณต์ • ๊ณผ์ •์—์„œ ์‚ฌ์šฉ๋˜๋Š” ์ „ํ†ต์ ์ธ ๋ฐฉ์‹์ด๋‹ค. ์—”์ง€๋‹ˆ์–ด๋Š” ์ด-ํ“จ์ฆˆ ์กฐ์ ˆ์„ ํ†ตํ•ด ์›จ์ดํผ ์ƒ์˜ ์นฉ๋“ค ๊ฐ„์˜ ์ดˆ๊ธฐ ํŠน์„ฑ์˜ ๋ณ€ํ™”๋ฅผ ๋ณด์ƒํ•˜๊ฑฐ๋‚˜, ์‹ ๋ขฐ์„ฑ, ๋ ˆ์ดํ„ด์‹œ, ํŒŒ์›Œ ์†Œ๋ชจ, ๊ทธ๋ฆฌ๊ณ  I/O ๋Œ€์—ญํญ ๋“ฑ์˜ ์นฉ ๋ชฉํ‘œ ํŠน์„ฑ์„ ๋ณด์žฅํ•œ๋‹ค. ์ด-ํ“จ์ฆˆ ์กฐ์ ˆ ์—…๋ฌด๋Š” ๋‹ค์ˆ˜์˜ ์ˆ™๋ จ๋œ ์—”์ง€๋‹ˆ์–ด๊ฐ€ ํ•„์š”ํ•˜๊ณ  ๋˜ํ•œ ์ƒ๋‹นํžˆ ๋งŽ์€ ์‹œ๊ฐ„์„ ์†Œ๋ชจํ•œ๋‹ค. ๋ณธ ๋…ผ๋ฌธ์—์„œ๋Š” ๋‚ธ๋“œ ํ”Œ๋ž˜์‹œ ์นฉ์˜ ๋™์ž‘ ํŠน์„ฑ ๋ชฉํ‘œ๋ฅผ ์–ป๊ธฐ ์œ„ํ•œ ๊ธฐ๊ณ„ ํ•™์Šต ๊ธฐ๋ฐ˜์˜ ์ด-ํ“จ์ฆˆ ์ž๋™ ์ƒ์„ฑ ๊ธฐ์ˆ ์„ ์ œ์•ˆํ•˜๊ณ , ํ•ด๋‹น ๊ธฐ์ˆ ์€ ์—”์ง€๋‹ˆ์–ด์˜ ์ž‘์—…์‹œ๊ฐ„์„ ํš๊ธฐ์ ์œผ๋กœ ๋‹จ์ถ•์‹œํ‚ฌ ์ˆ˜ ์žˆ๋‹ค. ๋…ผ๋ฌธ์˜ ๊ธฐ์ˆ ์€ ๋‘ ๋‹จ๊ณ„๋กœ ๊ตฌ์„ฑ ๋œ๋‹ค. ์ฒซ ๋ฒˆ์งธ ๋‹จ๊ณ„์—์„œ๋Š” variational autoencoder (VAE) ๊ธฐ์ˆ ์„ ์ ์šฉํ•˜์—ฌ ๋ชฉํ‘œํ•˜๋Š” ๋™์ž‘ ํŠน์„ฑ์„ ๋งŒ์กฑ์‹œํ‚ค๋Š” ์ดˆ๊ธฐ ์ด-ํ“จ์ฆˆ ๊ตฌ์„ฑ์„ ์ƒ์„ฑํ•œ๋‹ค. ๋‘ ๋ฒˆ์งธ ๋‹จ๊ณ„์—์„œ๋Š” ์œ ์ „ ์•Œ๊ณ ๋ฆฌ์ฆ˜์„ ์ ์šฉํ•˜์—ฌ ์ดˆ๊ธฐ ์ƒ์„ฑ๋œ ์ด-ํ“จ์ฆˆ ๊ตฌ์„ฑ์— ๋Œ€ํ•˜์—ฌ ๋ชฉํ‘œํ•˜๋Š” ์„ฑ๋Šฅ ํŠน์„ฑ๊ณผ์˜ ์ •ํ•ฉ์„ฑ์„ ์ถ”๊ฐ€๋กœ ๊ฐœ์„ ํ•˜์—ฌ ์ตœ์ข…์ ์œผ๋กœ ๋ชฉํ‘œํ•˜๋Š” ์„ฑ๋Šฅ ํŠน์„ฑ์„ ์–ป๋Š”๋‹ค. ๋…ผ๋ฌธ์˜ ํ‰๊ฐ€๋Š” ์‹ค์ œ ์–‘์‚ฐ์ค‘์ธ ์‚ผ์„ฑ 64๋‹จ ๋ธŒ์ด๋‚ธ๋“œ ์ œํ’ˆ์„ ์ด์šฉํ•˜์—ฌ ์ง„ํ–‰ํ•˜์˜€๋‹ค. ๋…ผ๋ฌธ์˜ ์ด-ํ“จ์ฆˆ ์ž๋™ํ™” ์ƒ์„ฑ ๊ธฐ์ˆ ์€ 2์ผ ์ด๋‚ด์˜ ๊ตฌํ˜„ ์‹œ๊ฐ„๋งŒ์ด ์†Œ์š”๋œ๋‹ค.Contents I. Introduction..........................................................................1 II. Background..........................................................................4 2.1. NAND Flash Block Architecture..................................................4 2.2. NAND Cell Vth Distribution........................................................5 2.3. eFuse Operation of NAND Flash Chip.......................................6 III. Basic Idea and Background...............................................7 3.1. Basic Idea.......................................................................................7 3.2. Background: Variational Autoencoder........................................10 IV. Initial eFuse Generation: VAE-Based Dual Network....14 V. eFuse Optimization: Genetic Algorithm..........................17 VI. Experimental Results.........................................................21 6.1. Experimental Setup......................................................................21 6.2. Initial eFuse Generation Results................................................23 6.3. eFuse Optimization Results........................................................26 6.4. Discussion.....................................................................................29 VII. Related Work..................................................................31 VIII. Conclusion.......................................................................33Maste

    Combined aptamer and transcriptome sequencing of single cells.

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    The transcriptome and proteome encode distinct information that is important for characterizing heterogeneous biological systems. We demonstrate a method to simultaneously characterize the transcriptomes and proteomes of single cells at high throughput using aptamer probes and droplet-based single cell sequencing. With our method, we differentiate distinct cell types based on aptamer surface binding and gene expression patterns. Aptamers provide advantages over antibodies for single cell protein characterization, including rapid, in vitro, and high-purity generation via SELEX, and the ability to amplify and detect them with PCR and sequencing

    Ship operational performance modelling for voyage optimization through fuel consumption minimization

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    Fiber optic control system integration

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    A total fiber optic, integrated propulsion/flight control system concept for advanced fighter aircraft is presented. Fiber optic technology pertaining to this system is identified and evaluated for application readiness. A fiber optic sensor vendor survey was completed, and the results are reported. The advantages of centralized/direct architecture are reviewed, and the concept of the protocol branch is explained. Preliminary protocol branch selections are made based on the F-18/F404 application. Concepts for new optical tools are described. Development plans for the optical technology and the described system are included

    A framework for co-designing product and production system to support resource-efficient manufacturing

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    This thesis reports on research undertaken to investigate how to advance the current practices of resource efficiency and sustainability consideration in manufacturing business through the simultaneous design of Product and Production System (P&PS). The primary objective of this research is the development of a framework and methods to support a manufacturer to transform the current independent design processes into a single design process facilitating designs of resource-efficient P&PS. [Continues.

    Restructurable Controls

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    Restructurable control system theory, robust reconfiguration for high reliability and survivability for advanced aircraft, restructurable controls problem definition and research, experimentation, system identification methods applied to aircraft, a self-repairing digital flight control system, and state-of-the-art theory application are addressed

    ็ต„ใฟ่พผใฟใ‚ทใ‚นใƒ†ใƒ ใซใŠใ‘ใ‚‹็”ปๅƒๅˆ†้กžใฎใŸใ‚ใฎใƒžใƒซใƒใƒˆใƒชใƒ ใƒใƒƒใƒˆใƒฏใƒผใ‚ฏๆง‹้€ ใ‚’็”จใ„ใŸใƒขใƒ‡ใƒซๅœง็ธฎ

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    Much effort has gone into developing smart robots, wherein perception and manipulation are among the most fundamental and challenging problems. Embedded systems (ESs) are critical in robot composition. However, as an embedded system, a robot brain has a fixed resource budget and is unsuitable for modern convolutional neural networks (CNNs). Thus, the approach of CNN compression plays an important role in reducing their computational cost to make a suitable model for embedded systems. Recently, CNN compression approaches can be categorized into two groups, namely hand-crafted and model compression (MC) approach. The hand-crafted approach involves factorization and manual compression, but it is time consuming and usually requires significant amounts of manual effort and domain knowledge. Instead, the MC approach takes advantage of pre-trained models and it can solve a hand-crafted problem. The MC squeezes an existing model into one that is smaller and requires less computation. Although most MC methods can achieve a low latency or high accuracy, they are non-optimum accuracyโ€“latency trade-off, complex, and do not affect certain dimensions (e.g., the width, resolution, and depth) of the models. To overcome this problem, the thesis presents a simple model-compression approach that optimize the accuracyโ€“latency trade-off of the model. The multi-trimmed network structure (MTNS) is a robust combination of model compression (MC) techniques providing a lightweight model with trade-off optimization. The thesis describes a number of significant advances. Firstly, a new simple and efficient MC technique is introduced, which takes into width, resolution and depth compression. Secondly, a new multi-objective function is devised, which uses the accuracyโ€“latency trade-off of compressed models to optimize the performance of a target model. Thirdly, a new training-accelerator is developed, which integrates pruning of convolutional kernels into shrinking the model structure to reduce training time at compressing width dimension. Finally, a new search strategy is developed, which combines Neural Architecture Search (NAS) with shrinking the model structure to explore more-complex conditions of shrinking the model structure with a relatively short training period. In an experimental evaluation, the thesis compares the performances of the proposed MTNS approach with those of CNN filter pruning, the model quantization technique, an adaptive mixture of low-rank factorizations, and knowledge distillation. The MTNS better resolved the accuracyโ€“latency trade-off in image classification than the modern MC methods. It will be useful and friendly to the embedded system to perform a compressed model of MTNS with the maximum trade-off, lightweight, low computation and rapid process. The outstanding of the thesis is that the model compression problems have been solved by using MTNS techniques which are simple and optimum accuracyโ€“latency trade-off for model compression.ไนๅทžๅทฅๆฅญๅคงๅญฆๅšๅฃซๅญฆไฝ่ซ–ๆ–‡ ๅญฆไฝ่จ˜็•ชๅท๏ผšๅทฅๅš็”ฒ็ฌฌ532ๅท ๅญฆไฝๆŽˆไธŽๅนดๆœˆๆ—ฅ๏ผšไปคๅ’Œ3ๅนด9ๆœˆ24ๆ—ฅ1 Introduction|2 Literature Reviews|3 Preliminary Knowledge and Technique for Model Compression|4 Shrinking Structure of Models|5 Shrinking Structure of Models with Training Accelerator|6 Trim Neural Architecture Search|7 Conclusionsไนๅทžๅทฅๆฅญๅคงๅญฆไปคๅ’Œ3ๅนด

    Structured learning for non-smooth ranking losses

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    Learning to rank from relevance judgment is an active research area. Itemwise score regression, pairwise preference satisfaction, and listwise structured learning are the major techniques in use. Listwise structured learning has been applied recently to optimize important non-decomposable ranking criteria like AUC (area under ROC curve) and MAP (mean average precision). We propose new, almost-linear-time algorithms to optimize for two other criteria widely used to evaluate search systems: MRR (mean reciprocal rank) and NDCG (normalized discounted cumulative gain) in the max-margin structured learning framework. We also demonstrate that, for different ranking criteria, one may need to use different feature maps. Search applications should not be optimized in favor of a single criterion, because they need to cater to a variety of queries. E.g. MRR is best for navigational queries, while NDCG is best for informational queries. A key contribution of this paper is to fold multiple ranking loss functions into a multi-criteria max-margin optimization. The result is a single, robust ranking model that is close to the best accuracy of learners trained on individual criteria. In fact, experiments over the popular LETOR and TREC data sets show that, contrary to conventional wisdom, a test criterion is often not best served by training with the same individual criterion

    Design of an integrated airframe/propulsion control system architecture

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    The design of an integrated airframe/propulsion control system architecture is described. The design is based on a prevalidation methodology that uses both reliability and performance. A detailed account is given for the testing associated with a subset of the architecture and concludes with general observations of applying the methodology to the architecture
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