Configurable 3D-integrated focal-plane sensor-processor array architecture

A mixed-signal Cellular Visual Microprocessor architecture with digital processors is described. An ASIC implementation is also demonstrated. The architecture is composed of a regular sensor readout circuit array, prepared for 3D face-to-face type integration, and one or several cascaded array of mainly identical (SIMD) processing elements. The individual array elements derived from the same general HDL description and could be of different in size, aspect ratio, and computing resources

Motion estimation and CABAC VLSI co-processors for real-time high-quality H.264/AVC video coding

Real-time and high-quality video coding is gaining a wide interest in the research and industrial community for different applications. H.264/AVC, a recent standard for high performance video coding, can be successfully exploited in several scenarios including digital video broadcasting, high-definition TV and DVD-based systems, which require to sustain up to tens of Mbits/s. To that purpose this paper proposes optimized architectures for H.264/AVC most critical tasks, Motion estimation and context adaptive binary arithmetic coding. Post synthesis results on sub-micron CMOS standard-cells technologies show that the proposed architectures can actually process in real-time 720 × 480 video sequences at 30 frames/s and grant more than 50 Mbits/s. The achieved circuit complexity and power consumption budgets are suitable for their integration in complex VLSI multimedia systems based either on AHB bus centric on-chip communication system or on novel Network-on-Chip (NoC) infrastructures for MPSoC (Multi-Processor System on Chip

Multiservice QoS-Enabled MAC for Optical Burst Switching

The emergence of a broad range of network-driven applications (e.g., multimedia, online gaming) brings in the need for a network environment able to provide multiservice capabilities with diverse quality-of-service (QoS) guarantees. In this paper, a medium access control protocol is proposed to support multiple services and QoS levels in optical burst-switched mesh networks without wavelength conversion. The protocol provides two different access mechanisms, queue-arbitrated and prearbitrated for connectionless and connection-oriented burst transport, respectively. It has been evaluated through extensive simulations and its simplistic form makes it very promising for implementation and deployment. Results indicate that the protocol can clearly provide a relative quality differentiation for connectionless traffic and guarantee null (or negligible, and thus acceptable) burst loss probability for a wide range of network (or offered) load while ensuring low access delay for the higher-priority traffic. Furthermore, in the multiservice scenario mixing connectionless and connection-oriented burst transmissions, three different prearbitrated slot scheduling algorithms are evaluated, each one providing a different performance in terms of connection blocking probability. The overall results demonstrate the suitability of this architecture for future integrated multiservice optical networks

Analog MIMO Radio-over-Copper: Prototype and Preliminary Experimental Results

Analog Multiple-Input Multiple-Output Radio-over-Copper (A-MIMO-RoC) is an effective all-analog FrontHaul (FH) architecture that exploits any pre-existing Local Area Network (LAN) cabling infrastructure of buildings to distribute Radio-Frequency (RF) signals indoors. A-MIMO-RoC, by leveraging a fully analog implementation, completely avoids any dedicated digital interface by using a transparent end-to-end system, with consequent latency, bandwidth and cost benefits. Usually, LAN cables are exploited mainly in the low-frequency spectrum portion, mostly due to the moderate cable attenuation and crosstalk among twisted-pairs. Unlike current systems based on LAN cables, the key feature of the proposed platform is to exploit more efficiently the huge bandwidth capability offered by LAN cables, that contain 4 twisted-pairs reaching up to 500 MHz bandwidth/pair when the length is below 100 m. Several works proposed numerical simulations that assert the feasibility of employing LAN cables for indoor FH applications up to several hundreds of MHz, but an A-MIMO-RoC experimental evaluation is still missing. Here, we present some preliminary results obtained with an A-MIMO-RoC prototype made by low-cost all-analog/all-passive devices along the signal path. This setup demonstrates experimentally the feasibility of the proposed analog relaying of MIMO RF signals over LAN cables up to 400 MHz, thus enabling an efficient exploitation of the LAN cables transport capabilities for 5G indoor applications.Comment: Part of this work has been accepted as a conference publication to ISWCS 201

Access and metro network convergence for flexible end-to-end network design

This paper reports on the architectural, protocol, physical layer, and integrated testbed demonstrations carried out by the DISCUS FP7 consortium in the area of access - metro network convergence. Our architecture modeling results show the vast potential for cost and power savings that node consolidation can bring. The architecture, however, also recognizes the limits of long-reach transmission for low-latency 5G services and proposes ways to address such shortcomings in future projects. The testbed results, which have been conducted end-to-end, across access - metro and core, and have targeted all the layers of the network from the application down to the physical layer, show the practical feasibility of the concepts proposed in the project

Solutions for a single carrier 40 Gbit/s downstream long-reach passive optical network

This paper presents a single carrier 40 Gbit/s downstream long-reach passive optical network (LR-PON) topology as candidate for upgrading cur rent f ber infrastructure towards higher data rates. A 100 km LR-PON network was investigated and 2 solutions to overcome chromatic dispersion were proposed. Firstly, a dispersion compensated element is added to compensate the mean length of the feeder f ber. Secondly, an advanced modulation scheme, i.e. 3-level electrical duo-binary is introduced. This scheme has the advantage of allowing lower bandwidth APDs and requires only limited additional electronics. Furthermore, to overcome the inherent discrepancy between aggregated line rate and user rate, and hence the reduced power effciency, the BiPON protocol is added to minimize signal processing at the high line rates