Design of low power CMOS UWB transceiver ICs

Master'sMASTER OF ENGINEERIN

Phase error statistics of a phase-locked loop synchronized direct detection optical PPM communication system

Receiver timing synchronization of an optical Pulse-Position Modulation (PPM) communication system can be achieved using a phased-locked loop (PLL), provided the photodetector output is suitably processed. The magnitude of the PLL phase error is a good indicator of the timing error at the receiver decoder. The statistics of the phase error are investigated while varying several key system parameters such as PPM order, signal and background strengths, and PPL bandwidth. A practical optical communication system utilizing a laser diode transmitter and an avalanche photodiode in the receiver is described, and the sampled phase error data are presented. A linear regression analysis is applied to the data to obtain estimates of the relational constants involving the phase error variance and incident signal power

Digital ADCs and ultra-wideband RF circuits for energy constrained wireless applications by Denis Clarke Daly.

Thesis (Ph. D.)--Massachusetts Institute of Technology, Dept. of Electrical Engineering and Computer Science, 2009.Cataloged from PDF version of thesis.Includes bibliographical references (p. 173-183).Ongoing advances in semiconductor technology have enabled a multitude of portable, low power devices like cellular phones and wireless sensors. Most recently, as transistor device geometries reach the nanometer scale, transistor characteristics have changed so dramatically that many traditional circuits and architectures are no longer optimal and/or feasible. As a solution, much research has focused on developing 'highly digital' circuits and architectures that are tolerant of the increased leakage, variation and degraded voltage headrooms associated with advanced CMOS processes. This thesis presents several highly digital, mixed-signal circuits and architectures designed for energy constrained wireless applications. First, as a case study, a highly digital, voltage scalable flash ADC is presented. The flash ADC, implemented in 0.18 [mu]m CMOS, leverages redundancy and calibration to achieve robust operation at supply voltages from 0.2 V to 0.9 V. Next, the thesis expands in scope to describe a pulsed, noncoherent ultra-wideband transceiver chipset, implemented in 90 nm CMOS and operating in the 3-to-5 GHz band. The all-digital transmitter employs capacitive combining and pulse shaping in the power amplifier to meet the FCC spectral mask without any off-chip filters. The noncoherent receiver system-on-chip achieves both energy efficiency and high performance by employing simple amplifier and ADC structures combined with extensive digital calibration. Finally, the transceiver chipset is integrated in a complete system for wireless insect flight control.(cont.) Through the use of a flexible PCB and 3D die stacking, the total weight of the electronics is kept to 1 g, within the carrying capacity of an adult Manduca sexta moth. Preliminary wireless flight control of a moth in a wind tunnel is demonstrated.Ph.D

Power-efficient Circuit Architectures for Receivers Leveraging Nanoscale CMOS

Cellular and mobile communication markets, together with CMOS technology scaling, have made complex systems-on-chip integrated circuits (ICs) ubiquitous. Moving towards the internet of things that aims to extend this further requires ultra-low power and efficient radio communication that continues to take advantage of nanoscale CMOS processes. At the heart of this lie orthogonal challenges in both system and circuit architectures of current day technology. By enabling transceivers at center frequencies ranging in several tens of GHz, modern CMOS processes support bandwidths of up to several GHz. However, conventional narrowband architectures cannot directly translate or trade-off these speeds to lower power consumption. Pulse-radio UWB (PR-UWB), a fundamentally different system of communication enables this trade-off by bit-level duty-cycling i.e., power-gating and has emerged as an alternative to conventional narrowband systems to achieve better energy efficiency. However, system-level challenges in the implementation of transceiver synchronization and duty-cycling have remained an open challenge to realize the ultra-low power numbers that PR-UWB promises. Orthogonally, as CMOS scaling continues, approaching 28nm and 14nm in production digital processes, the key transistor characteristics have rapidly changed. Changes in supply voltage, intrinsic gain and switching speeds have rendered conventional analog circuit design techniques obsolete, since they do not scale well with the digital backend engines that dictate scaling. Consequently, circuit architectures that employ time-domain processing and leverage the faster switching speeds have become attractive. However, they are fundamentally limited by their inability to support linear domain-to-domain conversion and hence, have remained un-suited to high-performance applications. Addressing these requirements in different dimensions, two pulse-radio UWB receiver and a continuous-time filter silicon prototypes are presented in this work. The receiver prototypes focus on system level innovation while the filter serves as a demonstration vehicle for novel circuit architectures developed in this work. The PR-UWB receiver prototypes are implemented in a 65nm LP CMOS technology and are fully integrated solutions. The first receiver prototype is a compact UWB receiver front end operating at 4.85GHz that is aggressively duty-cycled. It occupies an active area of only 0.4 mm², thanks to the use of few inductors and RF G_m-C filters and incorporates an automatic-threshold-recovery-based demodulator for digitization. The prototype achieves a sensitivity of -88dBm at a data rate of 1Mbps (for a BER of 10^-3), while achieving the lowest energy consumption gradient (dP/df_data=450pJ/bit) amongst other receivers operating in the lower UWB band, for the same sensitivity. However, this prototype is limited by idle-time power consumption (e.g., bias) and lacks synchronization capability. A fully self-duty-cycled and synchronized UWB pulse-radio receiver SoC targeted at low-data-rate communication is presented as the second prototype. The proposed architecture builds on the automatic-threshold-recovery-based demodulator to achieve synchronization using an all-digital clock and data recovery loop. The SoC synchronizes with the incoming pulse stream from the transmitter and duty-cycles itself. The SoC prototype achieves a -79.5dBm, 1Mbps-normalized sensitivity for a >5X improvement over the state of the art in power consumption (375pJ/bit), thanks to aggressive signal path and bias circuit duty-cycling. The SoC is fully integrated to achieve RF-in to bit-out operation and can interface with off-chip, low speed digital components. Finally, switched-mode signal processing, a signal processing paradigm that enables the design of highly linear, power-efficient feedback amplifiers is presented. A 0.6V continuous-time filter prototype that demonstrates the advantages of this technique is presented in a 65nm GP CMOS process. The filter draws 26.2mW from the supply while operating at a full-scale that is 73% of the V_dd, a bandwidth of 70MHz and a peak signal-to-noise-and-distortion ratio (SNDR) of 55.8dB. This represents a 2-fold improvement in full-scale and a 10-fold improvement in the bandwidth over state-of-the-art filter implementations, while demonstrating excellent linearity and signal-to-noise ratio. To sum up, innovations spanning both system and circuit architectures that leverage the speeds of nanoscale CMOS processes to enable power-efficient solutions to next-generation wireless receivers are presented in this work

UWB Low Power RF System for Localization

Real time indoor positioning awareness systems aim to add localization capabilities to upcoming wireless technologies that are quickly becoming an important feature for indoor environment. RF-based impulse-radio ultra-wideband (IR-UWB) is a promising technology for in-door positioning systems due to obstacle penetration capabilities, immunity to multi-path and fading, and high resolution. Major challenge for IR-UWB systems is to achieve higher sensitivity, which puts high sampling demands on receivers, increasing the cost and power consumption. This research concentrates on the design of low power ultra-wideband transceivers and analyses different performance trade-offs. The first part focuses on the trade-off and benefits of UWB for indoor localization. It also discusses battery-less wirelessly-powered UWB transceivers tags, power scavenging for low power wireless sensor networks. In the second part, a low power indoor localization system is proposed and design of low power interference tolerant RF receiver front-end is also presented. Finally, a wide-band inductor-less balun low-noise amplifier (LNA) is demonstrated. To achieve good noise figure, linearity and low power consumption, it exploits a current reuse input common source (CS) stage with source follower (SF) feedback and admittance scaled CS stage for noise and distortion cancellation. By separating gain and input match with active feedback, a higher gain is achieved. This architecture significantly decreases required area and provides high RF gain allowing for higher sensitivity with non-coherent RF receiver architecture

Development of a networked photonic‐enabled staring radar testbed for urban surveillance

Urban surveillance of slow-moving small targets such as drones and birds in low to medium airspace using radar presents significant challenges. Detecting, locating and identifying such low observable targets in strong clutter requires both innovation in radar hardware design and optimisation of processing algorithms. To this end, the University of Birmingham (UoB) has set-up a testbed of two L-band staring radars to support performance benchmarking using datasets of target and clutter from realistic urban environment. This testbed is also providing the vehicle to understand how novel radar architectures can enhance radar capabilities. Some of the challenges in installing the radar at the UoB campus are highlighted. Detailed benchmarking results are provided from urban monostatic and bistatic field trials that form the basis for performance comparison against future hardware modification. The solution to the challenge of interfacing the radar to the external oscillators is described and stand-alone bench tests with the candidate oscillators are reported. The testbed provides a valuable capability to undertake detailed analysis of performance of Quantum photonic-enabled radar and allows for its comparison with conventional oscillator technology for surveillance of low observable targets in the presence of urban clutter

The Design of Low Power Ultra-Wideband Transceiver

Ph.DDOCTOR OF PHILOSOPH

Programmable rate modem utilizing digital signal processing techniques

The engineering development study to follow was written to address the need for a Programmable Rate Digital Satellite Modem capable of supporting both burst and continuous transmission modes with either binary phase shift keying (BPSK) or quadrature phase shift keying (QPSK) modulation. The preferred implementation technique is an all digital one which utilizes as much digital signal processing (DSP) as possible. Here design tradeoffs in each portion of the modulator and demodulator subsystem are outlined, and viable circuit approaches which are easily repeatable, have low implementation losses and have low production costs are identified. The research involved for this study was divided into nine technical papers, each addressing a significant region of concern in a variable rate modem design. Trivial portions and basic support logic designs surrounding the nine major modem blocks were omitted. In brief, the nine topic areas were: (1) Transmit Data Filtering; (2) Transmit Clock Generation; (3) Carrier Synthesizer; (4) Receive AGC; (5) Receive Data Filtering; (6) RF Oscillator Phase Noise; (7) Receive Carrier Selectivity; (8) Carrier Recovery; and (9) Timing Recovery

Enhancing Spectrum Utilization in Dynamic Cognitive Radio Systems

Cognitive radio (CR) is regarded as a viable solution to enabling flexible use of the frequency spectrum in future generations of wireless systems by allowing unlicensed secondary users (SU) to access licensed spectrum under the specific condition that no harmful interference be caused to the licensed primary users (PU) of the spectrum. In practical scenarios, the knowledge of PU activity is unknown to CRs and radio environments are mostly imperfect due to various issues such as noise uncertainty and multipath fadings. Therefore, important functionalities of CR systems are to efficiently detect availability of radio spectrum as well as to avoid generating interference to PUs, by missing detection of active PU signals. Typically, CR systems are expected to be equipped with smart capabilities which include sensing, adapting, learning, and awareness concerned with spectrum opportunity access, radio environments, and wireless communications operations, such that SUs equipped with CRs can efficiently utilize spectrum opportunities with high quality of services. Most existing researches working on CR focus on improving spectrum sensing through performance measures such as the probabilities of PU detection and false alarm but none of them explicitly studies the improvement in the actual spectrum utilization. Motivated by this perspective, the main objective of the dissertation is to explore new techniques on the physical layer of dynamic CR systems, that can enhance actual utilization of spectrum opportunities and awareness on the performance of CR systems. Specifically, this dissertation investigates utilization of spectrum opportunities in dynamic scenarios, where a licensed radio spectrum is available for limited time and also analyzes how it is affected by various parameters. The dissertation proposes three new methods for adaptive spectrum sensing which improve dynamic utilization of idle radio spectrum as well as the detection of active PUs in comparison to the conventional method with fixed spectrum sensing size. Moreover, this dissertation presents a new approach for optimizing cooperative spectrum sensing performance and also proposes the use of hidden Markov models (HMMs) to enabling performance awareness for local and cooperative spectrum sensing schemes, leading to improved spectrum utilization. All the contributions are illustrated with numerical results obtained from extensive simulations which confirm their effectiveness for practical applications