Lignes couplées à ondes lentes intégrées sur silicium en bande millimétrique - Application aux coupleurs, filtres et baluns

This work focuses on high-performances CS-CPW (Coupled Slow-wave CoPlanar Waveguide) transmission lines in classical CMOS integrated technologies for the millimiter-wave frequency band. First, the theory as well as the electrical models of the CS-CPW are presented. Thanks to the models and electromagnetic simulations, directional couplers with different coupling levels (3 dB, 10 dB, 18 dB) were designed in BiCMOS 55 nm technology. They have a good directivity, always better than 15 dB. A first prototype of a coupler was measured at 150 GHz presenting good agreement with the simulations. Next, coupled-line base filters were developed at 80 GHz using the CS-CPWs. Simulation present competitive results with the state-of-art: 11% of fractional bandwidth and a unload quality factor of 25. Finally, three projects started based on the CS-CPWs. The projects are currently used in two theses and one internship: a RTPS at 47 GHz, an isolator at 75 GHz and a balun at 80 GHz.L’objectif de ce travail de thèse est le développement en technologie intégrée standard d’une structure de ligne de transmission optimisée en termes de pertes, d’encombrement, de facteur de qualité et surtout du choix du niveau de couplage aux fréquences millimétriques. Cette structure a été nommée CS-CPW (Coupled Slow-wave CoPlanar Waveguide). Dans un premier temps, la théorie ainsi que les modèles électriques des CS-CPW sont présentés. Grâce aux modèles et aux simulations électromagnétiques, des coupleurs directionnels avec plusieurs valeurs de couplage (3 dB, 10 dB, 18 dB) ont été conçus en technologie BiCMOS 55 nm. Ils présentent tous une très bonne directivité, elle est toujours supérieure à 15 dB. Un premier prototype de coupleur a été mesuré à 150 GHz. Dans un deuxième temps, des filtres à la base des lignes couplées ont été développés à 80 GHz en utilisant des lignes CS-CPW. Les résultats des simulations présentent des résultats concurrentiels avec l’état de l’art : 11% de bande passante relative et un facteur non-chargé autour de 25. Finalement, trois projets ont démarré à la base de ces lignes. Ces projets sont actuellement utilisés dans deux travaux de thèse et un stage : un RTPS à 47 GHz, un isolateur à 75 GHz et un balun à 80 GHz

A 40-GHz Load Modulated Balanced Power Amplifier using Unequal Power Splitter and Phase Compensation Network in 45-nm SOI CMOS

© 2023 IEEE - All rights reserved. This is the accepted manuscript version of an article which has been published in final form at https://doi.org/10.1109/TCSI.2023.3282731 ​​​​​​​In this work, a ten-way power-combined poweramplifier is designed using a load modulated balanced amplifier(LMBA)-based architecture. To provide the required magnitudeand phase controls between the main and control-signal paths ofthe LMBA, an unequal power splitter and a phase compensationnetwork are proposed. As proof of concept, the designed poweramplifier is implemented in a 45-nm SOI CMOS process. At 40GHz, it delivers a 25.1 dBm Psat with a peak power-addedefficiency (PAE) of 27.9%. At 6-dB power back-off level, itachieves 1.39 times drain efficiency enhancement over an idealClass-B power amplifier. Using a 200-MHz single-carrier 64-QAMsignal, the designed amplifier delivers an average output power of16.5 dBm with a PAE of 13.1% at an EVMrms of -23.9 dB andACPR of -25.3 dBc. The die size, including all testing pads, is only1.92 mm2. To the best of the authors’ knowledge, compared withthe other recently published silicon-based LMBAs, this designachieves the highest Psat.Peer reviewe

Passive and active circuits in cmos technology for rf, microwave and millimeter wave applications

The permeation of CMOS technology to radio frequencies and beyond has fuelled an urgent need for a diverse array of passive and active circuits that address the challenges of rapidly emerging wireless applications. While traditional analog based design approaches satisfy some applications, the stringent requirements of newly emerging applications cannot necessarily be addressed by existing design ideas and compel designers to pursue alternatives. One such alternative, an amalgamation of microwave and analog design techniques, is pursued in this work. A number of passive and active circuits have been designed using a combination of microwave and analog design techniques. For passives, the most crucial challenge to their CMOS implementation is identified as their large dimensions that are not compatible with CMOS technology. To address this issue, several design techniques – including multi-layered design and slow wave structures – are proposed and demonstrated through experimental results after being suitably tailored for CMOS technology. A number of novel passive structures - including a compact 10 GHz hairpin resonator, a broadband, low loss 25-35 GHz Lange coupler, a 25-35 GHz thin film microstrip (TFMS) ring hybrid, an array of 0.8 nH and 0.4 nH multi-layered high self resonant frequency (SRF) inductors are proposed, designed and experimentally verified. A number of active circuits are also designed and notable experimental results are presented. These include 3-10 GHz and DC-20 GHz distributed low noise amplifiers (LNA), a dual wideband Low noise amplifier and 15 GHz distributed voltage controlled oscillators (DVCO). Distributed amplifiers are identified as particularly effective in the development of wideband receiver front end sub-systems due to their gain flatness, excellent matching and high linearity. The most important challenge to the implementation of distributed amplifiers in CMOS RFICs is identified as the issue of their miniaturization. This problem is solved by using integrated multi-layered inductors instead of transmission lines to achieve over 90% size compression compared to earlier CMOS implementations. Finally, a dual wideband receiver front end sub-system is designed employing the miniaturized distributed amplifier with resonant loads and integrated with a double balanced Gilbert cell mixer to perform dual band operation. The receiver front end measured results show 15 dB conversion gain, and a 1-dB compression point of -4.1 dBm in the centre of band 1 (from 3.1 to 5.0 GHz) and -5.2 dBm in the centre of band 2 (from 5.8 to 8 GHz) with input return loss less than 10 dB throughout the two bands of operation

Highly Efficient Balanced Power Amplifiers for 4G Applications

This paper presents a highly efficient balanced power amplifier for 4G applications using a microstrip branch line coupler. A compact U-shaped microstrip branch line coupler is used for the balanced power amplifier (PA) architecture. The balanced PA achieves a power aided efficiency (PAE) of 66.8% what makes it very applicable for the 4G and 5G communication systems. The simulated and measured S-parameters (S11 and S22), gain, output power and power spectra densities for 3 MHz LTEsignals at 1.5 GHz are presented

Compact Millimeter-Wave Bandpass Filters Using Quasi-Lumped Elements in 0.13-um (Bi)-CMOS Technology for 5G Wireless Systems

© 2019 IEEE.A design methodology for a compact millimeter-wave on-chip bandpass filter (BPF) is presented in this paper. Unlike the previously published works in the literature, the presented method is based on quasi-lumped elements, which consists of a resonator with enhanced self-coupling and metal-insulator-metal capacitors. Thus, this approach provides inherently compact designs comparing with the conventional distributed elements-based ones. To fully understand the insight of the approach, simplified LC-equivalent circuit models are developed. To further demonstrate the feasibility of using this approach in practice, the resonator and two compact BPFs are designed using the presented models. All three designs are fabricated in a standard 0.13- \mu \text{m} (Bi)-CMOS technology. The measured results show that the resonator can generate a notch at 47 GHz with the attenuation better than 28 dB due to the enhanced self-coupling. The chip size, excluding the pads, is only 0.096 \times 0.294 mm 2. In addition, using the resonator for BPF designs, the first BPF has one transmission zero at 58 GHz with a peak attenuation of 23 dB. The center frequency of this filter is 27 GHz with an insertion loss of 2.5 dB, while the return loss is better than 10 dB from 26 to 31 GHz. The second BPF has two transmission zeros, and a minimum insertion loss of 3.5 dB is found at 29 GHz, while the return loss is better than 10 dB from 26 GHz to 34 GHz. Also, more than 20-dB stopband attenuation is achieved from dc to 20.5 GHz and from 48 to 67 GHz. The chip sizes of these two BPFs, excluding the pads, are only 0.076\times 0.296 mm 2 and 0.096\times 0.296 mm 2, respectively.Peer reviewe

Integrated Antennas and Active Beamformers Technology for mm-Wave Phased-Array Systems

In this thesis, based on the indoor channel measurements and ray-tracing modeling for the indoor mm-wave wireless communications, the challenges of the design of the radio in this band is studied. Considering the recently developed standards such as IEEE 802.15.3c, ECMA and WiGig at 60 GHz, the link budget of the system design for different classes of operation is done and the requirement for the antenna and other RF sections are extracted. Based on radiation characteristics of mm-wave and the fundamental limits of low-cost Silicon technology, it is shown that phased-array is the ultimate solution for the radio and physical layer of the mobile millimeter wave multi-Gb/s wireless networks. Different phased-array configurations are studied and a low-cost single-receiver array architecture with RF phase-shifting is proposed. A systematic approach to the analysis of the overall noise-figure of the proposed architecture is presented and the component technical requirements are derived for the system level specifications. The proposed on-chip antennas and antenna-in-packages for various applications are designed and verified by the measurement results. The design of patch antennas on the low-cost RT/Duroid substrate and the slot antennas on the IPD technologies as well as the compact on-chip slot DRA antenna are explained in the antenna design section. The design of reflective-type phase shifters in CMOS and MEMS technologies is explained. Finally, the design details of two developed 60 GHz integrated phased-arrays in CMOS technology are discussed. Front-end circuit blocks such as LNA, continuous passive reflective-type phase shifters, power combiner and variable gain amplifiers are investigated, designed and developed for a 60 GHz phased-array radio in CMOS technology. In the first design, the two-element CMOS phased-array front-ends based on passive phase shifting architecture is proposed and developed. In the second phased-array, the recently developed on-chip dielectric resonator antenna in our group in lower frequency is scaled and integrated with the front-end

Nouvelles Topologies des diviseurs de puissance, balun et déphaseurs en bandes RF et millimétiques, apport des lignes à ondes lentes

L objectif de cette thèse a été premièrement de réaliser des dispositifs passifs intégrés à base de lignes à onde lentes nommées S-CPW (pour Slow-wave CoPlanar Waveguide ) aux fréquences millimétriques. Plusieurs technologies CMOS ou BiCMOS ont été utilisées: CMOS 65 nm et 28 nm ainsi que BiCMOS 55 nm. Deux baluns, le premier basé sur une topologie de rat-race et le second basé sur un diviseur de puissance de Wilkinson modifié, ainsi qu un inverseur de phase, ont été réalisés et mesurés dans la technologie CMOS 65 nm. Les résultats expérimentaux obtenus se situent à l état de l art en termes de performances électriques. Un coupler hybride et un diviseur de puissance avec des sorties en phase sans isolation ont été conçus en technologie CMOS 28 nm. Les simulations montrent de très bonnes performances pour des dispositifs compacts. Les circuits sont en cours de fabrication et pourront très bientôt être caractérisés. Ensuite, une nouvelle topologie de diviseurs de puissance, avec sorties en phase et isolé a été développée, offrant une grande flexibilité et compacité en comparaison des diviseurs de puissance traditionnels. Cette topologie est parfaitement adaptée pour les technologies silicium. Comme preuve de concept, deux diviseurs de puissance avec des caractéristiques différentes ont été réalisés en technologie PCB microruban à la fréquence de 2.45 GHz. Un composent a été conçu à 60 GHz en technologie BiCMOS 55 nm utilisant des lignes S CPW. Les simulations prouvent que le dispositif est faibles pertes, adapté et isolé. Les circuits sont également en cours de fabrication. Enfin, deux topologies de reflection type phase shifter ont été développées, la première dans la bande RF et la seconde aux fréquences millimétrique. Pour la bande RF, le déphasage atteint plus de 360 avec une figure de mérite très élevée en comparaison avec l état de l art. En ce qui concerne le déphaseur dans la bande millimétrique, la simulation montre un déphasage de 341 avec également une figure de mérite élevée.The first purpose of this work was the use of slow-wave coplanar waveguides (S CPW) to achieve various passive components with the aim to show their great potential and interest at millimetre-waves. Several CMOS or BiCMOS technologies were used: CMOS 65 nm and 28 nm, and BiCMOS 55 nm. Two baluns, one based on a rat-race topology and the other based on a modified Wilkinson power divider, and a phase inverter, were achieved and measured in a 65 nm CMOS technology. State-of-the-art results were achieved. A branch-line coupler and an in phase power divider without isolation were designed in a 28 nm CMOS technology. Really good performances are expected for these compact devices being yet under fabrication. Then, a new topology of in phase and isolated power divider was developed, leading to more flexibility and compactness, well suited to millimetre-wave frequencies. Two power dividers with different characteristics were realized in a PCB technology at 2.45 GHz by using microstrip lines, as a proof-of-concept. After that, a power divider was designed at the working frequency of 60 GHz in the 55 nm BiCMOS technology with S CPWs. The simulation results showed a low loss, full-matched and isolated component, which is also under fabrication and will be characterized as soon as possible. Finally, two new topologies of reflection type phase shifters were presented, one for the RF band and one for the millimetre-wave one. For the one in RF band, the phase shift can reach more than 360 with a great figure-of-merit as compared to the state-of-the-art. Concerning the phase shifter in the millimetre-wave band, the simulation results show a phase shift of 341 with also a high figure-of-merit.SAVOIE-SCD - Bib.électronique (730659901) / SudocGRENOBLE1/INP-Bib.électronique (384210012) / SudocGRENOBLE2/3-Bib.électronique (384219901) / SudocSudocFranceF

Integrated Circuit and Antenna Technology for Millimeter-wave Phased Array Radio Front-end

Ever growing demands for higher data rate and bandwidth are pushing extremely high data rate wireless applications to millimeter-wave band (30-300GHz), where sufficient bandwidth is available and high data rate wireless can be achieved without using complex modulation schemes. In addition to the communication applications, millimeter-wave band has enabled novel short range and long range radar sensors for automotive as well as high resolution imaging systems for medical and security. Small size, high gain antennas, unlicensed and worldwide availability of released bands for communication and a number of other applications are other advantages of the millimeter-wave band. The major obstacle for the wide deployment of commercial wireless and radar systems in this frequency range is the high cost and bulky nature of existing GaAs- and InP-based solutions. In recent years, with the rapid scaling and development of the silicon-based integrated circuit technologies such as CMOS and SiGe, low cost technologies have shown acceptable millimeter-wave performance, which can enable highly integrated millimeter-wave radio devices and reduce the cost significantly. Furthermore, at this range of frequencies, on-chip antenna becomes feasible and can be considered as an attractive solution that can further reduce the cost and complexity of the radio package. The propagation channel challenges for the realization of low cost and reliable silicon-based communication devices at millimeter-wave band are severe path loss as well as shadowing loss of human body. Silicon technology challenges are low-Q passive components, low breakdown voltage of active devices, and low efficiency of on-chip antennas. The main objective of this thesis is to investigate and to develop antenna and front-end for cost-effective silicon based millimeter-wave phased array radio architectures that can address above challenges for short range, high data rate wireless communication as well as radar applications. Although the proposed concepts and the results obtained in this research are general, as an important example, the application focus in this research is placed on the radio aspects of emerging 60 GHz communication system. For this particular but extremely important case, various aspects of the technology including standard, architecture, antenna options and indoor propagation channel at presence of a human body are studied. On-chip dielectric resonator antenna as a radiation efficiency improvement technique for an on-chip antenna on low resistivity silicon is presented, developed and proved by measurement. Radiation efficiency of about 50% was measured which is a significant improvement in the radiation efficiency of on-chip antennas. Also as a further step, integration of the proposed high efficiency antenna with an amplifier in transmit and receive configurations at 30 GHz is successfully demonstrated. For the implementation of a low cost millimeter-wave array antenna, miniaturized, and efficient antenna structures in a new integrated passive device technology using high resistivity silicon are designed and developed. Front-end circuit blocks such as variable gain LNA, continuous passive and active phase shifters are investigated, designed and developed for a 60GHz phased array radio in CMOS technology. Finally, two-element CMOS phased array front-ends based on passive and active phase shifting architectures are proposed, developed and compared

A QPSK 110-Gb/s Polarization-Diversity MIMO Wireless Link with a 220-255 GHz Tunable LO in a SiGe HBT Technology

In this article, a polarization-diversity technique multiple-input multiple-output (MIMO) is demonstrated to double the spectral efficiency of a line-of-sight quadrature phase-shift keying (QPSK) wireless link at 220-255 GHz with a pair of highly integrated single-chip transmitter (TX) and receiver (RX) front-end modules in 0.13-µ {m SiGe HBT technology ( fTmax=350 /550 GHz) exploiting only a low-cost wire-bonded chip-on-board packaging solution for high-speed baseband (BB) signals. Both TX and RX chips accommodate two independent fundamentally operated direct-conversion in-phase and quadrature (IQ) paths with separately tunable on-chip multiplier-based ( × 16 ) local oscillator (LO) generation paths driven from a single external highly stable 13.75-16-GHz frequency synthesizer. On the RX side, a mixer-first architecture is implemented to improve the symmetry between upper and lower sidebands (USB and LSB) at the cost of an increased noise figure (NF), whereas, on the TX chip, each upconversion mixer is followed by a gain-bandwidth (BW)-limited four-stage power amplifier (PA) to support the link budget at a meter distance. Next, two independent IQ data streams from the upconversion/downconversion paths on each chip are directed to a common lens-coupled broadband on-chip slot antenna system. This way, two orthogonal circular polarizations [left-handed circular polarization (LHCP) and right-handed circular polarization (RHCP)] can be transmitted with sufficient isolation for link operation without the need for a high-speed depolarizer in the BB for any relative orientation between TX and RX modules. The antenna combined with a 9-mm diameter Si-lens provides a directivity of 23.5-27 dBi at 210-270 GHz for each of the modules. This, along with a peak radiated power of 7.5 dBm/ch from the TX module, and the cascaded conversion gain (CG)/single sideband (SSB) NF of 18/18 dB/ch for the RX module followed by a broadband amplifier (PSPL5882) from Tektronix allowed successful transmission of two independent QPSK data streams with an aggregate speed of 110 and 80 Gb/s over 1 and 2 m, respectively, at 230 GHz with a board-level limited channel BB bandwidth (BW) of 13.5 GHz. © 1963-2012 IEEE

Dynamically Controllable Integrated Radiation and Self-Correcting Power Generation in mm-Wave Circuits and Systems

This thesis presents novel design methodologies for integrated radiators and power generation at mm-wave frequencies that are enabled by the continued integration of various electronic and electromagnetic (EM) structures onto the same substrate. Beginning with the observation that transistors and their connections to EM radiating structures on an integrated substrate are essentially free, the concept of multi-port driven (MPD) radiators is introduced, which opens a vast design space that has been generally ignored due to the cost structure associated with discrete components that favors fewer transistors connected to antennas through a single port. From Maxwell's equations, a new antenna architecture, the radial MPD antennas based on the concept of MPD radiators, is analyzed to gain intuition as to the important design parameters that explain the wide-band nature of the antenna itself. The radiator is then designed and implemented at 160 GHz in a 0.13 um SiGe BiCMOS process, and the single element design has a measured effective isotropic radiated power (EIRP) of +4.6 dBm with a total radiated power of 0.63 mW. Next, the radial MPD radiator is adapted to enable dynamic polarization control (DPC). A DPC antenna is capable of controlling its radiated polarization dynamically, and entirely electronically, with no mechanical reconfiguration required. This can be done by having multiple antennas with different polarizations, or within a single antenna that has multiple drive points, as in the case of the MPD radiator with DPC. This radiator changes its polarization by adjusting the relative phase and amplitude of its multiple ports to produce polarizations with any polarization angle, and a wide range of axial ratios. A 2x1 MPD radiator array with DPC at 105 GHz is presented whose measurements show control of the polarization angle throughout the entire 0 degree through 180 degree range while in the linear polarization mode and maintaining axial ratios above 10 dB in all cases. Control of the axial ratio is also demonstrated with a measured range from 2.4 dB through 14 dB, while maintaining a fixed polarization angle. The radiator itself has a measured maximum EIRP of +7.8 dBm, with a total radiated power of 0.9 mW, and is capable of beam steering. MPD radiators were also applied in the domain of integrated silicon photonics. For these designs, the driver transistor circuitry was replaced with silicon optical waveguides and photodiodes to produce a 350 GHz signal. Three of these optical MPD radiator designs have been implemented as 2x2 arrays at 350 GHz. The first is a beam forming array that has a simulated gain of 12.1 dBi with a simulated EIRP of -2 dBm. The second has the same simulated performance, but includes optical phase modulators that enable two-dimensional beam steering. Finally, a third design incorporates multi-antenna DPC by combining the outputs of both left and right handed circularly polarized MPD antennas to produce a linear polarization with controllable polarization angle, and has a simulated gain of 11.9 dBi and EIRP of -3 dBm. In simulation, it can tune the polarization from 0 degrees through 180 degrees while maintaining a radiated power that has a 0.35 dB maximum deviation from the mean. The reliability of mm-wave radiators and power amplifiers was also investigated, and two self-healing systems have been proposed. Self-healing is a global feedback method where integrated sensors detect the performance of the circuit after fabrication and report that data to a digital control algorithm. The algorithm then is capable of setting actuators that can control the performance of the mm-wave circuit and counteract any performance degradation that is observed by the sensors. The first system is for a MPD radiator array with a partially integrated self-healing system. The self-healing MPD radiator senses substrate modes through substrate mode pickup sensors and infers the far-field radiated pattern from those sensors. DC current sensors are also included to determine the DC power consumption of the system. Actuators are implemented in the form of phase and amplitude control of the multiple drive points. The second self-healing system is a fully integrated self-healing power amplifier (PA) at 28 GHz. This system measures the output power, gain and efficiency of the PA using radio frequency (RF) power sensors, DC current sensors and junction temperature sensors. The digital block is synthesized from VHDL code on-chip and it can actuate the output power combining matching network using tunable transmission line stubs, as well as the DC operating point of the amplifying transistors through bias control. Measurements of 20 chips confirm self-healing for two different algorithms for process variation and transistor mismatch, while measurements from 10 chips show healing for load impedance mismatch, and linearity healing. Laser induced partial and total transistor failure show the benefit of self-healing in the case of catastrophic failure, with improvements of up to 3.9 dB over the default case. An exemplary yield specification shows self-healing improving the yield from 0% up through 80%.</p