A microprocessor based digital logic simulator

It is the intent of this thesis to acquaint the reader with a tool which is available for use in the digital circuit design field. The reader is now able to totally simulate via DLS the digital logic design he creates on paper before it ever takes a hardware form. The computer program accepts a detailed description of the schematic and creates timing diagrams, loading statistics, cross references, and various lists for future documentation. The user needs no programming knowledge and will find the requirements to run a simulation with DLS extremely user oriented. The simulation descriptions and command language are tailored to logic design applications. The format is straight forward, utilizing standard English language and logic design concepts. To code a design for simulation the designer needs only a well labeled circuit diagram, where all the inputs and outputs of each element has a label With the addition of a few simulation parameters DLS will take the network description and form a program in memory which will recreate the operations of the digital circuit

PLAWE: A piecewise linear circuit simulator using asymptotic waveform evaluation

Ankara : Department of Electrical and Electronics Engineering and the Institute of Engineering and Science of Bilkent University, 1994.Thesis (Ph.D.) -- Bilkent University, 1994.Includes bibliographical references leaves 73-81.A new circuit simulation program, PLAWE, is developed for the transient analysis of VLSI circuits. PLAWE uses Asymptotic Waveform Evaluation (AWE) technique, which is a new method to analyze linear(ized) circuits, and Piecewise Linear (PWL) approach for DC representation of nonlinear elements. AWE employs a form of Pade approximation rather than numerical integration techniques to approximate the response of linear(ized) circuits in either the time or the frequency domain. AWE is typically two or three orders of magnitude faster than traditional simulators in analyzing large linear circuits. However, it can handle only linear(ized) circuits, while the transient analysis problem is generally nonlinear due to the presence of nonlinear devices such as diodes, transistors, etc.. We have applied the AWE technique to the transient simulation of nonlinear circuits by using static PWL models for nonlinear elements. But, finding a good static PWL model which fits well to the actual i — v characteristics of a nonlinear device is not an easy task and in addition, static PWL modelling results in low accuracy. Therefore, we have developed a dynamic PWL modeling technique which uses SPICE models for nonlinear elements to enhance the accuracy of the simulation while preserving the efficiency gain obtained with AWE. Hence, there is no modelling problem and we can adjust the accuracy level by varying some parameters. If the required level of accuracy is increased, more simulation time is needed. Practical examples are given to illustrate the significant improvement in accuracy. For circuits containing especially weakly nonlinear devices, this method is typically at least one order of magnitude faster than HSPICE. A fast and convergent iteration method for piecewise-linear analysis of nonlinear resistive circuits is presented. Most of the existing algorithms are applicable only to a limited class of circuits. In general, they are either not convergent or too slow for large circuits. The new algorithm presented in this thesis is much more efficient than the existing ones and can be applied to any piecewise-linear circuit. It is based on the piecewise-linear version of the Newton-Raphson algorithm. As opposed to the NewtonRaphson method, the new algorithm is globally convergent from an arbitrary starting point. It is simple to understand and it can be easily programmed. Some numerical examples are given in order to demonstrate the effectiveness of the presented algorithm in terms of the amount of computation.Topçu, SatılmışPh.D

Theory and design of reliable spacecraft data systems

Theory and techniques applicable to design, analysis, and fault diagnosis of reliable spacecraft data system

A Comprehensive Fault Model for Concurrent Error Detection in MOS Circuits

Naval Electronics Sys. Comm. and Office of Naval Research / N00039-80-C-0556Ope