A systematic study on explicit-state non-zenoness checking for timed automata

Zeno runs, where infinitely many actions occur within finite time, may arise in Timed Automata models. Zeno runs are not feasible in reality and must be pruned during system verification. Thus it is necessary to check whether a run is Zeno or not so as to avoid presenting Zeno runs as counterexamples during model checking. Existing approaches on non-Zenoness checking include either introducing an additional clock in the Timed Automata models or additional accepting states in the zone graphs. In addition, there are approaches proposed for alternative timed modeling languages, which could be generalized to Timed Automata. In this work, we investigate the problem of non-Zenoness checking in the context of model checking LTL properties, not only evaluating and comparing existing approaches but also proposing a new method. To have a systematic evaluation, we develop a software toolkit to support multiple non-Zenoness checking algorithms. The experimental results show the effectiveness of our newly proposed algorithm, and demonstrate the strengths and weaknesses of different approaches.No Full Tex

Parametric model checking timed automata under non-Zenoness assumption

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Modeling Time in Computing: A Taxonomy and a Comparative Survey

The increasing relevance of areas such as real-time and embedded systems, pervasive computing, hybrid systems control, and biological and social systems modeling is bringing a growing attention to the temporal aspects of computing, not only in the computer science domain, but also in more traditional fields of engineering. This article surveys various approaches to the formal modeling and analysis of the temporal features of computer-based systems, with a level of detail that is suitable also for non-specialists. In doing so, it provides a unifying framework, rather than just a comprehensive list of formalisms. The paper first lays out some key dimensions along which the various formalisms can be evaluated and compared. Then, a significant sample of formalisms for time modeling in computing are presented and discussed according to these dimensions. The adopted perspective is, to some extent, historical, going from "traditional" models and formalisms to more modern ones.Comment: More typos fixe

Verification of real-time systems : improving tool support

We address a number of limitations of Timed Automata and real-time model-checkers, which undermine the reliability of formal verification. In particular, we focus on the model-checker Uppaal as a representative of this technology. Timelocks and Zeno runs represent anomalous behaviours in a timed automaton, and may invalidate the verification of safety and liveness properties. Currently, model-checkers do not offer adequate support to prevent or detect such behaviours. In response, we develop new methods to guarantee timelock-freedom and absence of Zeno runs, which improve and complement the existent support. We implement these methods in a tool to check Uppaal specifications. The requirements language of model-checkers is not well suited to express sequence and iteration of events, or past computations. As a result, validation problems may arise during verification (i.e., the property that we verify may not accurately reflect the intended requirement). We study the logic PITL, a rich propositional subset of Interval Temporal Logic, where these requirements can be more intuitively expressed than in model-checkers. However, PITL has a decision procedure with a worst-case non-elementary complexity, which has hampered the development of efficient tool support. To address this problem, we propose (and implement) a translation from PITL to the second-order logic WS1S, for which an efficient decision procedure is provided by the tool MONA. Thanks to the many optimisations included in MONA, we obtain an efficient decision procedure for PITL, despite its non-elementary complexity. Data variables in model-checkers are restricted to bounded domains, in order to obtain fully automatic verification. However, this may be too restrictive for certain kinds of specifications (e.g., when we need to reason about unbounded buffers). In response, we develop the theory of Discrete Timed Automata as an alternative formalism for real-time systems. In Discrete Timed Automata, WS1S is used as the assertion language, which enables MONA to assist invariance proofs. Furthermore, the semantics of urgency and synchronisation adopted in Discrete Timed Automata guarantee, by construction, that specifications are free from a large class of timelocks. Thus, we argue that well-timed specifications are easier to obtain in Discrete Timed Automata than in Timed Automata and most other notations for real-time systems.EThOS - Electronic Theses Online ServiceGBUnited Kingdo

Verification of real-time systems: improving tool support

We address a number of limitations of Timed Automata and real-time model-checkers, which undermine the reliability of formal verification. In particular, we focus on the model-checker Uppaal as a representative of this technology. Timelocks and Zeno runs represent anomalous behaviours in a timed automaton, and may invalidate the verification of safety and liveness properties. Currently, model-checkers do not offer adequate support to prevent or detect such behaviours. In response, we develop new methods to guarantee timelock-freedom and absence of Zeno runs, which improve and complement the existent support. We implement these methods in a tool to check Uppaal specifications. The requirements language of model-checkers is not well suited to express sequence and iteration of events, or past computations. As a result, validation problems may arise during verification (i.e., the property that we verify may not accurately reflect the intended requirement). We study the logic PITL, a rich propositional subset of Interval Temporal Logic, where these requirements can be more intuitively expressed than in model-checkers. However, PITL has a decision procedure with a worst-case non-elementary complexity, which has hampered the development of efficient tool support. To address this problem, we propose (and implement) a translation from PITL to the second-order logic WS1S, for which an efficient decision procedure is provided by the tool MONA. Thanks to the many optimisations included in MONA, we obtain an efficient decision procedure for PITL, despite its non-elementary complexity. Data variables in model-checkers are restricted to bounded domains, in order to obtain fully automatic verification. However, this may be too restrictive for certain kinds of specifications (e.g., when we need to reason about unbounded buffers). In response, we develop the theory of Discrete Timed Automata as an alternative formalism for real-time systems. In Discrete Timed Automata, WS1S is used as the assertion language, which enables MONA to assist invariance proofs. Furthermore, the semantics of urgency and synchronisation adopted in Discrete Timed Automata guarantee, by construction, that specifications are free from a large class of timelocks. Thus, we argue that well-timed specifications are easier to obtain in Discrete Timed Automata than in Timed Automata and most other notations for real-time systems

Computer Aided Verification

This open access two-volume set LNCS 11561 and 11562 constitutes the refereed proceedings of the 31st International Conference on Computer Aided Verification, CAV 2019, held in New York City, USA, in July 2019. The 52 full papers presented together with 13 tool papers and 2 case studies, were carefully reviewed and selected from 258 submissions. The papers were organized in the following topical sections: Part I: automata and timed systems; security and hyperproperties; synthesis; model checking; cyber-physical systems and machine learning; probabilistic systems, runtime techniques; dynamical, hybrid, and reactive systems; Part II: logics, decision procedures; and solvers; numerical programs; verification; distributed systems and networks; verification and invariants; and concurrency

Computer Aided Verification

This open access two-volume set LNCS 11561 and 11562 constitutes the refereed proceedings of the 31st International Conference on Computer Aided Verification, CAV 2019, held in New York City, USA, in July 2019. The 52 full papers presented together with 13 tool papers and 2 case studies, were carefully reviewed and selected from 258 submissions. The papers were organized in the following topical sections: Part I: automata and timed systems; security and hyperproperties; synthesis; model checking; cyber-physical systems and machine learning; probabilistic systems, runtime techniques; dynamical, hybrid, and reactive systems; Part II: logics, decision procedures; and solvers; numerical programs; verification; distributed systems and networks; verification and invariants; and concurrency

Sémantique compositionnelle et raffinement de systèmes temporisés : application aux automates temporisés d'UPPAAL et au langage FIACRE

Les systèmes temps-réel sont massivement impliqués dans de nombreuses applications, dont notre vie dépend comme les logiciels embarqués dans les voitures et les avions. Pour ces systèmes des erreurs inattendues ne sont pas acceptables. De ce fait, assurer la correction de ces systèmes est une tâche primordiale. Les systèmes temps-réel représentent un large spectre de systèmes automatisés dont la correction dépend de la ponctualité des événements (timeliness) et pas seulement de leurs propriétés fonctionnelles. Chaque événement doit être produit selon la date indiquée par la spécification du système. Les systèmes temps-réel sont concurrents et embarqués, et conçus comme un assemblage de composants en interaction. Malgré les progrès réalisés dans les techniques de model checking, la vérification et l'analyse des systèmes temps-réel représentent toujours un défi autant pour les chercheurs que les praticiens. Pour étudier le comportement des systèmes temps-réel, différents formalismes ont été considérés comme les automates temporisés, les réseaux de Petri temporisés et les algèbres de processus. Cela donne lieu à plusieurs points délicats concernant le raffinement, la composition et la vérification. Ces points représentent un champ de recherche intensif. Ma thèse présente une étude des systèmes temps-réel focalisée sur les notions de sémantique, de composition et de raffinement. Elle décrit nos efforts pour explorer et étendre les formalismes temps-réel. Nous avons abordé les concepts de base de la modélisation des systèmes temps réel tels que les variables partagées, la communication, les priorités, la dynamicité, etc. La contribution de cette thèse porte sur la définition d’un cadre formel pour raisonner sur la sémantique, la composition et le raffinement des systèmes temporisés. Nous avons instancié ce cadre pour le formalisme des automates temporisés et le langage Fiacre.Nowadays, real-time systems are intensively involved in many applications on which our life is dependent, like embedded software in cars and planes. For these systems unexpected errors are not acceptable. Real-time systems represent a large spectrum of automated systems of which correctness depends on the timing of events (timeliness) and not only on their functional properties. Each event must be produced on time. Realtime systems can be concurrent and embedded where different interactive modules and components are assembled together. Despite advances in model checking techniques, the verification and analysis of real-time systems still represent a strong challenge for researchers and practitioners. To study the behavior of real-time systems, different formalisms have been considered like timed automata, time Petri nets and timed algebra, and several challenges concerning refinement, composition and verification have emerged. These points represent an intensive field of research. This thesis describes our effort to explore and extend real-time formalisms. We have revisited real-time language semantics, focusing on composition and refinement. We have addressed high level concepts like shared variables, communication, priorities, dynamicity, etc. The main contribution consists of a theoretical study of timed systems where we establish a framework for reasoning on composition, refinement and semantics. We instantiate this framework for timed automata and the Fiacre language